Prosecution Insights
Last updated: August 15, 2026
Application No. 17/826,181

MICRO-ELECTRO-MECHANICAL SYSTEM (MEMS) DEVICE and fabrication method thereof

Final Rejection §102§103
Filed
May 27, 2022
Examiner
BLACKWELL, ASHLEY NICOLE
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Vanguard International Semiconductor Corporation
OA Round
4 (Final)
98%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 98% — above average
98%
Career Allowance Rate
62 granted / 63 resolved
+30.4% vs TC avg
Minimal +3% lift
Without
With
+2.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
33 currently pending
Career history
98
Total Applications
across all art units

Statute-Specific Performance

§103
64.1%
+24.1% vs TC avg
§102
23.8%
-16.2% vs TC avg
§112
12.1%
-27.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 63 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Claims 3, 4, 8 and 12-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 02/16/2025. Response to Arguments Applicant’s arguments, see pages 7-10, filed 04/13/2026, with respect to the rejection(s) of claims 1, 2, 5-7, 9, 10, and 11 under 102 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Wang et al. (US 20210087055 A1). Claim Rejections - 35 USC § 102 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 1, 2, 6, 7, 9, 10 and 11 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Wang et al. (US 20210087055 A1). Regarding claim 1, Wang discloses a micro-electro-mechanical system (MEMS) device, comprising: a first substrate (102); ([0016], Fig.1-2) an interconnect layer (104 and 118) disposed on the first substrate (102), wherein the interconnect layer (104) comprises a plurality of conductive layers (114) and a plurality of dielectric layer (115 and 118) stacked alternately (per [0025]), “the interconnect dielectric structure 115 may comprise one or more inter-level dielectric (ILD) layers.”); ([0016], Fig. 1-2) a MEMS device layer (124) bonded on the interconnect layer (104), ([0018], Fig. 1) wherein the MEMS device layer (124) comprises a proof mass (inside 138/annotated below); ([0018], Fig. 1-2) a stopper (132) disposed directly under the proof mass (inside 138) and spaced apart from the proof mass (inside 138), ([0018], Fig. 1-2) wherein the stopper (132) is surrounded by a portion of the interconnect layer (114a annotated below), and the stopper (132) comprises: a bottom portion (114a) constructed of one of the plurality of conductive layers (114); ([0020], Fig. 1-2) and a silicon-based layer (132b per [0030]) disposed on the bottom portion (114a) and having an exposed top surface; ([0017], Fig. 1-2) and a second substrate (125) including a cavity (140) and bonded on the MEMS device layer (124). ([0028], Fig.1-2) PNG media_image1.png 532 871 media_image1.png Greyscale Regarding claim 2, Wang discloses the MEMS device of claim 1, wherein the interconnect layer (104 and 118) comprises a concave portion (annotated below) surrounded by the portion of the interconnect layer (104 and 118), and the stopper (132) is disposed in the concave portion (annotated below).(Fig. 1) PNG media_image2.png 471 792 media_image2.png Greyscale Regarding claim 6, Wang discloses the MEMS device of claim 1, wherein the MEMS device layer (124) further comprises a protruding portion (annotated below) towards the interconnect layer (104 and 118) and a conductive layer (116a) on the protruding portion (annotated below), and the MEMS device layer (124) is bonded with a top conductive layer (114a) of the interconnect layer (104 and 118) through the conductive layer (116a) and the protruding portion (annotated below). ([0017], Fig.1) PNG media_image3.png 464 756 media_image3.png Greyscale Regarding claim 7, Wang discloses the MEMS device of claim 1, wherein the MEMS device layer (124) further comprises a suspension beam (inside 138, annotated below) adjacent to the proof mass (inside 138, annotated below), and the suspension beam (inside 138, annotated below), and the proof mass (inside 138, annotated below), are disposed corresponding to the cavity (140) of the second substrate (128). (Fig.1-2) PNG media_image4.png 479 821 media_image4.png Greyscale Regarding claim 9, Wang discloses the MEMS device of claim 1, wherein the bottom portion (114a) of the stopper (132) is constructed of a portion of a top conductive layer (114) of the interconnect layer (104 and 118). ([0045], Fig. 1-2) Regarding claim 10, Wang discloses the MEMS device of claim 9, wherein the interconnect layer (104) further comprises a top dielectric layer (204 per [0026]) disposed on the top conductive layer (114) and a passivation layer (206) disposed on the top dielectric layer (204), and the stopper (132) further comprises a portion of the top dielectric layer (204) and a portion of the passivation layer (206) stacked in sequence on the bottom portion (114a), and a through hole (annotated below) in the portion of the top dielectric layer (204) and the portion of the passivation layer (206), wherein the silicon-based layer (132b) is conformally disposed on the portion of the passivation layer (206) and in the through hole (annotated below). ([0026],Fig. 2) PNG media_image5.png 502 812 media_image5.png Greyscale Regarding claim 11, Wang discloses the MEMS device of claim 10, wherein the stopper (132) further comprises a barrier layer (132a) conformally disposed between the silicon-based layer (132b) and the portion of the passivation layer (206), and between the silicon-based layer (132b) and the bottom portion (116a), and the barrier layer (132a) comprises Ti (per [0020]), “116a may be or comprise a reactive material (e.g., titanium)” and per [0030], “ 132a may, for example, be or comprise titanium,” and hence the examiner has met the limitation), TiN or a combination thereof. Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (US 20210087055 A1). Regarding claims 5, Wang discloses the MEMS device of claim 1. Wang does not explicitly disclose wherein the silicon-based layer comprises polysilicon amorphous silicon or single crystal silicon. However, it would have been obvious to one skilled in the art before the effective filing date to use the teachings of Wang for the silicon-based layer comprises polysilicon amorphous silicon or single crystal silicon since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416 in order to “prevent stiction with other structures and/or layers disposed within the first and/or second cavities 136, 140”. (Wang, [0053]) Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ASHLEY BLACKWELL whose telephone number is (703)756-1508. The examiner can normally be reached Mon-Fri 8:00-1600. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached on 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ASHLEY NICOLE BLACKWELL/Examiner, Art Unit 2897 /JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Show 1 earlier event
Mar 21, 2025
Non-Final Rejection mailed — §102, §103
Jun 17, 2025
Response Filed
Sep 11, 2025
Final Rejection mailed — §102, §103
Dec 07, 2025
Request for Continued Examination
Dec 17, 2025
Response after Non-Final Action
Jan 14, 2026
Non-Final Rejection mailed — §102, §103
Apr 13, 2026
Response Filed
Jun 17, 2026
Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12701991
INTEGRATED ISOLATION CAPACITOR WITH ENHANCED BOTTOM PLATE
4y 5m to grant Granted Aug 04, 2026
Patent 12701889
DISPLAY DEVICE
3y 7m to grant Granted Aug 04, 2026
Patent 12701882
DISPLAY PANEL AND DISPLAY DEVICE
3y 7m to grant Granted Aug 04, 2026
Patent 12684886
PHOTODETECTOR
4y 6m to grant Granted Jul 14, 2026
Patent 12677547
DISPLAY PANEL AND MANUFACTURING METHOD THEREOF
4y 7m to grant Granted Jul 07, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

5-6
Expected OA Rounds
98%
Grant Probability
99%
With Interview (+2.7%)
3y 5m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 63 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month