DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 11 November 2025 has been entered.
Response to Amendment
The Office acknowledges receipt on 11 November 2025 of Applicants’ amendments in which claims 27 and 30 are amended.
Response to Arguments
Applicants’ arguments with respect to claim(s) 27 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 27, 29, and 33 is/are rejected under 35 U.S.C. 103 as being unpatentable over Choi et al. (US20150171024A1) in view of Chen et al. (US20160240391A1) and Song et al. (US20120146243A1).
Regarding claim 27, Choi teaches a method of forming a semiconductor device, the method comprising:
attaching a plurality of dies (124) to an interposer wafer (178) {Fig. 6a; ¶0076};
forming an encapsulant (260) over the interposer wafer (178) and around the plurality of dies (124), an upper surface of the encapsulant being level with upper surfaces of the plurality of dies {Fig. 6b, 6c; ¶0077, 0078};
etching recesses (280) in the upper surface of the encapsulant (260) {Figs. 3a, 6e; ¶0081}
each of the recesses (280) comprising:
a first depth from the upper surface of the encapsulant; and
a first width being perpendicular to the discontinuous loop {Fig. 6e; depth and width are implicit to formation of recess};
sawing through the encapsulant (260) and the interposer wafer (178) to form a partial integrated circuit package (330) comprising the plurality of dies (124) {Figs. 6k, 7; ¶0091, 0092},
wherein in a top-down view the encapsulant (260) around the perimeter of the plurality of dies (124) has a thickness {implicit},
wherein sawing through the encapsulant (260) comprises sawing through the recesses (280) {Fig. 6k; ¶0091}.
Choi does not teach the recesses forming a discontinuous loop around a perimeter of the plurality of dies, the discontinuous loop comprising four corner regions, each corner region comprising a first recess and a second recess of the recesses, a first length of the first recess and a second length of the second recess being aligned with the discontinuous loop, the first length being different than the second length.
In an analogous art, Chen teaches in Fig. 11 and paragraph [0027] recesses (96) forming a discontinuous loop (discontinuous loop of recesses formed around multiple packages 86) around a perimeter of a plurality of dies (86), the discontinuous loop (discontinuous loop of recesses formed around multiple packages 86) comprising four corner regions, each corner region comprising a first recess (96 with horizontal length) and a second recess (96 with vertical length) of the recesses (96), a first length of a first recess (96 with horizontal length) and a second length of a second recess (96 with vertical length) being aligned with the discontinuous loop (discontinuous loop of recesses formed around multiple packages 86), the first length being different than the second length {see Annotated Copy of Chen’s Fig. 11, below; L2>L1}. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Choi’s method as modified by Song based on the teachings of Chen – to include recesses forming a discontinuous loop around a perimeter of the plurality of dies, the discontinuous loop comprising four corner regions, each corner region comprising a first recess and a second recess of the recesses, a first length of the first recess and a second length of the second recess being aligned with the discontinuous loop, the first length being different than the second length – because the skilled artisan could have applied Chen’s manufacturing technique in the same way to the method taught by Choi and the results would have been predictable to the skilled artisan. MPEP §2143(I)(C). Moreover, [t]he selection of a known … [manufacturing operation] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Choi as modified by Chen does not teach:
wherein after sawing through the recesses, each of the recesses has the first length, the first depth, and a second width being less than the first width; and
attaching the partial integrated circuit package to a package substrate.
Song teaches in Fig. 9 and paragraph [0043] attaching a partial integrated circuit comprising a plurality of dies (108, 112) to a package substrate (102). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Choi’s method as modified by Chen based on the teachings of Song – for attaching a partial integrated circuit comprising a plurality of dies to a package substrate – so the integrated circuit dies may be electrical[ly] connect[ed] to the next level system via system interconnects. Song ¶0034.
Additionally, Song teaches in Figs. 9 and 10 and paragraphs [0041] and [0044] wherein after sawing through the recesses (1013), each of the recesses (1013) has the first length, the first depth, and a second width (≤ first width) being less than the first width. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Choi’s method as modified by Chen and Song based on the further teachings of Song – such that after sawing through the recesses, each of the recesses has the first length, the first depth, and a second width being less than the first width – so electrical interconnects … can pass through the recess gap … to couple the interposer … and the base package substrate. Song ¶0044.
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Regarding claim 29, Choi as modified by Chen and Song teaches the method of claim 27, and Choi further teaches wherein, before sawing through the encapsulant (260), in a side cross-section perpendicular to the top-down view, each of the recesses (280) has a U-shaped profile {Fig. 6e}.
Regarding claim 33, Choi as modified by Chen and Song teaches the method of claim 27, but Choi does not teach wherein each of the four corner regions comprises four or more distinct recesses of the recesses.
Chen teaches in Fig. 11 that each of the four corner regions comprises four or more distinct recesses (96) of the recesses (96) {see Annotated Copy of Chen’s Fig. 11, below}. The motivation for this modification is identified with respect to base claim 27.
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Claim(s) 28, 30, and 31 is/are rejected under 35 U.S.C. 103 as being unpatentable over Choi in view of Chen and Song as applied to claim 27 above, and further in view of Liu et al. (US20220108932A1).
Regarding claim 28, Choi as modified by Chen and Song teaches the method of claim 27, but Choi does not teach wherein the second width is substantially 99% of the thickness.
Liu teaches in paragraph [0084] that the etching rate of encapsulant (26a) during singulation (e.g., while forming recesses R1) is a result-effective parameter for determining the thickness (from a top-down view perspective) of the encapsulant (26a) around the perimeter of a plurality of dies (268). See, e.g., MPEP §2144.05(II)(B). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Choi’s method as modified by Chen and Song based on the teachings of Liu for discovering an optimum or workable range of etching rate – such that the second width is substantially 99% of the thickness – because where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. MPEP §2144.05(II)(A).
Regarding claim 30, Choi as modified by Chen and Song teaches the method of claim 27, but Choi does not teach wherein, after sawing through the encapsulant, in the top-down view, the encapsulant comprises four corners, wherein the first recess is more proximal to a first corner of the four corners than the second recess is to the first corner of the four corners, and wherein the first recess is a distance from the first corner.
Liu teaches in Fig. 22 and paragraph [0093] wherein, after sawing through the encapsulant (26a), in the top-down view, the encapsulant (26a) comprises four corners. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Choi’s method as modified by Chen and Song based on the teachings of Liu – such that after sawing through the encapsulant, in the top-down view, the encapsulant comprises four corners – because the skilled artisan could have applied Liu’s manufacturing technique in the same way to the method taught by Choi and the results would have been predictable to the skilled artisan. MPEP §2143(I)(C). Moreover, [t]he selection of a known … [manufacturing technique] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Choi as modified by Liu above does not expressly teach the first recess is more proximal to a first corner of the four corners than the second recess is to the first corner of the four corners, and wherein the first recess is a distance from the first corner.
However, Liu teaches in Fig. 22 that a portion of the perimeter of each recess (e.g., R3) may remain after the sawing process. And these perimeter portions have the same locations they had before the sawing operation. Chen teaches in Fig. 11 that before a sawing operation, the first recess (96 with horizontal) is more proximal to a first corner of the four corners than the second recess (96 with vertical length) is to the first corner of the four corners, and wherein the first recess (96 with horizontal) is a distance (implicit) from the first corner {see Annotated Copy of Chen’s Fig. 11, below}. The motivation for this modification is identified with respect to Liu in the preceding paragraphs and with respect to Chen in base claim 27.
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Regarding claim 31, Choi as modified by Chen, Song, and Liu teaches the method of claim 30, but Choi does not teach wherein the distance is substantially the same as the thickness.
Liu teaches in Fig. 22 the distance of the first recess (R1) from the corner of the encapsulant (26a) is substantially the same as the thickness (from a top-down view perspective) of the encapsulant (26a) around the perimeter of a plurality of dies (268). “The Examiner is authorized to make a finding of relative dimensions that are, as here, clearly depicted in a drawing.” Ex parte Wright, 091818 USPTAB, 2017-001093 (Patent Trial and Appeal Board Decisions, 2018). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Choi’s method as modified by Chen, Song, and Liu based on the further teachings of Liu – such that the distance is substantially the same as the thickness – to increase the contact area, and thereby the fastening strength, between a protection material and the encapsulant along a perimeter of the recesses. Liu ¶0065.
Moreover, Liu teaches in paragraph [0084] that the etching rate of encapsulant (26a) during singulation (e.g., while forming recesses R1) is a result-effective parameter for determining the thickness (from a top-down view perspective) of the encapsulant (26a) around the perimeter of a plurality of dies (268). See, e.g., MPEP §2144.05(II)(B). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Choi’s method as modified by Chen, Song, and Liu based on the further teachings of Liu for discovering an optimum or workable range of etching rate – such that such that the distance is substantially the same as the thickness – because where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. MPEP §2144.05(II)(A).
Allowable Subject Matter
Claims 1, 6-8, 21, 23-26, 34, and 35 are allowed.
The following is an examiner’s statement of reasons for allowance:
The prior art does not teach the subject matter recited in independent claim 1 whereby “after bonding the interposer to the package substrate, forming recesses in the encapsulant, each of the recesses being along outer edges of the encapsulant,” in combination with the other limitations of claim 1. Claims 6-8 and 34 depend from claim 1.
The prior art does not teach the subject matter recited in independent claim 21 of “etching a first bevel and a second bevel into the upper surface along a scribe region of the encapsulant disposed between the first die and the second die, a first length of the first bevel and a second length of the second bevel being along a longitudinal axis of the scribe region,” in combination with the other limitations of claim 21. Claims 23-26 and 35 depend from claim 21.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Citation of Pertinent Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
West et al. (US20230282595A1) teaches an integrated circuit (IC) fabrication flow including a multilevel metallization scheme wherein one or more metal layer members of a scribe-lane structure are formed according to one or more design constraints. A total thickness of the metal layer members of the scribe-lane structure along a dicing path may be limited to a threshold value to optimize dicing separation yields in a dicing operation. But West does not teach the above-identified features of allowed claims 1 and 21.
Conclusion
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/D.W.W./Examiner, Art Unit 2891
/MATTHEW C LANDAU/Supervisory Patent Examiner, Art Unit 2891