Prosecution Insights
Last updated: July 17, 2026
Application No. 17/841,449

LIGHT EMITTING ELEMENT, DISPLAY DEVICE INCLUDING THE SAME, AND METHOD OF FABRICATING THE DISPLAY DEVICE

Non-Final OA §103
Filed
Jun 15, 2022
Priority
Oct 29, 2021 — RE 10-2021-0146950
Examiner
YEMELYANOV, DMITRIY
Art Unit
2891
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
5 (Non-Final)
74%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allowance Rate
408 granted / 555 resolved
+5.5% vs TC avg
Strong +19% interview lift
Without
With
+19.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
38 currently pending
Career history
599
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
88.4%
+48.4% vs TC avg
§102
8.8%
-31.2% vs TC avg
§112
2.4%
-37.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 555 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-4, 9, 10, 12, 19 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sakariya et al. (US 2014/0159064 A1) in view of Choi et al. (US 2017/0200765 A1). PNG media_image1.png 822 738 media_image1.png Greyscale Regarding Claim 1, Sakariya (Fig. 5A, 9E) discloses a display device comprising: a pixel electrode (102) on a substrate (100); a light emitting element (400) on the pixel electrode (102), and comprising a first semiconductor layer (418), an active layer (416) on the first semiconductor layer (418), and a second semiconductor layer (414) on the active layer (416); (See Fig. 5A) a connection electrode layer (pad layer 134) between the light emitting element (400) and the pixel electrode (102), and directly contacting the pixel electrode (102); an insulating layer (150) on the substrate (100) and the pixel electrode (102), and surrounding the light emitting element (400); a common electrode (top conductive contact 160) on the insulating layer (150) directly contacting the second semiconductor layer (414) of the light emitting element (400) (See Fig. 9E); and an electrode layer (a bottom electrode 420) between the connection electrode layer (134) and the first semiconductor layer (418), and wherein the connection electrode layer (132/134) comprises a first surface (See first surface in annotated Fig. 5A) entirely in contact with the electrode layer (420), and wherein the connection electrode (132/134) and the electrode layer are commonly etched (a bottom electrode 420). Further, limitation in line 16, “the connection electrode and the electrode layer are commonly etched” is considered to be product-by-process. “Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). The examiner notes that limitation is “the connection electrode and the electrode layer are commonly etched” is considered to be met as long as both the connection electrode and the electrode layer are underwent etching/removal of at least a portion of the connection electrode and the electrode layer process at some point in time during manufacturing process of the device. Sakariya does not explicitly disclose that edges of the connection electrode layer are aligned with edges of the electrode layer, respectively. Choi (Fig. 11b, 15, 20B) discloses edges of a connection electrode layer (conductive electrode 1156, 2156) are aligned with edges of the electrode layer (1020, 2020), [0112] respectively It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display device in Sakariya in view of Choi such that edges of the connection electrode layer are aligned with edges of the electrode layer, respectively in order to integrally form first electrode and a conductive electrode of the semiconductor light emitting device [0112] Hereinafter, unless explicitly stated, all paragraph and figure references to prior art of Sakariya Regarding Claim 2, Sakariya (Fig. 5A, 9E) in view of Choi discloses the display device of claim 1, wherein the connection electrode layer (132/134) further comprises a second surface (bottom of 134 corresponding to the first surface in annotated Fig. 5A) in contact with the pixel electrode (102), wherein the first surface (See first surface in annotated Fig. 5A) is parallel to at least a part of the second surface (bottom of 132/134 corresponding to the first surface in annotated Fig. 5A) (See Fig. 5). Regarding Claim 3, Sakariya (Fig. 5A, 9E) in view of Choi discloses the display device of claim 2, wherein a width of the first surface (See first surface in annotated Fig. 5A) of the connection electrode layer (132/134) is the same as a width of the light emitting element (see width of an electrode layer (bottom electrode 420) is the same as width of the first surface on annotated Fig. 5A) The Examiner notes that as long as a width of the first surface of the connection electrode layer is the same as a width of at least a portion light emitting element (i.e an electrode layer) the limitation is considered to be met. Further, Sakariya discloses optimizing width of width of the light emitting element (“The bottom surface of the micro p-n diode may also be approximately the same width as the top surface of the bottom electrode 420. In an embodiment the top surface of the micro p-n diode is approximately the same width as the top electrode 470.”) [0145] Regarding Claim 4, Sakariya (Fig. 5A, 9E) in view of Choi discloses the display device of claim 2, wherein the first surface (See first surface in annotated Fig. 5A) has a same width as the second surface (bottom of 132/134 corresponding to the first surface in annotated Fig. 5A) Regarding Claim 9, Sakariya (Fig. 5A, 9E) in view of Choi discloses the display device of claim 2, wherein the connection electrode layer (132/134) comprises at least any one of aluminum (Al), copper (Cu), silver (Ag), gold (Au), tin (Sn), and titanium (Ti), and wherein the electrode layer of the light emitting element comprises at least any one of aluminum (Al), titanium (Ti), indium (In), gold (Au), silver (Ag), indium tin oxide (ITO), indium zinc oxide (IZO), or indium tin zinc oxide (ITZO). [0123-0124] The Examiner notes that 134 is made out of layer 130. See Fig. 3D [0137] Regarding Claim 10, Sakariya (Fig. 5A, 9E) in view of Choi discloses the display device of claim 1, wherein at least a part of the light emitting element (400) protrudes above the insulating layer (150). (Fig. 9E) Regarding Claim 12, Sakariya (Fig. 5A, 9E) in view of Choi discloses the display device of claim 1, further comprising a bank layer (110) on the substrate (100), overlapping a part of the pixel electrode (102), and not overlapping the light emitting element (400) (Fig. 9E). PNG media_image1.png 822 738 media_image1.png Greyscale Regarding Claim 19, Sakariya (Fig. 5A, 9E) discloses the light emitting element comprising: a first semiconductor layer doped with a p-type dopant (p-doped layer 418); a second semiconductor layer doped with an n-type dopant (n-doped layer 414); an active layer (416) between the first semiconductor layer (418) and the second semiconductor layer (414); and an electrode layer (420) on a surface (451) of the first semiconductor layer (418), wherein a connection electrode layer (134) is on a surface of the electrode layer (420), and comprises a first surface (See first surface in annotated Fig. 5A) entirely in contact with the electrode layer (420) wherein the connection electrode (132/134) and the electrode layer are commonly etched (a bottom electrode 420), and a second surface (bottom) opposite the first surface (top), and wherein the first surface (See first surface in annotated Fig. 5A) is parallel to at least a part of the second surface (bottom of 132/134 corresponding to the first surface in annotated Fig. 5A). Further, limitation in line 16, “the connection electrode and the electrode layer are commonly etched” is considered to be product-by-process. “Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). The examiner notes that limitation is “the connection electrode and the electrode layer are commonly etched” is considered to be met as long as both the connection electrode and the electrode layer are underwent etching/removal of at least a portion of the connection electrode and the electrode layer process at some point in time during manufacturing process of the device. Sakariya does not explicitly disclose edges of the connection electrode layer are aligned with edges of the electrode layer, respectively. Choi (Fig. 11b, 15, 20B) discloses edges of a connection electrode layer (conductive electrode 1156, 2156) are aligned with edges of the electrode layer (1020, 2020), [0112] respectively It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display device in Sakariya in view of Choi such that edges of the connection electrode layer are aligned with edges of the electrode layer, respectively in order to integrally form first electrode and a conductive electrode of the semiconductor light emitting device [0112] Hereinafter, unless explicitly stated, all paragraph and figure references to prior art of Sakariya Regarding Claim 20, Sakariya (Fig. 5A, 9E) in view of Choi discloses the light emitting element of claim 19, wherein the connection electrode layer (134) comprises at least any one of aluminum (Al), copper (Cu), silver (Ag), gold (Au), tin (Sn), and titanium (Ti), and wherein the electrode layer of the light emitting element comprises at least any one of aluminum (Al), titanium (Ti), indium (In), gold (Au), silver (Ag), indium tin oxide (ITO), indium zinc oxide (IZO), or indium tin zinc oxide (ITZO). [0123-0124] The Examiner notes that 134 is made out of layer 130. See Fig. 3D [0137] Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sakariya et al. (US 2014/0159064 A1) in view of Choi et al. (US 2017/0200765 A1) and further in view of Choi et al. (KR 20170029378 A; hereinafter Choi/378). Regarding Claim 11, Sakariya (Fig. 5A, 9E) in view of Choi discloses the display device of claim 1. Sakariya in view of Rhee does not explicitly disclose the light emitting element further comprises: an electron blocking layer between the first semiconductor layer and the active layer; and a superlattice layer between the second semiconductor layer and the active layer. Choi/378 (Fig. 5, 6) discloses the light emitting element further comprises: an electron blocking layer (260) between a first semiconductor layer (270) and an active layer (230); and a superlattice layer (220) between a second semiconductor layer (210) and the active layer (230). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display device in Sakariya in view of Choi and Choi/478 such that the light emitting element further comprises: an electron blocking layer between the first semiconductor layer and the active layer; and a superlattice layer between the second semiconductor layer and the active layer in order to evenly distribute degree of light emission in the light emitting device (Choi) Claim(s) 13 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sakariya et al. (US 2014/0159064 A1) in view of Choi et al. (US 2017/0200765 A1) and further in view of Sizov et al. (US 2020/0343230 A1). Regarding Claim 13, Sakariya (Fig. 5A, 9E) in view of Choi discloses the display device of claim 12. Sakariya in view of Choi does not explicitly disclose a partition wall on the common electrode and defining an opening; a light conversion layer in the opening; and a color filter on the light conversion layer and the partition wall. Sizov (Fig. 9B) discloses a partition wall (502) on a common electrode (190) and defining an opening (distance between 502); a light conversion layer (“optical material 506 may be filled with a color conversion material such as quantum dots”) in the opening; and a color filter (520) on the light conversion layer (506) and the partition wall (502). [0073, 0076]. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display device in Sakariya in view of Choi and Sizov such that a partition wall on the common electrode and defining an opening; a light conversion layer in the opening; and a color filter on the light conversion layer and the partition wall in order to have display device designed for color conversion, spectral filtering, angular filtering, and/or light shaping to facilitate on-axis light transmission. [0072]. Regarding Claim 14, Sakariya in view of Choi and Sizov discloses the display device of claim 13, wherein Sakariya in view of Choi and Sizov as previously combined does not explicitly disclose the partition wall overlaps the bank layer, and wherein the opening overlaps the light emitting element. However, Sizov (Fig. 9B) discloses the partition wall (overlaps a bank layer (170), and wherein the opening (opening between 502) overlaps a light emitting element (151). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the display device in Sakariya in view of Choi and Sizov such that the partition wall overlaps the bank layer, and wherein the opening overlaps the light emitting element in order to have display device designed for color conversion, spectral filtering, angular filtering, and/or light shaping to facilitate on-axis light transmission. [0072]. Response to Arguments Applicant’s arguments with respect to claim(s) 1 and 19 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to DMITRIY YEMELYANOV whose telephone number is (571)270-7920. The examiner can normally be reached M-F 9a.m.-6p.m. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at (571) 272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DMITRIY YEMELYANOV/Examiner, Art Unit 2891
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Prosecution Timeline

Show 6 earlier events
Oct 22, 2025
Response after Non-Final Action
Oct 27, 2025
Non-Final Rejection mailed — §103
Jan 22, 2026
Response Filed
Feb 20, 2026
Final Rejection mailed — §103
Apr 09, 2026
Response after Non-Final Action
May 17, 2026
Request for Continued Examination
May 21, 2026
Response after Non-Final Action
May 28, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

5-6
Expected OA Rounds
74%
Grant Probability
93%
With Interview (+19.3%)
2y 7m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 555 resolved cases by this examiner. Grant probability derived from career allowance rate.

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