DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 14 and 15 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. There is no support in the specification for the claim limitations of "top ends of the first metal oxide layer, top ends of the second metal oxide layer, and top ends of the capacitor dielectric structure are coplanar with each other", as recited in claim 14.
Claims 14 and 15 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention. There is no support in the specification for the claim limitation of "top ends of the first metal oxide layer, top ends of the second metal oxide layer, and top ends of the capacitor dielectric structure are coplanar with each other", as recited in claim 14 because the disclosure does not enable an artisan to make top ends of the capacitor dielectric structure are coplanar with top ends of itself since the first metal oxide layer and the second metal oxide layer are parts of the capacitor dielectric structure.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2, 14 and 15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The claimed limitation of "first dielectric layer", as recited in claim 2, is unclear as to whether said limitation is the same as or different from “a first dielectric layer”, as recited in claim 1.
The claimed limitation of "top ends of the first metal oxide layer, top ends of the second metal oxide layer, and top ends of the capacitor dielectric structure are coplanar with each other", as recited in claim 14, is unclear as to how ends of the capacitor dielectric structure are coplanar with top ends of itself since the first metal oxide layer and the second metal oxide layer are parts of the capacitor dielectric structure.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 and 2, as best understood, is/are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Chien (2022/0157821).
As for claim 1, Chien shows in Figs. 1, 8 and related text a memory device 100, comprising:
a semiconductor substrate 101 having an active region 105;
a word line 119 extending across the active region;
a first source/drain region 113a and a second source/drain region 113b disposed in the active region and at opposite sides of the word line;
a bit line 129 disposed over and electrically connected to the first source/drain region;
a first dielectric layer 137 disposed over the semiconductor substrate to cover and seal the bit line between the first dielectric layer and the semiconductor substrate;
a second dielectric layer 143 disposed on the first dielectric layer; and
a capacitor 157a (or 157b) disposed over and electrically connected to the second source/drain region, wherein the capacitor is disposed in the second dielectric layer; such that the capacitor is positioned above the bit line, wherein the capacitor comprises a bottom electrode 151a (or 151b), a top electrode 155a (or 155b), and a capacitor dielectric structure 153a (or 153b) disposed between the bottom electrode and the top electrode,
wherein the capacitor dielectric structure has a U-shaped cross section and comprises a first metal oxide layer ([0085]: lowermost portion, i.e. ZrO2), a second metal oxide layer (lower portion, i.e. Al2O3) disposed over the first metal oxide layer, and a third metal oxide layer (upper portion, i.e. HfO2) disposed over the second metal oxide layer, and wherein the first metal oxide layer, the second metal oxide layer, and the third metal oxide layer comprise are made of different materials ([0085]),
wherein each of the bottom electrode and the top electrode has a U-shaped cross section, such that the top electrode is disposed in and surrounded by the bottom electrode,
wherein the first metal oxide layer, the second metal oxide layer, the third metal oxide layer are disposed between the top electrode and the bottom electrode, and are surrounded by the bottom electrode;
wherein top ends of the bottom electrode, top ends of the top electrode, top ends of the capacitor dielectric structure are coplanar with each other.
As for claim 2, Chien shows a third dielectric layer 133 disposed between first dielectric layer and the semiconductor substrate, wherein the second dielectric layer has a through opening 145a (or 145b), formed above the second source/drain region, wherein the first metal oxide layer comprises ZrO2, and the second metal oxide layer comprises Al2O3 ([0085]), wherein the capacitor is received in the through opening of the second dielectric layer, such that a height of the capacitor is equal to a thickness of the second dielectric layer, wherein a top surface of the third dielectric layer is coplanar with a top surface of the bit line, wherein the third dielectric layer has an air gap formed at a sidewall of the bit line, such that the bit line and the third dielectric layer is separated by the air gap (Fig. 2).
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 3-15, as best understood, is/are rejected under 35 U.S.C. 103 as being unpatentable over Chien (2022/0157821) in view of Wei et al. (2022/0278115).
As for claims 3-10 and 13-15, Chien shows in Figs. 1, 8 and related text a memory device 100, comprising:
a semiconductor substrate 101 having an active region;
a word line 119 extending across the active region;
a first source/drain region 113 a and a second source/drain region 113b disposed in the active region and at opposite sides of the word line;
a bit line 129 disposed over and electrically connected to the first source/drain region; and
a capacitor 157a (or 157b) disposed over and electrically connected to the second source/drain region, wherein the capacitor comprises a bottom electrode 151a (or 151b), a top electrode 155a (or 155b), and a capacitor dielectric structure 153a (or 153b) disposed between the bottom electrode and the top electrode,
a first dielectric layer 137 disposed over the semiconductor substrate to cover and seal the bit line between the first dielectric layer and the semiconductor substrate;
a second dielectric layer 143, having a through opening 145a (or 145b), disposed on the first dielectric layer and above the first source/drain region and the second source/drain region, wherein the capacitor is received in the through opening of second dielectric layer, such that a height of the capacitor is equal to a thickness of the second dielectric layer;
a conductive contact 141 having a first end electrically coupled to the bottom electrode and a second end electrically coupled to the second source/drain region so as to electrically connect the capacitor to the second source/drain region,
wherein the capacitor is disposed in the second dielectric layer such that the capacitor is positioned above the bit line,
wherein the capacitor dielectric structure comprises a first metal oxide layer ([0085]: lowermost portion, i.e. ZrO2), a second metal oxide layer (lower portion, i.e. Al2O3) disposed over the first metal oxide layer, and a third metal oxide layer (upper portion, i.e. HfO2) disposed over the second metal oxide layer,
wherein the capacitor dielectric structure further comprises a fourth metal oxide layer (topmost portion, i.e. SiO2) disposed over the third metal oxide layer,
wherein top ends of the first metal oxide layer, top ends of the second metal oxide layer, top ends of the capacitor dielectric structure are coplanar with each other.
Chien does not disclose the third metal oxide layer comprises ZrO2 doped with a (first) dopant selected from the group consisting of Hf, Ta, La, Gd, Y, Sc, Ga, and lanthanide elements (claims 3 and 9); a concentration of the dopant in the third metal oxide layer is less than a concentration of Zr in the third metal oxide layer (claim 4); an atomic percentage of the dopant in the third metal oxide layer is less than 20% (claim 5); the capacitor dielectric structure further comprises a fifth metal oxide layer disposed over the fourth metal oxide layer (claims 6 and 14), wherein the first metal oxide layer, the fourth metal oxide layer, and the fifth metal oxide layer are made of different materials (claim 6); the fourth metal oxide layer comprise Al2O3 (claims 7 and 13); the fifth metal oxide layer and the third metal oxide layer comprise ZrO2 doped with a (second) dopant selected from the group consisting of Hf, Ta, La, Gd, Y, Sc, Ga, and lanthanide elements (claims 8 and 14); a crystallinity of the first metal oxide layer is higher than a crystallinity of the third metal oxide layer (claim 10); and the first dopant and the second dopant are the same (claim 15).
Wei et al. teach in Figs. 2B (stack layers of the capacitor structure), 9 (structures other than 110) and related text:
As for claims 3 and 9, the third metal oxide layer comprises ZrO2 doped with a first dopant selected from the group consisting of Hf, Ta, La, Gd, Y, Sc, Ga, and lanthanide elements ([0023]).
As for claim 4, a concentration of the dopant in the third metal oxide layer is less than a concentration of Zr in the third metal oxide layer ([0023], lines 46-48, when FSL120a excludes a dopant and FSL120b includes a dopant).
As for claim 5, an atomic percentage of the dopant in the third metal oxide layer is less than 20%. ([0023], lines 46-48).
As for claim 6, the capacitor dielectric structure further comprises a fifth metal oxide layer disposed over the fourth metal oxide layer, wherein the first metal oxide layer, the fourth metal oxide layer, and the fifth metal oxide layer are made of different materials (Fig. 2B; [0023]).
As for claims 7 and 13, the fourth metal oxide layer and the second metal oxide layer comprise Al2O3 ([0028]).
As for claims 8 and 14, (the capacitor dielectric structure further comprises a fifth metal oxide layer disposed over the fourth metal oxide layer, and) the fifth metal oxide layer and the third metal oxide layer comprise ZrO2 doped with a second dopant selected from the group consisting of Hf, Ta, La, Gd, Y, Sc, Ga, and lanthanide elements (Fig. 2B; [0023]).
As for claim 10, a crystallinity of the first metal oxide layer is higher than a crystallinity of the third metal oxide layer ([0023], lines 46-48; [0025], lines 27-28; note: crystallinity reduces as the impurity concentration is higher or as the thickness is lower).
As for claim 15, the first dopant and the second dopant are the same ([0028]).
Chien and Wei et al. are analogous art because they are directed to a capacitor structure and one of ordinary skill in the art would have had a reasonable expectation of success to modify Chien with the specified feature(s) of Wei et al. because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to include the third metal oxide layer comprising ZrO2 doped with a (first) dopant selected from the group consisting of Hf, Ta, La, Gd, Y, Sc, Ga, and lanthanide elements; a fifth metal oxide layer disposed over the fourth metal oxide layer, wherein the first metal oxide layer, the fourth metal oxide layer, and the fifth metal oxide layer being made of different materials; a concentration of the dopant in the third metal oxide layer being less than a concentration of Zr in the third metal oxide layer; an atomic percentage of the dopant in the third metal oxide layer being less than 20%; the fourth metal oxide layer and the second metal oxide layer comprising Al2O3; the fifth metal oxide layer and the third metal oxide layer comprising ZrO2 doped with a (second) dopant selected from the group consisting of Hf, Ta, La, Gd, Y, Sc, Ga, and lanthanide elements; a crystallinity of the first metal oxide layer being higher than a crystallinity of the third metal oxide layer; and the first dopant and the second dopant being the same, as taught by Wei et al., in Chien's device, in order to increase dielectric constant, reduce crystallinity, minimize leakage current, optimize the performance of the device and reduce cost of the device.
Generally, differences in concentration do not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such concentration is critical. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 105 USPQ 233, 235 (CCPA 1955). See also In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969). For more recent cases applying this principle, see Merck & Co. Inc. v. Biocraft Laboratories Inc., 874 F.2d 804, 10 USPQ2d 1843 (Fed. Cir.), cert. denied, 493 U.S. 975 (1989), and In re Kulling, 897 F.2d 1147, 14 USPQ2d 1056 (Fed. Cir. 1990).
Furthermore, it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Furthermore, it has been held in that the applicant must show that a particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). Note that the law is replete with cases in which when the mere difference between the claimed invention and the prior art is some dimensional limitation or other variable within the claims, patentability cannot be found. The instant disclosure does not set forth evidence ascribing unexpected results due to the claimed dimensions. See Gardner v. TEC Systems, Inc., 725 F.2d 1338 (Fed. Cir. 1984), which held that the dimensional limitations failed to point out a feature which performed and operated any differently from the prior art.
Furthermore, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960).
As for claim 11, the combined device shows the top electrode and the bottom electrode of the capacitor comprise TiN (Chien: [0085]; Wei: [0022]).
As for claim 12, the combined device shows the first metal oxide layer comprises ZrO2, and the second metal oxide layer comprises Al2O3 (Chien: [0085]; Wei: [0023]-[0024]).
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-15 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/MEIYA LI/Primary Examiner, Art Unit 2811