DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on October 14, 2025 has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1, 3, 6-8, 18, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent No. 8,089,145 B1 to Kim et al. (“Kim”) in view of U.S. Patent Application Publication No. 2021/0366732 A1 to Chiang et al. (“Chiang”). As to claim 1, although Kim discloses a method, comprising: arranging (FIG. 5C) a semiconductor integrated circuit chip (210) on a first surface of a die pad (110) in a substrate (100), the substrate (100) comprising an array of first electrically conductive leads (156) extending away from the die pad (110); encapsulating (FIG. 5E) the substrate (100) and semiconductor integrated circuit chip (210) in an encapsulation (230) of laser direct structuring (LDS) material comprising a molding compound (230), wherein the encapsulation (230) has a first surface, a second surface opposed to the first surface and a peripheral surface between the first surface and the second surface, wherein the array of first electrically conductive leads (156) protrudes from the peripheral surface of the encapsulation (230) with areas of the second surface of the encapsulation (230) arranged between adjacent ones of the first electrically conductive leads (156); and applying a laser beam (FIG. 5F) to areas of the second surface of the encapsulation (230) located between adjacent ones of the first electrically conductive leads (156) to form an array of second electrically conductive leads (146, 176) exposed at the second surface of the encapsulation (230) (See Fig. 5, Column 10, lines 2-5, Column 11, lines 16-67, Column 12, lines 1-67, Column 13, lines 1-12) (Notes: the encapsulation is processed/structured by laser to meet the recited “LDS material”), Kim does not further disclose wherein the molding compound is with a filler additive that is adapted to be activated by laser radiation and applying the laser beam to activate the filler additive and transfer an electrically-conductive pattern onto the molding compound for forming the array of second electrically conductive leads. However, Chiang does disclose wherein the molding compound (110) is with a filler additive that is adapted to be activated by laser radiation and applying the laser beam to activate the filler additive and transfer an electrically-conductive pattern onto the molding compound (110) for forming the array of second electrically conductive leads (114, 116, 118) (See Fig. 1, Fig. 2, ¶ 0031, ¶ 0036-¶ 0045, ¶ 0051). In view of the teaching of Chiang, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teaching of Kim to have wherein the molding compound is with a filler additive that is adapted to be activated by laser radiation and applying the laser beam to activate the filler additive and transfer an electrically-conductive pattern onto the molding compound for forming the array of second electrically conductive leads because the molding compound with the filler additive that is adapted to be activated by laser radiation allows the precise formation of the array of second electrically conductive leads in small areas, where the exposed metal complexes are capable of acting as a nuclei for metal plating process such that the second electrically conductive leads are precisely defined (See ¶ 0042-¶ 0045). As to claim 3, Kim discloses further comprising providing an electrical connection pattern (220, 240) between the semiconductor integrated circuit chip (210) and the array of first electrically conductive leads (156) and the array of second electrically conductive leads (146, 176) (See Fig. 5). As to claim 6, Kim in view of Chiang discloses further comprising, after applying the laser beam growing electrically conductive material at the electrically-conductive pattern (See Chiang ¶ 0043, ¶ 0044). As to claim 7, Kim discloses further comprising bending the array of first electrically conductive leads (156) protruding from the peripheral surface the encapsulation (230) to provide lead distal portions (at top bent portion outside 230) substantially co-planar with the array of second electrically conductive leads (146, 176) exposed at the second surface of the encapsulation (230) (See Fig. 5, Column 12, lines 41-57). As to claim 8, Kim discloses further comprising trimming the first electrically conductive leads (156) protruding from the peripheral surface the encapsulation (230) (See Fig. 5, Column 12, lines 9-24). As to claim 18, although Kim discloses a method, comprising: mounting (FIG. 5C) a semiconductor integrated circuit chip (210) on a first surface of a die pad (110) in a leadframe (100) that further includes first electrically conductive leads (156); encapsulating the die pad (110), semiconductor integrated circuit chip (210) and proximal ends of the first electrically conductive leads (156) in an encapsulation (230) of laser direct structuring (LDS) material comprising a molding compound (230); wherein distal ends of the first electrically conductive leads (156) protrude from the encapsulation (230); applying a laser beam to areas of a lower surface of the encapsulation (230) to form an array of second electrically conductive leads (146, 176) exposed at the lower surface of the encapsulation (230) (See Fig. 5, Column 10, lines 2-5, Column 11, lines 16-67, Column 12, lines 1-67, Column 13, lines 1-12) (Notes: the encapsulation is processed/structured by laser to meet the recited “LDS material”), Kim does not further disclose wherein the molding compound is with a filler additive that is adapted to be activated by laser radiation and applying the laser beam to activate the filler additive and transfer an electrically-conductive pattern onto the lower surface of the encapsulation for forming the array of second electrically conductive leads. However, Chiang does disclose wherein the molding compound (110) is with a filler additive that is adapted to be activated by laser radiation and applying the laser beam to activate the filler additive and transfer an electrically-conductive pattern onto the lower surface of the encapsulation (110) for forming the array of second electrically conductive leads (114, 116, 118) (See Fig. 1, Fig. 2, ¶ 0031, ¶ 0036-¶ 0045, ¶ 0051). In view of the teaching of Chiang, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teaching of Kim to have wherein the molding compound is with a filler additive that is adapted to be activated by laser radiation and applying the laser beam to activate the filler additive and transfer an electrically-conductive pattern onto the lower surface of the encapsulation for forming the array of second electrically conductive leads because the molding compound with the filler additive that is adapted to be activated by laser radiation allows the precise formation of the array of second electrically conductive leads in small areas, where the exposed metal complexes are capable of acting as a nuclei for metal plating process such that the second electrically conductive leads are precisely defined (See ¶ 0042-¶ 0045). As to claim 20, Kim further discloses wherein each second electrically conductive lead (146, 176) is positioned between an adjacent pair of first electrically conductive leads (156) (See Fig. 5).
Claim(s) 2 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent No. 8,089,145 B1 to Kim et al. (“Kim”) and U.S. Patent Application Publication No. 2021/0366732 A1 to Chiang et al. (“Chiang”) as applied to claims 1 and 18 above, and further in view of U.S. Patent Application Publication No. 2015/0162260 A1 to Liao (“Liao”). The teachings of Kim and Chiang have been discussed above. As to claim 2, although Kim discloses wherein the die pad (110) has a second die pad surface opposed to the first die pad surface, and wherein the array of second electrically conductive leads (146, 176) is arranged around the second die pad surface (See Fig. 5), Kim and Chiang do not further disclose the second die pad surface left exposed at the second surface of the encapsulation. However, Liao does disclose the second die pad surface left exposed at the second surface of the encapsulation (140) (See Fig. 1, ¶ 0032, ¶ 0033, ¶ 0034). In view of the teaching of Liao, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Kim and Chiang to have the second die pad surface left exposed at the second surface of the encapsulation because exposing the second die pad surface provides better heat dissipation efficiency to the surroundings (See ¶ 0034). As to claim 19, Kim in view of Chiang and Liao further discloses wherein encapsulating further comprises leaving a second surface of the die pad (110/130), which is opposite the first surface, exposed at the lower surface of the encapsulation (230/140) (See Kim Fig. 5 and Liao Fig. 1, ¶ 0032, ¶ 0033, ¶ 0034) such that exposing the second surface of the die pad provides better heat dissipation efficiency to the surroundings.
Claim(s) 5 and 21-22 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent No. 8,089,145 B1 to Kim et al. (“Kim”) and U.S. Patent Application Publication No. 2021/0366732 A1 to Chiang et al. (“Chiang”) as applied to claims 1 and 18 above, and further in view of U.S. Patent Application Publication No. 2019/0115287 A1 to Derai et al. (“Derai”). The teachings of Kim and Chiang have been discussed above. As to claim 5, Kim in view of Chiang and Derai discloses further comprising applying the laser beam to the first surface of the encapsulation (230/16) of LDS material to activate the filler additive for forming first electrically conductive vias (24) extending through the encapsulation material between the first surface of the encapsulation (230/16) and selected ones of the leads (156/14) in one or more of the array of first electrically conductive leads (156/14) and the array of second electrically conductive leads (146, 176/14); second electrically conductive vias (22) extending through the encapsulation material between the first surface of the encapsulation (230/16) and the semiconductor integrated circuit chip (210/12); and a routing of electrically conductive lines (26) electrically coupling selected ones of the first electrically conductive vias (24) with selected ones of the second electrically conductive vias (22) (See Kim Fig. 5, Chiang, and Derai Fig. 2, Fig. 3, Fig. 4, ¶ 0007-¶ 0012, ¶ 0065-¶ 0090) such that flexibility in terms of current distribution and/or integrating passive components is increased with improvement in performance. As to claim 21, Kim in view of Chiang and Derai discloses further comprising further applying the laser beam to areas of an upper surface of the encapsulation (230/16), which is opposite to the lower surface, to activate the filler additive and transfer an electrically-conductive pattern onto the upper surface of the encapsulation (230/16) for forming a plurality of electrically conductive lines (26) configured to electrically couple the first electrically conductive leads (156/14) to the semiconductor integrated circuit chip (210/12) (See Kim Fig. 5, Chiang, and Derai Fig. 2, Fig. 3, Fig. 4, ¶ 0007-¶ 0012, ¶ 0065-¶ 0090) such that flexibility in terms of current distribution and/or integrating passive components is increased with improvement in performance. As to claim 22, Kim in view of Chiang and Derai discloses further comprising applying the laser beam to activate the filler additive and form first vias (24) connecting to the first electrically conductive leads (156/14) and second vias (22) connecting to the semiconductor integrated circuit chip (210/12) (See Kim Fig. 5, Chiang, and Derai Fig. 3).
Response to Arguments
Applicant's arguments with respect to claims 1 and 18 have been considered but are moot in view of the new ground(s) of rejection.
Conclusion
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/DAVID CHEN/Primary Examiner, Art Unit 2815