DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 3/6/2026 has been entered.
Claims’ Status
Claims 1-16 and 21-24 are currently pending and being examined. Claims 1, 10, 21, and 23 have been amended. No new claims have been added or cancelled.
Claim Objections
Claims 10 and 21 are objected to because of the following informalities:
Re Claim 10, line 12 includes the wording “the heating process”, wherein “a heating process” was not previously established (improper antecedent basis). For the purposes of examination, “the heating process” will be interpreted as “a heating process”.
Re Claim 21, line 6 includes the wording “through a shower head and impinge on the transition metal layer”, which is grammatically incorrect and therefore assumed to be a typo for “through a shower head to impinge on the transition metal layer”.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 12-14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Re Claim 12, it is unclear whether “a heating process” in line 4 is in reference to “the heating process” in line 12 of Claim 10 (see also objection of Claim 10 above) or a separate distinct heating process. Claim 12 is thus rendered indefinite, but for the purposes of examination, “a heating process” in line 4 will be assumed to be referring to “the heating process” in line 12 of Claim 10.
Re Claim 14, it is unclear whether “an annealing process” in line 3 and “the annealing reference” in line 4 are in reference to “an annealing process” in line 11 of Claim 10 or a separate distinct annealing process. It is also unclear which heating process “the heating process” in lines 3-5 is referring to. Additionally, “the heating temperature” does not have antecedent basis, and therefore should be “a heating temperature of the heating process” or alternatively “the temperature of the heating process” (the latter if it is in reference to Claim 10’s heating process). Claim 14 is thus rendered indefinite, but for the purposes of examination, “an annealing process” in line 4 will be assumed to be referring to “an annealing process” in line 11 of Claim 10 and “the heating process” in lines 3-5 will be assumed to be referring to “the heating process” in line 12 of Claim 10.
Claim 13 is rejected as a result of being dependent from Claim 12.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-5 and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Cannara et al (US 2017/0011915 A1, of record, hereafter Cannara) in view of Yoo et al (US 2022/0406911 A1, of record, hereafter Yoo), Ishizaka (US 2018/0254181 A1), and Yang et al (US 2019/0139835 A1, of record, hereafter Yang).
Re Claim 1, Cannara discloses a method for manufacturing a semiconductor device (FIGS. 1-4; [0021]-[0046]), comprising:
forming a transition metal layer (120; [0021]) over the substrate (110; [0021]);
flowing a chalcogen-containing fluid (130; [0021]-[0023]) over the transition metal layer (120; [0021]-[0023]) to directly impinge on the transition metal layer (120; [0023]); and
performing a heating process ([0045]) over the transition metal layer (120; [0045]) with the chalcogen-containing fluid (130; [0045]) to transform the transition metal layer (120) into a two-dimensional (2D) material layer (140; [0021]) over the substrate (110; [0021]).
Cannara does not explicitly disclose:
wherein the substrate (110) is an insulating layer;
forming a trench in an insulating layer;
wherein the transition metal layer (120) covers an upper surface of the insulating layer, a sidewall and a horizontal bottom surface of the trench;
flowing a chalcogen-containing fluid (130) downward through a shower head to directly impinge on the transition metal layer (120) covering the sidewall and the bottom surface of the trench;
wherein the 2D material layer (140) covers the upper surface of the insulating layer, the sidewall of the trench; and
doping the 2D material layer (140) and forming a P-type device or a N-type device.
However, Yoo teaches a method for manufacturing a semiconductor device (FIGS. 15A-C, FIG. 16C; [0101]-[0114]), comprising:
wherein the substrate (510; [0102]) is an insulating layer (510; [0094]);
forming a trench (510a; FIG. 15A; [0102]) in an insulating layer (510; [0094], [0102]);
wherein the transition metal layer (520; FIG. 15A; [0102]) covers an upper surface of the insulating layer (520; [0102]), a sidewall and a horizontal bottom surface of the trench (510a; [0102]);
wherein the 2D material layer (550; [0104]) covers the upper surface of the insulating layer (520; [0104]), the sidewall of the trench (510a; [0104]).
Additionally, Ishizaka teaches a method for manufacturing a device ([0082]-[0093]) comprising flowing a fluid (“gas”; [0093], not chalcogen-containing, but the mechanic is the same) downward through a shower head (110; [0093]) to directly impinge on the transition metal layer (“base film”; [0029]]) covering the sidewall and the bottom surface of the trench (“trench”; [0093], conformal film formation).
Additionally, Yang teaches a method (FIG. 12; [0121]-[0130]) for manufacturing a semiconductor device, comprising:
doping the 2D material layer (1206; [0130]) and forming a P-type device or a N-type device ([0130], with 1207/1208 being metal source/drain electrodes, see [0076] for metal composition).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the limitations taught by Cannara with the limitations taught by Yoo to form a trench (Yoo: 510a) in an insulating layer (Yoo: 510) in which a 2D material (Cannara: 140) is formed to form a gate structure (Yoo: GS) as taught by Yoo ([0107]).
It would also have been obvious to modify the limitations taught by Cannara and Yoo with the limitations taught by Ishizaka to utilize a shower head (Ishizaka: 110) to impinge the fluid onto the transition metal layer (Cannara: 120) as a functionally equivalent means of providing conformal contact of a gas onto a base layer with a trench as taught by Ishizaka ([0093]). It would also have been obvious to modify the limitations taught by Cannara, Yoo, and Ishizaka with the limitations taught by Yang to dope the 2D material layer (Cannara: 140) to reduce contact resistance between the 2D material layer (Cannara: 140) and the metal source/drain electrodes (Yang: 1207, 1208) as taught by Yang ([0004]).
Re Claim 2, Cannara, Yoo, Ishizaka, and Yang teach the method according to Claim 1, while Cannara further teaches wherein a material of the transition metal layer (120) comprises Titanium, Zirconium, Hafnium, Vanadium, Niobium, Tantalum, Molybdenum, Tungsten, Technetium, Rhenium, Cobalt, Rhodium, Iridium, Nickel, or Palladium ([0032]).
Re Claim 3, Cannara, Yoo, Ishizaka, and Yang teach the method according to Claim 1, while Cannara further teaches wherein a material of the chalcogen-containing fluid (130) comprises Sulfur, Selenium, or Tellurium, hydrogen sulfide, (Methyldisulfanyl) methane (DMDS), Hydrogen Selenide ([0035]).
Re claim 4, Cannara, Yoo, Ishizaka, and Yang teach the method according to Claim 1, while Cannara further teaches wherein a heating temperature of the heating process is substantially equal to or greater than 400 °C ([0037]).
Re Claim 5, Cannara, Yoo, Ishizaka, and Yang teach the method according to Claim 1, while Cannara further teaches wherein the heating process is performed while the chalcogen-containing fluid (130) flows over the transition metal layer (120; [0044]-[0045]).
Re Claim 22, Cannara, Yoo, Ishizaka, and Yang teach the method according to Claim 1, while Yang further teaches wherein doping the 2D material layer (1206) further comprises exposing the 2D material layer under N2 gas for forming the P-type device, or doping the 2D material layer (1206) with potassium for forming the N-type device ([0055]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the method according to Claim 1 with the limitations taught by Yang to dope the 2D material layer (Cannara: 140) with potassium to reduce contact resistance between the 2D material layer (Cannara: 140) and the metal source/drain electrodes (Yang: 1207, 1208) for a N-type device as taught by Yang ([0004]).
Claims 6-9 are rejected under 35 U.S.C. 103 as being unpatentable over Cannara, Yoo, Ishizaka, and Yang as applied to Claim 1 further in view of Jahangir et al (US 2018/0226248 A1, hereafter Jahangir).
Re claim 6, Cannara, Yoo, Ishizaka, and Yang teach the method according to Claim 1, but they do not explicitly disclose the method further comprising performing an annealing process after the heating process.
However, Jahangir teaches a method ([0051]-[0053]) for manufacturing a semiconductor device, comprising performing an annealing process ([0053]) after the heating process ([0051]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the method as discussed for Claim 1 by substituting in the transformation process of Jahangir and using an annealing process with a higher temperature after the heating process to improve the crystallinity and quality of the 2D material layer (Yoo: 550) as taught by Jahangir ([0053]).
Re Claim 7, Cannara, Yoo, Ishizaka, Yang, and Jahangir teach the method according to Claim 6, while Jahangir teaches wherein a process temperature of the annealing process ([0053]) is higher than the heating temperature of the heating process ([0051]).
No further modifications made, see Claim 6 for obviousness statement.
Re Claim 8, Cannara, Yoo, Ishizaka, Yang, and Jahangir teach the method according to Claim 6, while Cannara further teaches wherein the transition metal layer (120) is formed by physical vapor deposition, chemical vapor deposition, or atomic layer deposition ([0024]).
Re Claim 9, Cannara, Yoo, Ishizaka, Yang, and Jahangir teach the method according to Claim 6, while Cannara further teaches wherein the 2D material layer (140) comprises TaS2, TiS2, MoS2 ([0039]), SeS2, WSe2, WS2, TeS2, or MoSe2.
Claims 10-16 are rejected under 35 U.S.C. 103 as being unpatentable over Yoo in view of Jezewski et al (US 2020/0219804 A1, of record, hereafter Jezewski) and Jahangir.
Re Claim 10, Yoo discloses in a first embodiment a method for manufacturing a semiconductor device (FIGS. 15A-C, FIG. 16C; [0101]-[0114]) comprising:
forming a trench (510a; FIG. 15A; [0102]) in an insulating layer (510; [0094], [0102]);
forming a transition metal layer (520; FIG. 15A; [0102]) over the insulating layer (510; [0102]);
performing a transforming process to transform the transition metal layer (520) into a two-dimensional (2D) material layer (550; FIGS. 15B-C; [0103]-[0104]), wherein the 2D material layer (550) covers an upper surface of the insulating layer (520; [0104]), a sidewall of the trench (510a; [0104]).
Yoo does not explicitly disclose in the first embodiment the method further comprises:
forming a trench (510a) in an insulating layer (510) is over a substrate;
wherein only a portion of the transition metal layer (520) is transformed; and
performing an annealing process on the 2D material layer (550), wherein a temperature of the annealing process is higher than a temperature of the heating process.
However, Jezewski teaches a method for manufacturing a semiconductor device (FIGS. 4B, 5E-5M; [0045]-[0049]), comprising forming a trench (518; [0045]) in an insulating layer (512; [0045]) over a substrate (“substrates”; [0025]).
Additionally, Yoo teaches in a separate second embodiment (FIGS. 9A-9B; [0085]) wherein only a portion of the transition metal layer (220, top portion; [0085]) is transformed ([0085]).
Additionally, Jahangir teaches a method ([0051]-[0053]) for manufacturing a semiconductor device, comprising performing an annealing process on the 2D material layer (“transition metal dichalcogenide (TMD) structure”; [0053]), wherein a temperature of the annealing process ([0053]) is higher than a temperature of the heating process ([0051]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the limitations taught by the first embodiment of Yoo with the limitations taught by Jezewski to form the trench (Yoo: 510a) in an insulating layer (Yoo: 510) over a substrate (Jezewski: “substrates”) to have the trench-2D structure incorporated into a larger layered semiconductor device as taught by Jezewski ([0025]). It would also have been obvious to modify the limitations taught by the first embodiment of Yoo and Jezewski with the limitations taught by the second embodiment of Yoo by using a thicker transition metal layer (Yoo: 220), as doing so yields the predictable result of only transforming a portion of the transition metal layer (Yoo: 520) while still yielding a distinct 2D material layer as taught by Yoo ([0085]).
It would also have been obvious to modify the limitations taught by Yoo and Jezewski by substituting in the transformation process of Jahangir by using a chalcogen-containing fluid to yield the predictable result and end function of transforming a transition metal layer (Yoo: 520) into a 2D material layer (Yoo: 550) as taught by Jahangir ([0051]). Using an annealing process with a temperature higher than the heating process would have been obvious as well to improve the crystallinity and quality of the 2D material layer (Yoo: 550) as taught by Jahangir ([0053]).
Re Claim 11, Yoo, Jezewski, and Jahangir teach the method according to Claim 10, while Yoo further teaches wherein the transition metal layer (520) comprises Titanium (Ti), Zirconium (Zr), Hafnium (Hf), Vanadium (V), Niobium (Nb), Tantalum (Ta), Molybdenum (Mo) ([0085]), Tungsten (W), Technetium (Tc), Rhenium (Re), Cobalt (Co), Rhodium (Rh), Iridium (Ir), Nickel (Ni), or Palladium (Pd).
Re Claim 12, Yoo, Jezewski, and Jahangir teach the method according to Claim 10, wherein Jahangir further teaches the transforming process ([0052]) comprises flowing a chalcogen-containing fluid (“chalcogen gas”; [0052]) over the transition metal layer (“transition metal layer”; [0050]) while performing a heating process ([0052]).
No further modifications made, see Claim 10 for obviousness statement.
Re Claim 13, Yoo, Jezewski, and Jahangir teach the method according to Claim 12, where Jahangir further teaches wherein a material of the chalcogen-containing fluid (“chalcogen gas”) comprises Sulfur ([0052]), Selenium, or Tellurium, hydrogen sulfide, (Methyldisulfanyl) methane (DMDS), Hydrogen Selenide.
No further modifications made, see Claim 10 for obviousness statement.
Re Claim 14, Yoo, Jezewski, and Jahangir teach the method according to Claim 12, where Jahangir further teaches the transforming process comprises performing an annealing process ([0053]) after the heating process ([0051]), wherein a process temperature of the annealing process ([0053]) is higher than the heating temperature of the heating process ([0051]).
No further modifications made, see Claim 10 for obviousness statement.
Re Claim 15, Yoo, Jezewski, and Jahangir teach the method according to claim 10, wherein Yoo further teaches the 2D material layer (550) comprises TaS2, TiS2, MoS2 ([0096]), SeS2, WSe2 WS2, TeS2, or MoSe2.
Re Claim 16, Yoo, Jezewski, and Jahangir teach the method according to claim 10, wherein Yoo further teaches:
forming a gate dielectric (GIL; FIG. 16C; [0110]) over a portion of the 2D material layer (550, portion on and around trench 510a; [0110]);
forming a gate electrode (GE; FIG. 16C; [0111]) over the gate dielectric (GIL; [0111]) along the sidewall of the trench (510a; [0111]);
forming a plurality of source/drain contacts (S, D; FIG. 16C; [0111]) over the 2D material layer (550, portion outside of trench 510a; [0111]).
Claims 21 and 23-24 are rejected under 35 U.S.C. 103 as being unpatentable over Yoo in view of Jahangir and Ishizaka.
Re Claim 21, Yoo discloses a method for manufacturing a semiconductor device (FIGS. 15A-C, FIG. 16C; [0101]-[0114]) comprising:
forming a trench (510a; FIG. 15A; [0102]) in an insulating layer (510; [0094], [0102]);
forming a transition metal layer (520; FIG. 15A; [0102]) conformally covering the insulating layer (510; [0102]);
performing a transforming process to transform the transition metal layer (520) into a 2D material layer (550; FIGS. 15B-C; [0103]-[0104]);
forming a gate dielectric (GIL; FIG. 16C; [0110]) over a first portion of the 2D material layer (550, portion on and around trench 510a; [0110]), wherein the 2D material layer (550) is interposed between the gate dielectric (GIL) and the insulating layer (510; [0110]).
Yoo does not explicitly disclose the method further comprising flowing a chalcogen-containing fluid over the transition metal layer (520) downward through a shower head and impinge on the transition metal layer (520) covering the sidewall and the bottom surface of the trench (510a).
Additionally, Jahangir teaches a method ([0051]-[0053]) for manufacturing a semiconductor device, comprising flowing a chalcogen-containing fluid (“sulfur” gas; [0051]) over the transition metal layer (“transition metal layer”; [0050]).
Additionally, Ishizaka teaches a method for manufacturing a device ([0082]-[0093]) comprising flowing a fluid (“gas”; [0093], not chalcogen-containing, but the mechanic is the same) downward through a shower head (110; [0093]) to impinge on the transition metal layer (“base film”; [0029]]) covering the sidewall and the bottom surface of the trench (“trench”; [0093], conformal film formation).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the limitations taught by Yoo with the limitations taught by Jahangir to substitute in the transformation process of Jahangir by using a chalcogen-containing fluid (Jahangir: “sulfur” gas) to yield the predictable result and end function of transforming a transition metal layer (Yoo: 520) into a 2D material layer (Yoo: 550) as taught by Jahangir ([0052]).
It would also have been obvious to modify the limitations taught by Yoo and Jahangir with the limitations taught by Ishizaka to utilize a shower head (Ishizaka: 110) to impinge the fluid onto the transition metal layer (Yoo: 520) as a functionally equivalent means of providing conformal contact of a gas onto a base layer with a trench as taught by Ishizaka ([0093]).
Re Claim 23, Yoo, Jahangir, and Ishizaka teach the method according to Claim 21, while Yoo further discloses forming a source/drain contact (S, D; FIG. 16C; [0111]) over a second portion of the 2D material layer (550, portion outside of trench 510a; [0111]) that is not covered by the gate dielectric (GIL; [0111]).
Re Claim 24, Yoo, Jahangir, and Ishizaka teach the method according to Claim 21, while Yoo further discloses forming a gate electrode (GE; FIG. 16C; [0111]) over a portion of the gate dielectric (GIL; [0111]) and filling the trench (510a; [0111]).
Response to Arguments
Applicant’s arguments, see Remarks pg. 2, para. 8 to pg. 3, para. 2, filed 3/6/2026, with respect to the rejections of Claims 1 and 21 under 35 U.S.C. 103 have been fully considered and persuasive. Therefore, the rejections have been withdrawn. However, upon further consideration, new ground(s) of rejection are made in view of Cannara, Yoo, Ishizaka, and Yang for Claim 1 and in view of Yoo, Jahangir, and Ishizaka for Claim 21, under 35 U.S.C. 103. The new ground(s) of rejection do not rely on any reference applied in the prior rejections of record for Claims 1 and 21 for any teaching or matter specifically challenged in the argument.
Applicant’s arguments, see Remarks pg. 3, paras. 3-4, filed 3/6/2026, with respect to the rejection of Claim 10 under 35 U.S.C. 103 have been fully considered and persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, new ground(s) of rejection are made in view of Yoo, Jezewski, and Jahangir for Claim 10 under 35 U.S.C. 103. The new ground(s) of rejection do not rely on any reference applied in the prior rejections of record for Claim 10 for any teaching or matter specifically challenged in the argument.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to COLIN RUSSELL MCCUTCHEON whose telephone number is (703)756-1897. The examiner can normally be reached Monday-Friday, 12:30-9:30 EST.
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/COLIN RUSSELL MCCUTCHEON/Examiner, Art Unit 2892
/NORMAN D RICHARDS/Supervisory Patent Examiner, Art Unit 2892
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