Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Detailed Action
Claim Rejections – 35 U.S.C. 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-20 rejected under 35 U.S.C. 103 as being unpatentable over Su (U.S. Patent Pub. No. 2022/0181327), in view of Kwon (U.S. Patent Pub. No. 2022/0085150).
Regarding Claim 1
FIG. 1 of Su discloses a semiconductor device, comprising: a substrate (12); a lower supporting layer (131) disposed on the substrate; an upper supporting layer (135) disposed on the lower supporting layer, wherein the lower supporting layer and the upper supporting layer are spaced apart from each other, wherein the upper supporting layer defines an opening; and a lower electrode (40) disposed within the opening of the upper supporting layer, wherein the lower electrode has a bottom disposed at a bottom of the opening, a first portion (left) with a first vertical length and a second portion (right) with a second vertical length, wherein the first portion and the second portion of the lower electrode are upwardly extended from the bottom thereof and are spaced apart from each other, wherein the first vertical length is defined as a height of the first portion from the base while the second vertical length is defined as a height of the second portion from the base.
Su is silent with respect to “a first portion with a first vertical length and a second portion with a second vertical length different from the first vertical length”.
FIG. 6 of Kwon discloses a similar semiconductor device, comprising a lower electrode (LE) disposed within the opening of the upper supporting layer (SL2), wherein the lower electrode has a bottom disposed at a bottom of the opening (FIG. 7), a first portion (V2) with a first vertical length (L2) and a second portion (V1) with a second vertical length (L1), wherein the first portion and the second portion of the lower electrode are upwardly extended from the bottom thereof and are spaced apart from each other, wherein the first vertical length is defined as a height of the first portion from the base while the second vertical length is defined as a height of the second portion from the base.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Su, as taught by Kwon. The ordinary artisan would have been motivated to modify Su in the above manner for purpose of forming a capacitor with high aspect ratio and improved reliability ([0005] of Kwon).
Regarding Claim 2
FIG. 6 of Kwon discloses the first portion (V2) of the lower electrode is closer to a sidewall of the upper supporting layer (SL2) than the second portion (V1) of the lower electrode is, wherein the first portion of the lower electrode is in contact with the lower supporting layer (SL1) and the upper supporting layer, wherein the second portion of the lower electrode is spaced apart from the lower supporting layer and the upper supporting layer.
Regarding Claim 3
FIG. 7 of Kwon discloses the first vertical length (L2) is greater than the second vertical length (L1).
Regarding Claim 4
FIG. 6 of Kwon discloses an upper electrode formed over the upper supporting layer, wherein the upper electrode is filled in an opening between the first portion and the second portion of the lower electrode.
Regarding Claim 5
FIG. 6 of Kwon discloses the second portion of the lower electrode is spaced apart from the sidewall of the upper supporting layer.
Regarding Claim 6
FIG. 7 of Kwon discloses the first portion of the lower electrode has a first upper surface at a first horizontal level, and the second portion of the lower electrode has a second upper surface at a second horizontal level different from the first horizontal level.
Regarding Claim 7
FIG. 7 of Kwon discloses the first horizontal level is higher than the second horizontal level.
Regarding Claim 8
FIG. 1 of Su discloses a capacitor dielectric (50) conformally disposed on the lower supporting layer, the upper supporting layer, and the lower electrode; and an upper electrode disposed on the capacitor dielectric over the upper supporting layer and filled in an opening between the first portion and the second portion of the lower electrode; wherein a first distance between an upper surface of the upper electrode and the first upper surface of the lower electrode is different from a second distance between the upper surface of the upper electrode and the second upper surface of the lower electrode, and the first distance is lower than the second distance.
Regarding Claim 9
FIG. 6 of Kwon discloses the capacitor dielectric has a first upper surface at a third horizontal level and a second upper surface at a fourth horizontal level different from the third horizontal level.
Regarding Claim 10
FIG. 1 of Su discloses the first upper surface of the lower electrode is substantially coplanar with an upper surface of the upper supporting layer.
Regarding Claim 11
FIG. 5 of Kwon discloses the first portion (V2) and the second portion (V1) of the lower electrode collectively define a ring-shaped profile in a top view.
Regarding Claim 12
FIG. 1 of Su discloses a semiconductor device, comprising: a substrate (12); a lower supporting layer (131) disposed on the substrate; an upper supporting layer (135) disposed on the lower supporting layer, wherein the upper supporting layer defines an opening, wherein the lower supporting layer and the upper supporting layer are spaced apart from each other; and a lower electrode (40) disposed within the opening of the upper supporting layer.
Su is silent with respect to “the lower electrode has a first upper surface at a first horizontal level and a second upper surface at a second horizontal level different from the first horizontal level”; “the first upper surface of the lower electrode is coplanar with an upper surface of the upper supporting layer: wherein the second horizontal level is lower than the first horizontal level and is lower than the upper surface ofthe upper supporting layer”.
FIG. 6 of Kwon discloses a similar semiconductor device, comprising a lower electrode (LE) disposed within the opening of the upper supporting layer (SL2), wherein the lower electrode has a first upper surface at a first horizontal level and a second upper surface at a second horizontal level different from the first horizontal level; the first upper surface of the lower electrode is coplanar with an upper surface of the upper supporting layer: wherein the second horizontal level is lower than the first horizontal level and is lower than the upper surface of the upper supporting layer.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Su, as taught by Kwon. The ordinary artisan would have been motivated to modify Su in the above manner for purpose of forming a capacitor with high aspect ratio and improved reliability ([0005] of Kwon).
Regarding Claim 13
FIG. 6 of Kwon discloses the first upper surface of the lower electrode (LE) is substantially coplanar with an upper surface of the upper supporting layer, and the second horizontal level is lower than the first horizontal level, wherein the lower supporting layer (SL1) is spaced apart from the substrate.
Regarding Claim 14
FIG. 1 of Su discloses a capacitor dielectric (50) conformally disposed on the lower supporting layer, the upper supporting layer, and the lower electrode; and an upper electrode disposed on the capacitor dielectric over the upper supporting layer and filled in an opening between the first portion and the second portion of the lower electrode; wherein a first distance between an upper surface of the upper electrode and the first upper surface of the lower electrode is different from a second distance between the upper surface of the upper electrode and the second upper surface of the lower electrode, and the first distance is lower than the second distance.
Regarding Claim 15
FIG. 7 of Kwon discloses a first distance between an upper surface of the upper electrode and the first upper surface of the lower electrode is different from a second distance between the upper surface of the upper electrode and the second upper surface of the lower electrode.
Regarding Claim 16
FIG. 6 of Kwon discloses the lower electrode has a first portion corresponding to the first upper surface of the lower electrode and a second portion corresponding to the second upper surface of the lower electrode, wherein the first portion of the lower electrode is closer to a sidewall of the upper supporting layer than the second portion of the lower electrode is; wherein the first vertical length is defined as a height of the first portion while the second vertical length is defined as a height of the second portion.
Regarding Claim 17
FIG. 7 of Kwon discloses the first portion of the lower electrode has a first vertical length (L2), and the second portion of the lower electrode has a second vertical length (L1) less than the first vertical length.
Regarding Claim 18
FIG. 5 of Kwon discloses the first portion (V2) and the second portion (V1) of the lower electrode collectively define a ring-shaped profile in a top view.
Regarding Claim 19
FIG. 1 of Su discloses the second portion of the lower electrode is spaced apart from the upper supporting layer.
Regarding Claim 20
FIG. 1 of Su discloses the second portion of the lower electrode is spaced apart from the lower supporting layer.
Response to Arguments
Applicant’s arguments with respect to Claim 1 have been considered but are moot because the arguments do not apply to any of the references being used in the current rejection.
Pertinent Art
US 20130299942 and 20220149149.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHENG-BAI ZHU whose telephone number is (571)270-3904. The examiner can normally be reached on 11am – 7pm EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chad Dicke can be reached on (571)270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SHENG-BAI ZHU/Primary Examiner, Art Unit 2897
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