DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
An amendment filed on 11/06/2025 in response to the Office Action mailed on 09/26/2025 is
being acknowledged and entered into the record. The present Non-final rejection is made by taking into
fully consideration all the amendments.
Response to Arguments
On pages 6-7 of the remarks filed on 11/06/2025, with respect to the 103 Rejection of Claim1, Applicant argues that there is substantially no shift between the mask open center location of the first mask 420 and the second mask 460 of Yang. This argument has been fully considered but is not persuasive. MPEP § 2111 discusses proper claim interpretation, including giving claims their broadest reasonable interpretation in light of the specification during examination. Under broadest reasonable interpretation (BRI), the words of a claim must be given their plain meaning unless such meaning is inconsistent with the specification, and it is improper to import claim limitations from the specification into the claim. As such, instant Claim 1 does not require that there should be no shift between the mask open centers of the first mask and the second mask. Furthermore, as pointed out earlier in the office action mailed on 07/25/2025 (see page 4 under 112 rejection and annotated Fig. 15 and Fig. 17 of instant application reproduced on page 5 of the action), there is no indication either in the specification or in the drawings that there exists a shift between the mask open center location of the first mask and the second mask of the instant application. In fact, according to Fig. 15 and Fig. 17 of the originally filed disclosure, a center axis of each of the plurality of first transparent portions 712 of the first mask 710 coincides with a center axis of each of the plurality of second transparent portions 732 of the second mask 730 with NO shift between them, both the mask patterns being identical to that of Yang (see annotated Fig. 15 and Fig. 17 of instant application on page 5 of office action mailed on 07/25/2025). Therefore, the rejection of Claim 1 in view of Yang is maintained.
On page 8 of the remarks filed on 11/06/2025, with respect to the 103 Rejection of Claim1, Applicant argues that Yang fails to define the exact length of each line or each space and does not definitely teach whether the length of each line or each space in the first mask 420 and the second mask 460 is the same or different and whether the space length of the first mask 420 is the same or different from the space length of the second mask 460. This argument has been fully considered but is not persuasive. Fig. 5A reads on a single embodiment in which the line/space ratio (L/S ratio) is clearly defined for both masks in Fig. 5A and column 10, lines 27-30 of Yang. According to Fig. 5A of Yang, the L/S ratio of first mask 420 is 3:1 and that of the second mask 460 1:3. Let the total pitch (line + space) of each mask be P. i.e., L + S = P. Then the line width L and the space width S of the first mask 420 would be 3P/4 and P/4 respectively and the line width L and the space width S of the first mask 460 would be P/4 and 3P/4 respectively. Thus, according to the Fig. 5A, the space width of the first mask 420 is equal to the line width of the second mask 460 and the line width of the first mask 420 is equal to the space width of the second mask 460. Therefore, the rejection of Claim 1 in view of Yang is maintained.
On page 8 of the remarks filed on 11/06/2025, with respect to the 103 Rejection of Claim1, Applicant argues the secondary references, Tsubaki and Tang, do not explicitly disclose open centers of two mask are offset from each other. This argument is fully considered but is not persuasive for the same reasons indicated above (see 1st paragraph). Therefore, the rejection of independent Claim 1 and all dependent claims in view of the applied references is maintained.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-8, 10-13, and 15-17 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 20060024945 A1), in view of Yang (US 9097975 B2), Tsubaki et al. (US 20080187860 A1), and Tang (US 7814650 B2).
Regarding Claim 1, Kim et al. teaches a method of fabricating bit line contacts over a substrate comprising:
depositing an insulative layer 101 and a sacrificial layer 103A on the substrate 100 (Fig. 12A, paragraph 0092);
forming a photosensitive layer on the sacrificial layer 103A (Fig. 12A: 103A, paragraph 0096);
performing a first etching process to remove portions of the sacrificial layer 103A exposed by the target pattern 105A (Fig. 12A: 103A, 105A, fig. 12B: 103B, 105B, paragraph 0102);
after the first etching process, performing a second etching process to form a plurality of trenches 106 in the insulative layer 101, wherein impurity regions of the substrate 100 are exposed to the plurality of trenches 106 (Fig. 12D: 106, 101, 100, paragraph 0103, 0091, 0092);
Note that the substrate 100 includes various device elements (paragraph 0092) and the bit line contacts are formed between one of a bit line and impurity junctions of the substrate 100 (paragraph 0091). Hence, the impurity junctions would be exposed to the plurality of trenches 106 into which the bit line contacts will be subsequently formed.
Kim et al. fails to teach or explicitly teach:
performing a first exposure process to expose the photosensitive layer to actinic radiation through a first mask;
performing a first developing process to form an intermediate pattern on the sacrificial layer, wherein the intermediate pattern includes a plurality of first spaces;
performing a second exposure process to expose the intermediate pattern to the actinic radiation through a second mask;
performing a second developing process to form a target pattern on the sacrificial layer, wherein the target patten includes the plurality of first spaces and a plurality of second spaces respectively spaced apart from the plurality of first spaces;
performing the first etching process after performing the first developing process and the second developing process;
performing the second etching process to form the plurality of trenches in the insulative layer according to the plurality of first spaces and the plurality of second spaces of the target pattern,
and depositing a conductive material into the plurality of trenches to form the bit line contacts.
Yang teaches a method of patterning a substrate, comprising:
performing a first exposure process to expose the photosensitive layer to radiation through a first mask 420 (Fig. 5A, column 10, lines 11 – 40);
wherein the first mask 420 comprises a plurality of first transparent portions (no-fill regions of first mask 420) and a plurality of first opaque portions (pattern-filled regions of first mask 420) in a first staggered configuration (Fig. 5A: 440, 520, column 10, lines 11 – 40),
performing a first developing process to form an intermediate pattern 440, wherein the intermediate pattern 440 includes a plurality of first spaces 520 (Fig. 5A: 440, 520, column 10, lines 11 – 40);
performing a second exposure process to expose the intermediate pattern 440 to the radiation through a second mask 460 (Fig. 5A, column 10, lines 11 – 40);
wherein the second mask 460 has a plurality of second transparent portions (no-fill regions of second mask 460) and a plurality of second opaque portions (pattern-filled regions of second mask 460) in a second staggered configuration, wherein a length S of each of the plurality of first transparent portions (no-fill regions) of the first mask 420 and a length S of each of the plurality of second opaque portions of the second mask 460 (pattern-filled regions of second mask 460) are identical (see annotated Fig. 5A: 460, 420, S, column 10, lines 11 – 40);
performing a second developing process to form a target pattern 510, wherein the target pattern 510 includes the plurality of first spaces 520 and a plurality of second spaces 530 respectively spaced apart from the plurality of first spaces 520; (see annotated Fig. 5A: 530, 520, 510, column 10, lines 11 – 40);
Note the plurality of first spaces 520 is incorrectly marked in Fig. 5A of Yang. The correct position of the first spaces 520 is marked in the annotated Fig. 5A. To provide additional clarity and support, the target pattern 510 is reproduced by superimposing it onto the intermediate pattern 440 (see left of annotated Fig. 5A). The first spaces 520 are indicated by white regions and the second spaces 530 are indicated by solid black regions which are spaced apart from the white regions. It is noteworthy that Fig. 5A of Yang is not drawn to scale and if drawn to scale, the target pattern 510 will be identical to the pattern 320a of the present disclosure shown in Fig. 7.
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have combined Kim et al.’s teachings of forming bit line contacts with Yang’s teachings of processing a substrate to come up with the claimed invention. Doing so, would enable semiconductor devices with high resolution pitch as recognized by Yang (Column 3, Lines 14 – 16).
While Yang does not explicitly teach form an intermediate pattern on the sacrificial layer, form a target pattern on the sacrificial layer, it would have been obvious to a person of ordinary skill in the art to form the intermediate pattern of Yang on the sacrificial layer of Kim et al. and form the target pattern of Yang on the sacrificial layer of Kim et al.
Furthermore, a person of ordinary skill in the art would have recognized that performing the first etching process of Kim et al. can be done after performing the first developing process and the second developing process of Yang, and performing the second etching process of Kim et al. to form the plurality of trenches in the insulative layer can be done according to the plurality of first spaces and the plurality of second spaces of the target pattern of Yang.
While Kim et al. and Yang teach substantial elements of Claim 1 as mentioned above, the combination fails to explicitly teach:
the exposure radiation is actinic radiation
depositing a conductive material into the plurality of trenches to form the bit line contacts.
Tsubaki et al. discloses a method of patterning a substrate that uses actinic radiation for the exposure of the photosensitive layer employed for multiple development processes in which solubility in a positive developer increases and solubility in a negative developer decreases upon irradiation with actinic radiation (Abstract).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the exposure radiation of Yang to actinic radiation. Doing so would enable the performance of multiple development processes with a single photoresist layer as recognized by Tsubaki et al. (Abstract).
Tang teaches a method of forming bit line contacts comprising depositing a conductive material 150 into the plurality of trenches 136 to form the bit line contacts 152 (Fig. 14B and Fig. 15B, column 9, lines 24 – 33)
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have combined the teachings of Kim et al. and Tang to deposit a conductive material into the plurality of trenches to form the bit line contacts. Doing so would complete the process of forming bit line contacts.
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Annotated Fig 5A of Yang (US 9097975 B2)
Regarding Claim 2, Yang teaches the method of claim 1, wherein the first developing process utilizes a positive-tone developer to remove portions of the photosensitive layer exposed to the light, and the second developing process utilizes a negative-tone developer to remove portions of the intermediate pattern 440 shielded from the light (Fig. 5A, column 10, lines 11 – 40).
Regarding Claim 3, Yang teaches the method of claim 1, wherein the first mask 420 and the second mask 460 have complementary geometric patterns (Fig. 5A: 420, 460, column 10, lines 11 – 40).
Regarding Claim 4, Yang teaches the method of claim 3, wherein the plurality of first transparent portions and the plurality of second opaque portions have a first length S, and the plurality of first opaque portions and the plurality of second transparent portions have a second length L different from the first length S (Fig. 5A: L, S, column 10, lines 11 – 30).
Regarding Claim 5, Yang teaches the method of claim 4, wherein the first length S is less than the second length L, i.e., L= 3S (Fig. 5A, column 10, lines 11 – 30).
Regarding Claim 6, Yang teaches the method of claim 4, wherein after the first exposure process, the photosensitive layer includes a plurality of first exposed portions (no-fill regions of intermediate pattern 440) that correspond to the plurality of first transparent portions of the first mask (no-fill regions of first mask 420), and a plurality of first unexposed portions (pattern-filled regions of intermediate pattern 440) that correspond to the plurality of first opaque portions of the first mask 420 (pattern-filled regions of first mask 420), and the first exposed portions are removed after the first developing process (Fig. 5A, column 10, lines 31 – 40).
Regarding Claim 7, Yang teaches the method of claim 6, wherein after the second exposure process, the intermediate pattern includes a plurality of second exposed portions (spaces between the solid black regions in annotated Fig. 5A of Yang) that correspond to the plurality of second transparent portions of the second mask 460, and a plurality of second unexposed portions (solid black regions in annotated Fig. 5A of Yang) that correspond to the plurality of second opaque portions of the second mask 460, and the second developing process removes the plurality of second unexposed portions (see annotated Fig. 5A, column 10, lines 31 – 40).
Regarding Claim 8, Yang teaches the method of claim 6, wherein during the second exposure process, the plurality of second opaque portions (pattern-filled regions of mask 460) are arranged above the plurality of first unexposed portions (pattern-filled regions of the intermediate pattern 440), respectively (see Fig. 5A).
Regarding Claim 10, Kim et al. teaches the method of claim 1, further comprising depositing an antireflective coating (ARC) layer 104A on the sacrificial layer 103A prior to the formation of the photosensitive layer (Fig. 12A: 104A, 103A, paragraph 0095), wherein portions of the ARC layer 104A exposed to the target pattern 105A are removed during the first etching process (Fig. 12A and Fig. 12B, paragraph 0097).
Regarding Claim 11, Kim et al. teaches the method of claim 10, wherein the ARC layer 105A has a thickness of about 50 nm (paragraph 0088).
Note that while Kim et al. does not explicitly disclose a thickness of about 50 nm, it teaches a thickness ranging from approximately 20 nm to approximately 100 nm. According to MPEP § 2144.05 (I), “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Regarding Claim 12, Kim et al. teaches the method of claim 1, further comprising depositing a buffer layer 102A on the insulative layer 101 prior to the deposition of the sacrificial layer 103A (Fig. 12B: 102A, 101, 103A, paragraph 0092), wherein the buffer layer 102A is etched using a patterned ARC layer 104B and a patterned sacrificial layer 103B formed after the first etching process (Fig. 12B and Fig. 12C, paragraph 0102).
Regarding Claim 13, Kim et al. teaches the method of claim 12, wherein the buffer layer 102A functions as an etch stop layer during the first etching process (Fig. 12B, paragraph 0102).
Note that Kim et al. discloses that the etch-selectivity ratio between the sacrificial layer 103A and the buffer layer 102A is high and therefore sufficient thickness of the buffer layer 102A is retained after the etching process (see Fig. 12B), highlighting the purpose of the buffer layer as an etch-stop layer (paragraph 0102).
Regarding Claim 15, Kim et al. teaches the method of claim 12, further comprising performing a removal process to remove the patterned ARC layer 104B, the patterned sacrificial layer 103B, and a patterned buffer layer 102B/102C after the second etching process (Fig. 12B – Fig. 12D, paragraphs 0102 and 0104).
Regarding Claim 16, the combination of Kim et al. and Yang fails to teach the method of claim 1, further comprising performing a planarizing process to remove the conductive material above the trenches.
However, Tang discloses performing a planarizing process to remove the conductive material 150 above the trenches 136 (Fig. 14B and Fig. 15B, column 9, lines 12 – 23).
Therefore, it would have been obvious to a person of ordinary skill in the art to have combined the teachings of Kim et al., Yang and Tang in order to include a step of performing a planarizing process to remove the conductive material above the trenches. Doing so would produce bit lines contacts having top surfaces that are coplanar with the rest of the exposed top surface of the device, as recognized by Tang (column 9, lines 12 – 23).
Regarding Claim 17, Kim et al. teaches the method of claim 1, further comprising removing the target pattern 105A/105B from the ARC layer 104A after the first etching process (Fig. 12A – 12C, paragraph 0102).
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 20060024945 A1), in view of Yang (US 9097975 B2), Tsubaki et al. (US 20080187860 A1), and Tang (US 7814650 B2), as applied to claim 1 above, further in view of Chang Chien et al. (US 11264321 B2).
Regarding Claim 9, the combination of Kim et al./Yang/Tsubaki/Tang fails to disclose wherein the insulative layer has a thickness of about 200 nm, and the sacrificial layer comprising carbon has a thickness of about 50 nm.
Chang Chien et al. teaches a method of fabricating contacts comprising forming an insulative layer 106, wherein the insulative layer 106 has a thickness of about 10 nm to 1,000,000 nm (column 3, lines 11 – 14). While Chang Chien et al. does not explicitly disclose a value of about 200 nm for the thickness of the insulative layer 106, according to MPEP § 2144.05 (I), “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have picked a thickness value of about 200 nm from the disclosed range of Chang Chien et al. by routine optimization. Doing so would ensure the insulative layer has sufficient thickness that would prevent over etching into the substrate.
Kim et al., in a different embodiment, discloses a sacrificial layer 63A comprising carbon (Fig. 11, paragraph 0087) has a thickness of greater than at least approximately 100 nm (paragraph 0089). While Kim et al. does not explicitly disclose a value of about 50 nm for the thickness of the sacrificial layer 63A, a person of ordinary skill in the art would have combined the different embodiments of Kim et al. to recognize that the claimed value can be achieved through routine optimization unless there is evidence indicating such value is critical. According to MPEP § 2144.05 (II-A), "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Furthermore, according to MPEP § 2144.04 (IV) (A), In Gardner v. TEC Syst., Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984), the Federal Circuit held that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 20060024945 A1), in view of Yang (US 9097975 B2), Tsubaki et al. (US 20080187860 A1), and Tang (US 7814650 B2), as applied to claim 12 above, further in view of Chang Chien et al. (US 11264321 B2).
Regarding Claim 14, Kim et al. teaches the method of claim 12, wherein the buffer layer 102A has a thickness of at least 600 nm (paragraph 0094).
Kim et al. does not explicitly disclose a thickness value for the buffer layer in a range of about 20 nm to about 30 nm. However, Chang Chien et al. teaches an etch-stop layer 108 formed over an insulative layer 106 having thickness of about 1 nm to 1,000 nm (Fig. 1, column 2, lines 52 – 61, and column 3, lines 15 – 21). According to MPEP § 2144.05 (I), “In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists”. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990).
Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have been motivated to modify the etch-stop layer thickness of Chang Chien et al. to be in a range of about 20 nm to about 30 nm. Doing so would ensure sufficient thickness of the etch-stop layer is retained after the etching process, as recognized by Kim et al. (paragraph 0102).
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HAMNA F IQBAL whose telephone number is 571-272-1587. The examiner can normally be reached M-F: 8.30 am - 5.30 pm EST.
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/HAMNA FATHIMA IQBAL/Examiner, Art Unit 2817 02/28/2026
/Kretelia Graham/Supervisory Patent Examiner, Art Unit 2817 March 11, 2026