Prosecution Insights
Last updated: April 19, 2026
Application No. 17/859,982

Strained Channel Field Effect Transistor

Non-Final OA §102§103
Filed
Jul 07, 2022
Examiner
PIZARRO CRESPO, MARCOS D
Art Unit
2814
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Ltd.
OA Round
2 (Non-Final)
66%
Grant Probability
Favorable
2-3
OA Rounds
3y 8m
To Grant
80%
With Interview

Examiner Intelligence

Grants 66% — above average
66%
Career Allow Rate
358 granted / 546 resolved
-2.4% vs TC avg
Moderate +15% lift
Without
With
+14.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
40 currently pending
Career history
586
Total Applications
across all art units

Statute-Specific Performance

§103
52.4%
+12.4% vs TC avg
§102
27.5%
-12.5% vs TC avg
§112
17.8%
-22.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 546 resolved cases

Office Action

§102 §103
Attorney’s Docket Number: 24061.1770US03 Filing Date: 7/7/2022 Claimed Priority Date: 8/25/2017 (US 15/686,716) 6/16/2011 (US 13/161,649) Inventors: van Dal et al. Examiner: Marcos D. Pizarro DETAILED ACTION This Office action responds to the election filed on 5/2/2025. Notice of Pre-AIA or AIA Status The present application is being examined under the pre-AIA first to invent provisions. In the event the determination of the status of the application as subject to pre-AIA is incorrect, any correction of the statutory basis for a rejection as subjected to AIA instead will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Election Applicant’s election without traverse of Invention I, reading on a method of manufacturing a semiconductor device, and the species reading on the buffer (203) / isolation feature (204) of figure 4A, an NMOS transistor, and the fin substrate (206) reading on figure 10G, in the reply filed on 5/2/2025, is acknowledged. The applicant indicates that claims 1, 2, 5, 6, 8, 9, 14-16, 21, 22 and 24 read on the elected invention and species. However, claims 14-16 depend from claim 10, which reads on a non-elected species. Accordingly, claims 3, 4, 7, 10-16 and 23 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of pre-AIA 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (e) the invention was described in (1) an application for patent, published under section 122(b), by another filed in the United States before the invention by the applicant for patent or (2) a patent granted on an application for patent by another filed in the United States before the invention by the applicant for patent, except that an international application filed under the treaty defined in section 351(a) shall have the effects for purposes of this subsection of an application filed in the United States only if the international application designated the United States and was published under Article 21(2) of such treaty in the English language. Claims 21, 22, 1, 2 and 5 are rejected under pre-AIA 35 U.S.C. 102(e) as being anticipated by Pillarisetty (US 2011/0147711). Regarding claim 21, Pillarisetty (see, e.g., figs. 5-6) shows all aspects of the instant invention including a method comprising: Forming a dielectric layer STI over a silicon substrate Forming a trench in the dielectric layer Forming a first germanium-comprising layer Spacer and a second germanium-comprising layer QW in the trench, and Etching back the dielectric layer STI such that the second Ge-comprising layer QW extends above a height above the dielectric layer wherein: the first Ge-comprising layer Spacer is between the second Ge-comprising layer QW and the substrate the first Ge-comprising layer Spacer has a first composition, and the second Ge-comprising layer QW has a second composition different from the first composition Regarding claim 22, Pillarisetty (see, e.g., fig. 8) shows the method further comprising the step of forming a gate Gate that wraps a portion of the second Ge-comprising layer QW extending above the dielectric layer STI. Regarding claim 1, Pillarisetty (see, e.g., figs. 5-6) shows all aspects of the instant invention including a method comprising: Forming a dielectric layer STI over a semiconductor substrate Forming a trench in the dielectric layer Forming a first semiconductor layer Spacer in the trench, and Forming a second semiconductor layer QW in the trench, and Etching back the dielectric layer STI to expose a portion of the second layer wherein: The first layer Spacer has a first composition The second layer QW has a second composition different than the first composition, and The second layer QW includes Ge Regarding claim 2, Pillarisetty (see, e.g., fig. 8) shows the method further comprising the step of forming a gate structure Gate over a top surface and sidewall of a channel portion of the exposed portion of the second layer QW. Regarding claim 5, Pillarisetty (see, e.g., par. 0019/ll.13-16) shows that forming the first and second layers include epitaxial growth processes. Claim Rejections - 35 USC § 103 The following is a quotation of pre-AIA 35 U.S.C. 103(a) which forms the basis for all obviousness rejections set forth in this Office action: (a) A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims under pre-AIA 35 U.S.C. 103(a), the examiner presumes that the subject matter of the various claims was commonly owned at the time any inventions covered therein were made absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and invention dates of each claim that was not commonly owned at the time a later invention was made for the examiner to consider the applicability of pre-AIA 35 U.S.C. 103(c) and potential pre-AIA 35 U.S.C. 102(e), (f) or (g) prior art under pre-AIA 35 U.S.C. 103(a). Claim 24 is rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Pillarisetty. Regarding claim 24, Pillarisetty (see, e.g., fig. 8) shows that forming the first Spacer and second QW Ge-comprising layers includes forming a portion of a fin structure. He also shows the fin structure having a length and a width but fails to specify the width and length of the fin. However, differences in width and length will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such differences are critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955). Since the applicant has not established the criticality (see next paragraph below) of the fin dimensions, it would have been obvious to one of ordinary skill in the art to use these values in the device of Pillarisetty. CRITICALITY The specification contains no disclosure of either the critical nature of the claimed dimensions or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). Claim 9 is rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Pillarisetty in view of Hussain (US 2010/0081278). Regarding claim 9, Pillarisetty (see, e.g., par. 0031/l. 6) shows that the step of etching the dielectric layer includes performing a dry etch on the dielectric layer but fails to specify the step including an anisotropic etch. Hussain (see, e.g., par. 0090) teaches that dry etches, like the one of Pillarisetty, are inherently anisotropic and faster, resulting in a better option of more vertical wall in high-aspect ratio structures. Accordingly, it would have been obvious at the time of filing the invention to one of ordinary skill in the art to have an anisotropic etch for the dry etch step of Pillarisetty, as taught by Hussain, to increase the etching speed of the dielectric layer. Allowable Subject Matter Claims 6 and 8 are objected to as being dependent upon a rejected base claim but would be allowable if rewritten in independent form including all the limitations of the base claim and any intervening claims. Conclusion Papers related to this application may be submitted directly to Art Unit 2814 by facsimile transmission. Papers should be faxed to Art Unit 2814 via the Art Unit 2814 Fax Center. The faxing of such papers must conform to the notice published in the Official Gazette, 1096 OG 30 (15 November 1989). The Art Unit 2814 Fax Center number is (571) 273-8300. The Art Unit 2814 Fax Center is to be used only for papers related to Art Unit 2814 applications. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Marcos D. Pizarro at (571) 272-1716 and between the hours of 9:00 AM to 7:30 PM (Eastern Standard Time) Monday through Thursday or by e-mail via Marcos.Pizarro@uspto.gov. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Wael Fahmy, can be reached on (571) 272-1705. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (in USA or Canada) or 571-272-1000. /Marcos D. Pizarro/Primary Examiner, Art Unit 2814 MDP/mdp
Read full office action

Prosecution Timeline

Jul 07, 2022
Application Filed
May 29, 2025
Non-Final Rejection — §102, §103
Sep 08, 2025
Response Filed
Feb 25, 2026
Non-Final Rejection — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12568612
Arrays Of Capacitors, Methods Used In Forming Integrated Circuitry, And Methods Used In Forming An Array Of Capacitors
2y 5m to grant Granted Mar 03, 2026
Patent 12557215
SEMICONDUCTOR PACKAGE USING FLIP-CHIP TECHNOLOGY
2y 5m to grant Granted Feb 17, 2026
Patent 12557710
SEMICONDUCTOR DEVICE, ELECTRONIC DEVICE INCLUDING THE SAME, AND MANUFACTURING METHOD THEREOF
2y 5m to grant Granted Feb 17, 2026
Patent 12541113
IMAGE SENSOR INCLUDING COLOR SEPARATING LENS ARRAY AND ELECTRONIC DEVICE INCLUDING THE IMAGE SENSOR
2y 5m to grant Granted Feb 03, 2026
Patent 12543370
THIN-FILM TRANSISTOR ARRAY SUBSTRATE WITH CONNECTION NODE AND DISPLAY DEVICE INCLUDING THE SAME
2y 5m to grant Granted Feb 03, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

2-3
Expected OA Rounds
66%
Grant Probability
80%
With Interview (+14.8%)
3y 8m
Median Time to Grant
Moderate
PTA Risk
Based on 546 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month