Prosecution Insights
Last updated: April 19, 2026
Application No. 17/871,890

IMAGE SENSOR GRID AND METHOD OF FABRICATION OF SAME

Non-Final OA §103
Filed
Jul 22, 2022
Examiner
NARAGHI, ALI
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Co., Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2y 8m
To Grant
93%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
666 granted / 771 resolved
+18.4% vs TC avg
Moderate +6% lift
Without
With
+6.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
24 currently pending
Career history
795
Total Applications
across all art units

Statute-Specific Performance

§101
1.1%
-38.9% vs TC avg
§103
61.6%
+21.6% vs TC avg
§102
19.0%
-21.0% vs TC avg
§112
13.1%
-26.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 771 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of claims 1-11,21-29 in the reply filed on 09/26/2025 is acknowledged. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-7,11,21-29 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cheng et al (US Pub No. 20180374884), in view of Chou et al (US Patent No. 9437645). With respect to claim 1, Cheng et al discloses: a semiconductor substrate (100,Fig.4); a plurality of image sensing elements (106) formed in the semiconductor substrate; and a composite grid structure (306,308,310) over the semiconductor substrate, wherein the composite grid structure comprises a tungsten grid (306, Para 50), an oxide grid (Silicon oxy nitride, Para 57, 310) over the tungsten grid, and an adhesion enhancement grid spacing the tungsten grid from the oxide grid (Para 55,308). However, Fig.4 does not explicitly disclose a grid structure; and an interconnect structure formed on the semiconductor substrate. On the other hand, Fig.6 discloses the top view of the device in Fig.3H which is similar to Fig.4 and it shows the composite grid structure over the light sensing pixels (Fig.6). It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Fig.4 according to Fig.6 to have composite grid structure separating pixels from each other, in order to improve the picture quality. Furthermore, Cheng et al does not explicitly disclose an interconnect structure formed on the semiconductor substrate. On the other hand, Chou et al discloses an interconnect structure (142,Fig.1B) formed on the semiconductor substrate (104). It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Cheng et al according to the teachings of the Chou et al such that interconnect structure is formed over the substrate in order to turn on and turn of the transistors on the substrate to operate the photosensors. With respect to claim 2, Cheng et al discloses wherein the adhesion enhancement grid is formed from a nitride material (SIN, Para 55). With respect to claim 3, Cheng et al discloses wherein the adhesion enhancement grid comprises gridlines (Fig.6,Fig.4) each having a width ( the width in the y direction) that increases as a distance from the semiconductor substrate increases (the width in the y direction naturally increases as the distance from the semiconductor substrate increases, Fig.4). With respect to claim 4, Cheng et al discloses wherein the tungsten grid comprises gridlines (Fig.6, Fig.4) each having a width (the width in the x direction) that decreases as a distance from the semiconductor substrate increases (Fig.4). With respect to claim 5, Cheng et al discloses wherein the oxide grid comprises gridlines (Fig.6,Fig.4) each having a tapered top segment (sides near top surface of the 310 are tapers,Fig.4) . With respect to claim 6, Cheng et al does not explicitly disclose wherein the adhesion enhancement grid comprises gridlines each having a width in a range from about 10 angstroms to about 500 angstroms. However, "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Furthermore, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Cheng et al such that gridlines each having a width in a range from about 10 angstroms to about 500 angstroms, in order to effectively decrease crosstalk and save space at the same time. With respect to claim 7, Cheng et al discloses wherein the adhesion enhancement grid has a refractive index in a range from about 1.5 to about 2.5 (silicon nitride has a refractive index of 2 to 2.1). With respect to claim 11, Cheng et al discloses wherein the composite grid structure further comprises an oxynitride grid (portion of 314 covering 310, para 69) over the oxide grid (Fig.4). With respect to claim 21, Cheng et al discloses a semiconductor substrate (104,Fig.4); a plurality of image sensing elements (106) formed in the semiconductor substrate; and a composite grid structure over the semiconductor substrate (306,308,310), wherein the composite grid structure comprises a tungsten grid (306 para 50), an adhesion enhancement grid over the tungsten grid (308, Para 55), and an oxide grid over the adhesion enhancement grid (310, para 57), and the composite grid structure is devoid of an oxide/metal interface (Para 50,55,57). However, Fig.4 does not explicitly disclose a grid structure. On the other hand, Fig.6 discloses the top view of the device in Fig.3H which is similar to Fig.4 and it shows the composite grid structure over the light sensing pixels (Fig.6). It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Fig.4 according to Fig.6 to have composite grid structure separating pixels from each other, in order to improve the picture quality. Furthermore, Cheng et al does not explicitly disclose an interconnect structure formed on the semiconductor substrate. On the other hand, Chou et al discloses an interconnect structure (142,Fig.1B) formed on the semiconductor substrate (104). It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Cheng et al according to the teachings of the Chou et al such that interconnect structure is formed over the substrate in order to turn on and turn of the transistors on the substrate to operate the photosensors. With respect to claim 22, Cheng et al discloses wherein the adhesion enhancement grid spaces the tungsten grid from the oxide grid (Fig.4). With respect to claim 23, Cheng et al discloses wherein the adhesion enhancement grid is formed from a nitride material (SIN, Para 55). With respect to claim 24, Cheng et al discloses wherein the adhesion enhancement grid forms a nitride/metal interface with a top surface of the tungsten grid (Fig.4). With respect to claim 25, Cheng et al discloses wherein the adhesion enhancement grid forms a nitride/oxide interface with a bottom surface of the oxide grid (Fig.4). With respect to claim 26, Cheng et al discloses a semiconductor substrate (104,Fig.4); a plurality of image sensing elements (106) formed in the semiconductor substrate; and a composite grid structure (306,308,310) over the semiconductor substrate, wherein the composite grid structure comprises a tungsten grid (306 para 50), an adhesion enhancement grid over the tungsten grid (308, para 55), and an oxide grid over the adhesion enhancement grid (310, para 57), and the adhesion enhancement grid is formed from a nitride material (SIN, Para 55). However, Cheng et al in Fig.4 does not explicitly disclose an interconnect structure formed on the semiconductor substrate; and a grid structure. On the other hand, Fig.6 discloses the top view of the device in Fig.3H which is similar to Fig.4 and it shows the composite grid structure over the light sensing pixels (Fig.6). It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Fig.4 according to Fig.6 to have composite grid structure separating pixels from each other, in order to improve the picture quality. Furthermore, Cheng et al does not explicitly disclose an interconnect structure formed on the semiconductor substrate. On the other hand, Chou et al discloses an interconnect structure (142,Fig.1B) formed on the semiconductor substrate (104). It would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify Cheng et al according to the teachings of the Chou et al such that interconnect structure is formed over the substrate in order to turn on and turn of the transistors on the substrate to operate the photosensors. With respect to claim 27, Cheng et al discloses wherein the adhesion enhancement grid has a thickness less than a thickness of the tungsten grid ( in the x direction the thickness of the tungsten layer is more than adhesion enhancement grid). Furthermore, "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). With respect to claim 28, the arts cited above do not explicitly disclose wherein the adhesion enhancement grid has a thickness less than a thickness of the oxide grid. However, "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). Furthermore, it would have been obvious to one of ordinary skill in the art at the time of the filing of the invention to modify the arts cited above such that the adhesion enhancement grid has a thickness less than a thickness of the oxide grid, as a design choice. With respect to claim 29, further comprising: a plurality of color filters (316,Fig.4) extending through the adhesion enhancement grid (Fig.4,Fig.6). Allowable Subject Matter Claims 8-10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALI N NARAGHI whose telephone number is (571)270-5720. The examiner can normally be reached 10am-6pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALI NARAGHI/Examiner, Art Unit 2817
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Prosecution Timeline

Jul 22, 2022
Application Filed
Dec 08, 2025
Non-Final Rejection — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
93%
With Interview (+6.3%)
2y 8m
Median Time to Grant
Low
PTA Risk
Based on 771 resolved cases by this examiner. Grant probability derived from career allow rate.

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