DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on November 24 2025 has been entered.
Claim Objections
Claims 3, 12, and 18 are objected to because of the following informalities: In claims 12 and 18, “comprises” in line 1 of each claim should read as “comprising” and “first/second thermal heat dissipation component” should read as “first/second heat dissipation component”.
Claim 3 reads “of a thermal conductivity greater as the third interface material” which should read as “of a thermal conductivity greater than a thermal conductivity of the third interface material”. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 18-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Maeda et al. (“Maeda” US 2022/0285254).
Regarding claim 18, Maeda discloses a 3D semiconductor package (Figures 1, 2), comprises:
a package substrate (2);
a semiconductor package (10/3/4/9) bonded to the package substrate (2, bonded through solder material 3 in Figure 2);
a heat dissipation unit (8) attached to the semiconductor package (10/3/4/9), wherein the heat dissipation unit (8) comprises a first heat dissipation component (8A) having a through structure (8C) penetrating through a thickness of the first heat dissipation component (8A, see Figure 2) and a second heat dissipation component (8B) inserted in the through structure (8C, see Figure 2, para. [0028]);
a first interface material (12, upper portions on the top and side surfaces of wider, upper portion of 8B, see labeled below in annotated Figure 2) filling a gap between the first thermal heat dissipation component (8A) and the semiconductor package (10/3/4/9, the first interface material portion of material 12 fills a gap between the first heat dissipation component 8A and elements of the semiconductor package 10/3/4/9);
a second interface material (11) filling a gap between the second thermal heat dissipation component (8B) and the semiconductor package (10/3/4/9, see Figure 2); and
third interface material (12, portion on lower surface of the protrusion/step portion of 8B, see labeled below in annotated Figure 2) disposed between the first interface material (12, upper portion) and the second interface material (11, see Figure 2 which shows the third interface material on the lower edge surface of the step portion of 8B between the upper portion of 12, the first interface material, and the second interface material 11).
Regarding claim 19, Maeda discloses the through structure (8C) has a lateral dimension (lateral width of the through structure 8C, lower width of 8C is smaller than the upper width of 8C due to step portion 81 of 8A) gradually increased from a bottom end to a top end further away from the semiconductor package (10/3/4/9) than the bottom end (see Figure 2).
The instant specification discloses in para. [0032] that a gradual increase in the lateral dimension of the through structure is accomplished by a “step change.” Maeda discloses a step change as seen in Figure 2.
Regarding claim 20, Maeda discloses the second heat dissipation component (8B) has a structure (step portion 82) compensating the through structure (8C, here “compensating” is interpreted to mean that the second heat dissipation component has a feature that cooperates, or fits, into the through structure).
PNG
media_image1.png
504
1186
media_image1.png
Greyscale
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 4-7, and 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Maeda et al. (“Maeda” US 2022/0285254) and Zheng et al. (“Zheng” US 2023/0037617).
Regarding claim 1, Maeda discloses a 3D semiconductor package (Figures 1, 2) comprising:
a package substrate (2);
a semiconductor package (10/3/4/9) bonded to the package substrate (2, see Figure 2);
a heat dissipation unit (8) attached to the semiconductor package (10/3/4/9), wherein the heat dissipation unit (8) comprises a first heat dissipation component (8A) and a second heat dissipation component (8B) attached to the first heat dissipation component (see Figure 2, 8B and 8A are attached through material 12); and
a first interface material (12, portion on lower surface of the protrusion/step portion of 8B, see labeled below in annotated Figure 2) disposed between the first heat dissipation component (8A) and the second heat dissipation component (8B, see Figures 1, 2);
a second interface material (11) disposed between the second heat dissipation component (8B) and the semiconductor package (10/3/4/9); and
a third interface material (12, upper portions on the top and side surfaces of wider, upper portion of 8B, see labeled below in annotated Figure 2) disposed between the first heat dissipation component (8A) and the semiconductor package (10/3/4/9, see Figure 2 which shows the third interface material between the first heat dissipation component 8A and elements of the semiconductor package 10/3/4/9), wherein the first interface material (12, portion on lower surface of the protrusion/step portion of 8B) [is of a material different from the second interface material and the third interface material and] is interposed between the second interface material (11) and the third interface material (12, upper portions on the top and side surfaces of wider, upper portion of 8B, see Figure 2 which shows the first interface material between the second interface material 11 and the third interface material 12, upper portions, see also annotated Figure 2 below).
Maeda does not explicitly disclose wherein the first interface material is a phase change material having a soft state at a temperature of 40°C to 60°C and having a rigid state at a room temperature.
Zheng discloses using a indium/tin/bismuth metal material for a thermal interface material (40, para. [0085]).
The instant specification (and proceeding claim 2) discloses that the phase change material with a soft state at a temperature of 40°C to 60°C and a rigid state at a room temperature can be a thermal plastic material, a polymer-based get, a thin metallic alloy pad formed by indium, bismuth, and tin, a polymer based elastomer with thermally conductive filler, or a silicone based polymer matrix, or a combination thereof (see para. [0038]). Zheng’s indium/tin/bismuth interface material would inherently have the property as recited for the first interface material in claim 1 because the composition of the instant application’s first interface material is physically the same as Zheng’s interface material (see MPEP 2112.01(II)). Further, while Zheng does not explicitly disclose that the interface material 40 is a phase change material having a soft state at a temperature of 40°C to 60°C and having a rigid state at a room temperature, this inherent feature need not be recognized at the relevant time (see MPEP 2112(II)).
Further, it would have been obvious to one having ordinary skill in the art to incorporate the teachings of Zheng into the teachings of Maeda to include Zheng’s interface material (40, para. [0085]) for the interface material (12) of Maeda for the purpose of using a material with high thermal conductivity (Zheng, para. [0085]).
Maeda does not disclose that the first interface material is of a material different from the second interface material and the third interface material. Maeda’s materials 11 and 12 are solder, see para. [0029]. However, Zheng discloses a first interface material (40) made of indium/tin/bismuth, see para. [0085], which is different from a generic solder material for the second and third interface materials of Maeda.
It would have been obvious to one having ordinary skill in the art to incorporate the teachings of Zheng into the teachings of Maeda to include Zheng’s interface material (40, indium/tin/bismuth material, para. [0085]) for the first interface material of Maeda (12, portion on lower surface of the protrusion/step portion of 8B, see labeled below in annotated Figure 2) for the purpose of using a material with high thermal conductivity (Zheng, para. [0085]). Further, the selection of a known material based on its suitability for its intended use is prima facie obvious. See MPEP 2144.07.
PNG
media_image2.png
504
1186
media_image2.png
Greyscale
Regarding claim 2, Maeda does not explicitly disclose the first interface material comprises a polymer-based gel, a thin metallic alloy pad formed by indium, bismuth and tin alloy metal, a polymer based elastomer with thermally conductive filler or a silicone based polymer matrix.
However, Zheng discloses the first interface material (40) comprises a polymer-based gel, a thin metallic alloy pad formed by indium, bismuth and tin alloy metal, a polymer based elastomer with thermally conductive filler or a silicone based polymer matrix (indium/tin/bismuth material for interface material 40, para. [0085]).
it would have been obvious to one having ordinary skill in the art to incorporate the teachings of Zheng into the teachings of Maeda to include Zheng’s interface material (40, indium/tin/bismuth material, para. [0085]) for the first interface material of Maeda (12) for the purpose of using a material with high thermal conductivity (Zheng, para. [0085]). Further, the selection of a known material based on its suitability for its intended use is prima facie obvious. See MPEP 2144.07.
Regarding claim 4, Maeda discloses the first heat dissipation component (8A) has a through structure (8C, para. [0028]) and the second heat dissipation component (8B) is inserted in the through structure (see Figures 1,2, para. [0029]).
Regarding claim 5, Maeda discloses the first heat dissipation component (8A) includes a structure surface (outer surfaces of 8A, outer surfaces of step portion 81 in Figure 2) defining the through structure (8C, outer edge surfaces of 8A define the through structure 8C, see Figure 2 and annotated Figure 2 below), the second heat dissipation component (8B) includes an embedded surface (outer surfaces of 8B contacting the structure surface of 8A, outer surface of step portion 82) and the embedded surface conforms to the structure surface (see Figure 2 and annotated Figure 2 below, “conforming” here is interpreted to mean that the first and second heat dissipation components 8A and 8B fit together such that they form a flush interface surface between the step portions 81, 82, see Figure 2).
Regarding claim 6, Maeda discloses the second heat dissipation component (8B) includes a first portion (lower block portion contacting the semiconductor package 10/3/4/9) and a second portion (upper, wider portion with step portions 82), and the first portion is more adjacent to the semiconductor package (10/3/4/9) than the second portion (see Figure 2, 8B has two portions, the lower first portion closer to the semiconductor chip 10 of the package 10/3/4/9).
Regarding claim 7, Maeda discloses a lateral dimension of the first portion (lower portion of 8B) is smaller than a lateral dimension of the second portion (upper portion of 8B, upper portion includes the step portions 82, which increase the lateral dimension of 8B, see Figure 2).
Regarding claim 9, Maeda discloses the first heat dissipation component (8A) comprises a plate portion (top, horizontally extending portion over the package 10/3/4/9) attached to the semiconductor package (10/3/4/9, attached through the second heat dissipation component 8B and the thermal interface materials 11, 12) and a peripheral portion (edge portions of 8A attached to case 5) attached to the package substrate (2) through an adhesive (para. [0030] discloses that the case 5 is fixed to the package substrate 2 by a bonding agent, not shown in the figures, and the peripheral/edge portions of 8A are attached to 5, thus 8A is attached to the package substrate through an adhesive between elements 5 and 2).
Regarding claim 10, Maeda further discloses a peripheral component (5) attached to the package substrate (2, para. [0030], Figure 2) and laterally surrounding the semiconductor package (10/3/4/9, see Figures 1, 2, shows that peripheral component 5 surrounding lateral sides of the semiconductor package 10/3/4/9).
PNG
media_image3.png
519
681
media_image3.png
Greyscale
Claims 3 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Maeda and Zheng as applied to claim 1 above, and further in view of Jewram et al. (“Jewram” US 2022/0151108).
Regarding claim 3, Maeda discloses the second heat dissipation component (8B) is attached to the semiconductor package (10/3/4/9) through the second interface material (11).
Maeda does not explicitly disclose that the second interface material has a thermal conductivity greater as the third interface material.
However, Jewram discloses tuning thermal conductivities of a heat dissipation materials for a semiconductor device, where a second interface material 30 has a greater thermal conductivity than a third interface material 32 (Jewram, para. [0030]) for the purpose of maximizing thermal conductance capacity. Thus, it would have been obvious to and within the skill set of one having ordinary skill in the art to incorporate the teachings of Jewram into the teachings of Maeda to include the differing thermal conductivities of the second and third interface materials.
Regarding claim 8, Maeda discloses the second heat dissipation component (8B) has a thermal conductivity greater than the first heat dissipation component (8A, para. [0028], [0029] disclose that 8A and 8B can be formed of copper or aluminum, which have different thermal conductivities, copper being greater than that of aluminum, thus in the embodiment where the second heat dissipation component 8B is formed of copper and the first heat dissipation component 8A is formed of aluminum, the second heat dissipation component 8B will have a greater thermal conductivity than the first heat dissipation component 8A).
Maeda discloses a finite number of materials used to form the heat dissipation components 8A and 8B, copper or aluminum. One having ordinary skill in the art would have recognized the finite number of predictable solutions for thermally conductive materials as evidenced by Maeda. Absent unexpected results, it would have been obvious to try each of the four different combinations (1. 8A is aluminum, 8B is aluminum 2. 8A is aluminum, 8B is copper 3. 8A is copper, 8B is aluminum 4. 8A is copper, 8B is copper) to yield a thermal conductivity difference suitable for heat dissipation components.
In the event that it would not have been obvious to try 8A as aluminum and 8B as copper, which the Examiner does not concede, Jewram discloses tuning thermal conductivities of a heat dissipation arrangement for a semiconductor device, where a second heat dissipation component 30 has a greater thermal conductivity than a first heat dissipation component 32 (Jewram, para. [0030]) for the purpose of maximizing thermal conductance capacity. Thus, it would have been obvious to one having ordinary skill in the art to incorporate the teachings of Jewram into the teachings of Maeda to include the differing thermal conductivities of the heat dissipation components.
Claims 12-17 are rejected under 35 U.S.C. 103 as being unpatentable over Maeda et al. (“Maeda” US 2022/0285254) and Jewram et al. (“Jewram” US 2022/0151108).
Regarding claim 12, Maeda discloses a 3D semiconductor package (Figures 1, 2), comprises:
a package substrate (2);
a semiconductor package (10/3/4/9) bonded to the package substrate (2, bonded to the package substrate through material 3, see Figure 2);
a heat dissipation unit (8, 8A/B/C) attached to the semiconductor package (10/3/4/9, see Figure 2), wherein the heat dissipation unit comprises a first heat dissipation component (8A) and a second heat dissipation component (8B) extending through a thickness of the first heat dissipation component (8A, see Figure 2, 8B is inserted in a through hole 8C of 8A), and the second heat dissipation component (8B) has a thermal conductivity greater than the first heat dissipation component (8A, para. [0028], [0029] disclose that 8A and 8B can be formed of copper or aluminum, which have different thermal conductivities, copper being greater than that of aluminum, thus in the embodiment where the second heat dissipation component 8B is formed of copper and the first heat dissipation component 8A is formed of aluminum, the second heat dissipation component 8B will have a greater thermal conductivity than the first heat dissipation component 8A);
a first interface material (12, portion on lower surface of the protrusion/step portion of 8B, see labeled below in annotated Figure 2) between the first thermal heat dissipation component (8A) and the second thermal heat dissipation component (8B);
a second interface material (12, upper portions on the top and side surfaces of wider, upper portion of 8B, see labeled below in annotated Figure 2) between the first thermal heat dissipation component (8A) and the semiconductor package (10/3/4/9, see Figure 2 which shows edge portions of the second interface material 12, upper and side portions on wider, upper portion of 8B, between 8A and elements of the semiconductor package 10/3/4/9);
and a third interface material (11) between the second thermal heat dissipation component (8B) and the semiconductor package (10/3/4/9, see Figure 2), wherein the first interface material (12, portion on lower surface of the protrusion/step portion of 8B, see labeled below in annotated Figure 2) and the third interface material (11) are disposed in an opening of the second interface material (12, upper portions on the top and side surfaces of wider, upper portion of 8B, see labeled below in annotated Figure 2, see also the opening of the shape of the second interface material, i.e. the opening of the upside-down U shape, within the bounds of which the first and third interface materials are disposed).
Maeda discloses a finite number of materials used to form the heat dissipation components 8A and 8B, copper or aluminum. One having ordinary skill in the art would have recognized the finite number of predictable solutions for thermally conductive materials as evidenced by Maeda. Absent unexpected results, it would have been obvious to try each of the four different combinations (1. 8A is aluminum, 8B is aluminum 2. 8A is aluminum, 8B is copper 3. 8A is copper, 8B is aluminum 4. 8A is copper, 8B is copper) to yield a thermal conductivity difference suitable for heat dissipation components.
In the event that it would not have been obvious to try 8A as aluminum and 8B as copper, which the Examiner does not concede, Jewram discloses tuning thermal conductivities of a heat dissipation arrangement for a semiconductor device, where a second heat dissipation component 30 has a greater thermal conductivity than a first heat dissipation component 32 (Jewram, para. [0030]) for the purpose of maximizing thermal conductance capacity. Thus, it would have been obvious to one having ordinary skill in the art to incorporate the teachings of Jewram into the teachings of Maeda to include the differing thermal conductivities of the heat dissipation components.
PNG
media_image4.png
504
1186
media_image4.png
Greyscale
Regarding claim 13, Maeda discloses the first heat dissipation component (8A) has a through structure (8C) and the second heat dissipation component (8B) is inserted in the through structure (8C, see Figures 1, 2).
Regarding claim 14, Maeda discloses the first heat dissipation component (8A) includes a structure surface (outer surfaces of 8A, outer surfaces of step portion 81 in Figure 2) defining the through structure (8C, outer edge surfaces of 8A define the through structure 8C, see Figure 2 and annotated Figure 2 below), the second heat dissipation component (8B) includes an embedded surface (outer surfaces of 8B contacting the structure surface of 8A, outer surface of step portion 82) and the embedded surface conforms to the structure surface (see Figure 2 and annotated Figure 2 below, “conforming” here is interpreted to mean that the first and second heat dissipation components 8A and 8B fit together such that they form a flush interface surface between the step portions 81, 82, see Figure 2).
Regarding claim 15, Maeda discloses a top surface of the second heat dissipation component (8B) is higher than or coplanar to a top surface of the first heat dissipation component (8A, see Figure 2, the top surface of 8B is coplanar with the top surface of 8A).
Regarding claim 16, Maeda discloses the second heat dissipation component (8B) includes a first portion (lower block portion contacting the semiconductor package 10/3/4/9) and a second portion (upper, wider portion with step portions 82), and the first portion is more adjacent to the semiconductor package (10/3/4/9) than the second portion (see Figure 2, 8B has two portions, the lower first portion closer to the semiconductor package 10/3/4/9).
Regarding claim 17, Maeda discloses a lateral dimension of the first portion (lower portion of 8B) is smaller than a lateral dimension of the second portion (upper portion of 8B, upper portion includes the step portions 82, which increase the lateral dimension of 8B, see Figure 2).
Response to Arguments
Applicant's arguments filed have been fully considered but they are not persuasive. Applicant asserts that Maeda fails to disclose the newly added limitations to claim 18 because Maeda discloses that 8A is not bonded to the semiconductor element 10. However, Applicant has not adequately required that the first heat dissipation component has direct contact with or is directly bonded to the semiconductor package. The amendments to claim 18 only requires that the interface materials fill various gaps in the package, which the Examiner notes does not require that a material fill a gap entirely, as any gap of any size or shape between different claimed elements can be chosen. These interpretations of the claim language of 18 also apply similarly to arguments presented by Applicant regarding claims 1 and 12.
The Examiner would also like to note that Applicant argues that Maeda does not teach that the thickness of the first interface material is greater than a thickness of the second interface material in claim 18, however this limitation was not included in the claims filed with the RCE on November 24 2025.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Genevieve G Bullard-Connor whose telephone number is (571)270-0609. The examiner can normally be reached Mon-Fri, 9am-5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 571-270-7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Genevieve G Bullard-Connor/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899