DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
Claims 1-5, 7-13, and 15-20 are pending.
Claim 20 is withdrawn.
Claims 6 and 14 are cancelled.
Claims 1, 2, 5, 7, 8, 10, and 20 are amended.
Response to Arguments/Amendments
Applicant's arguments, see pages 6-8, filed 10/14/2025 have been fully considered but they are not persuasive. Specifically, the arguments do not overcome the rejections of claims 2, 4, 5, 6, 8, 9, and 10 under 35 U.S.C 112(b), mailed 07/18/2025. Applicant disagrees with the examiner’s interpretation of a “floating gate structure” as “a conductive semiconductor layer manufactured at the same time as, and of a same material as an active gate structure, but not performing memory storage functions,” and argues that the examiner has imparted limitations onto the claimed invention. Applicant further argues that the use of “floating gate structure” in the instant application is the accepted meaning known to those of ordinary skill in the art of “a gate structure that is electrically isolated, which stores charge by trapping electrons on the floating gate, allowing it to retain data long term without power.” Claim 6 has been cancelled. The rejections of claim 2, 4, 5, 8, 9, and 10 under 35 U.S.C. 112(b) are upheld. Further details below.
Applicant’s arguments, see pages 5-6, filed 10/14/2025, with respect to amended claims 1 and 10 have been considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new grounds of rejection is made in view of Feng et al. (US PGPub 2018/0038742), herein Feng.
Drawings
The objections to the drawings, filed 07/18/2025, are upheld. Specifically, Figure 4 depicts two active gate structures (12) without a source/drain region (see annotated Fig. 4 below), and Fig. 1 does not show a built-in temperature sensor and respective fabrication process, as described in at least paragraph 0007.
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The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Specifically, the drawings do not depict the claimed feature “multiple floating gate structures in a serpentine configuration surrounding multiple active gate structures.” For example, at least Fig. 2 depicts multiple floating gate structures (24a, 24a’) surrounding multiple active gate structures (12), however the floating gate structures do not form a serpentine configuration, and are instead parallel to the active gate structures. A serpentine configuration in the drawings as currently filed is only achieved through inclusion of the wiring lines (24h, 24i, 24b, 24c). “Multiple floating gate structures in a serpentine configuration surrounding multiple active structures” must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-5, 7-13, and 15-19 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement.
Regarding claims 1 and 10, the claims contain subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Specifically, the limitation “wherein the built-in temperature sensor comprises multiple floating gate structures in a serpentine configuration surrounding multiple active gate structures” fails to comply with the written description requirement because it describes wherein the multiple floating gate structures form a serpentine configuration. As shown in at least Figure 2, the multiple floating gate structures 24a, 24a’ are substantially parallel to the active gate structures 12 but are not themselves in a serpentine configuration. Additionally, the text of the specification does not provide further detail regarding how the multiple floating gate structures would form a serpentine configuration. Paragraph 0025 of the specification states that: ”FIG. 2 shows a built-in temperature sensor in accordance with additional aspects of the present disclosure. More specifically, the structure 10a of FIG. 2 includes a built-in temperature sensor 24 in a serpentine configuration. In this configuration, for example, the built-in temperature sensor 24 includes additional floating gate structures 24a' and wiring lines 24h which connect the floating gate structures 24a' to the floating gate structures 24a. In this way, the built-in temperature sensor 24 surrounds multiple active gate structures 12,” indicating that the floating gate structures are not in a serpentine configuration, but that the built-in temperature sensor, dictated by the claim as a structure comprising multiple floating gate structures, in addition to force and sensing lines, is in a serpentine configuration.
Accordingly, dependent claims 2-5, 7-9, 11-13, and 15-19 are rejected.
For the purposes of examination, it will be interpreted that the built-in temperature sensor, as described by claims 1 and 10, forms a serpentine configuration surrounding multiple active gate structures.
Claims 1-5, 7-13, and 15-19 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claims contain subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention.
Regarding claims 1 and 10, specifically, it is unclear how one skilled in the art would make a temperature sensor using a floating gate structure without undue experimentation.
Breadth of the claims: Claims 1 and 10 describe a built-in temperature sensor comprising multiple floating gate structures. The claim language makes use of the term “floating gates,” and the examiner notes that typically, floating gates are electrically isolated gate features, included to trap electrons for storage of data.
Nature of the invention: The instant application makes use of floating gate structures, described in at least paragraph 0018 as connected to metal wiring lines and comprising polysilicon material, and fabricated during the fabrication processes of the active gate structures, in order to form a temperature sensor device, similar to a Kelvin sensing structure, as described in paragraph 0019. Per the specification, the floating gate structures are at least electrically connected via wiring structures, as described in at least paragraphs 0018-0019, and Fig. 1, however it is not apparent from the specification, in either the figures or written description, how these floating gate structures are electrically isolated from the active device.
State of the prior art: Built-in temperature sensors are known in the art, and methods of forming them are known, such as in Mahon (US PGPub 2019/0028065), which teaches a temperature structure formed of a floating gate plate configured for four-point probing, where the gate plate is formed of polysilicon, or an appropriate metal, that is electrically isolated from the device by insulating layers. Pihet (US PGPub 2003/0210507) additionally teaches a polysilicon material across which resistance can be measured, insulated from lower materials by an oxide insulating material.
Level of one of ordinary skill: Built-in temperature sensors are known in the art, and methods of forming them are known, such as in Mahon (US PGPub 2019/0028065), which teaches a temperature structure formed of a floating gate plate configured for four-point probing, where the gate plate is formed of polysilicon, or an appropriate metal, that is electrically isolated from the device by insulating layers. Pihet (US PGPub 2003/0210507) additionally teaches a polysilicon material across which resistance can be measured, insulated from lower materials by an oxide insulating material. One of ordinary skill in the art would be aware of four-point/Kelvin temperature probing methods.
Level of predictability in the art: The examiner notes that resistive temperature sensing is a predictable subject matter area, typically performed with an electrically conductive material, voltage source, and sensing locations.
Amount of direction provided by the inventor: The application does not provide direction nor description to how the floating gates are made floating, i.e. electrically isolated from the active device, particularly in the case that they are formed at a same time as the active gates, without instruction given regarding isolating the floating gates, and how the structure as depicted in the figures and described in the detailed description would subsequently be used to form a temperature sensor that does not electrically interfere with the function of the active gates
Existence of working examples: The application does not provide adequate example of how the structure as depicted in the figures and described in the detailed description would subsequently be used to form a temperature sensor that does not electrically interfere with the function of the active gates.
Quantity of experimentation needed to make or use the invention based on the content of the disclosure: Based upon amount of instruction given in the disclosure of the application, undue experimentation would be needed in order to make or use the invention. One of ordinary skill in the art would need to perform significant experimentation in order to determine a method of isolating the floating gate structures, based upon the figures and disclosure of the specification. Paragraph 0020 makes reference to insulator material, but provides no further context to its location on the device and it is not depicted in the figures, so further experimentation would be required in order to determine method of forming floating gate structures that are isolated from the active device and serve as resistive temperature sensors.
The examiner concludes that the claims contain subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention. See MPEP 2164.
Accordingly, dependent claims 2-5, 7-9, 11-13, and 15-19 are rejected.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-5, 7-13, and 15-19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claims 1 and 10, where applicant acts as his or her own lexicographer to specifically define a term of a claim contrary to its ordinary meaning, the written description must clearly redefine the claim term and set forth the uncommon definition so as to put one reasonably skilled in the art on notice that the applicant intended to so redefine that claim term. Process Control Corp. v. HydReclaim Corp., 190 F.3d 1350, 1357, 52 USPQ2d 1029, 1033 (Fed. Cir. 1999). The term “floating gate structure” in claim 1, 2, and 4-19 is defined by the applicant in the response filed 10/14/2025 to be “a gate structure that is electrically isolated, which stores charge by trapping electrons on the floating gate, allowing it to retain data long term without power.” However, it is unclear how a temperature sensor would be built using this definition of a floating gate structure, as the claims and specification detail wherein direct electrical connection is provided to the floating gate through at least wiring lines (force and sensing lines), and with no disclosure of an insulating or isolating layer to isolate from the active device, in direct contradiction to the applicant-provided definition of a gate having electrical isolation. One of ordinary skill in the art would not thus, understand the term “floating gate structure” as the ordinary meaning, as provided by the applicant. In the event that the applicant is acting as his or her own lexicographer, sufficient disclosure has not been provided in the application to clearly redefine the claim term and set forth the uncommon definition so as to put one reasonably skilled in the art on notice that the applicant intended to so redefine that claim term.
For the purposes of examination, it will be interpreted that the “floating gate structure” is a semiconductor material manufactured of a same material as an active gate structure, but not performing active gate function, consistent with at least paragraph 0018 of the specification.
Accordingly, dependent claims 2-5, 7-9, 11-13, and 15-19 are rejected.
Further regarding claim 2, specifically, claim 2 recites “wherein the built-in temperature sensor comprises floating gate structures.” It is unclear if the limitations “comprises floating gate structures” refers to the floating gate structures recited in claim 1, or if these are additional floating gate structures.
For the purposes of examination, the claim will be interpreted as “wherein the built-in temperature sensor comprises the floating gate structures,” and the floating gate structures are those introduced by claim 1.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 8-12, 16, 17, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Mahon et al. (US PGPub 2019/0028065), herein Mahon, and further in view of Feng et al. (US PGPub 2018/0038742), herein Feng.
Regarding claim 1, Mahon teaches (Fig. 2B) a structure comprising: at least one active gate structure (145); and a built-in temperature sensor (147) adjacent to and on a same device level as the at least one active gate structure (145, [0060]), the built-in temperature sensor further comprising force lines (210a, 210b) and sensing lines (212a, 212b), wherein the built-in temperature sensor comprises multiple floating gate structures (147, [0062]) surrounding multiple active gate structures (145, [0062]). Mahon does not explicitly teach in a serpentine configuration, as interpreted to be a structure comprising multiple floating gate structures, in addition to force and sensing lines, in a serpentine configuration.
Feng teaches (Fig. 2) a built-in temperature sensor (208, [0026]) in a serpentine configuration ([0030]), wherein force and sensing lines (2091, 2091, [0049]) are located at end points of the serpentine structure (4-point Kelvin detection is described as an appropriate embodiment, [0049]).
Because Mahon and Feng are both directed toward built-in temperature sensing of semiconductor devices, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Mahon and Feng to include a serpentine configuration, in order to allow for resistive temperature measurement across extended device features (i.e. the gate lines of Feng, [0030]).
Regarding claim 2, Mahon in view of Feng teaches (Mahon, Fig. 2B) the structure of claim 1, wherein the built-in temperature sensor comprises floating gate structures (147, [0060]) which are connected to the force lines (210a, 210b, [0063]) and sensing lines (212a, 212b, [0063]).
Regarding claim 3, Mahon in view of Feng teaches (Mahon, Fig. 2B) the structure of claim 1, wherein the built-in temperature sensor (147) is parallel to the at least one active gate structure (145, [0054]).
Regarding claim 8, Mahon in view of Feng teaches the structure of claim 1, but does not explicitly teach wherein the built-in temperature sensor comprises multiple floating gate structures surrounding inner active gate structures.
Mahon teaches a further embodiment wherein multiple floating gate structures (147) may be formed along an array of a few transistors in a device ([0062]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further combine the teachings of Mahon to include wherein the built-in temperature sensor comprises multiple floating gate structures surrounding inner active gate structures for the purpose of sampling more representative temperatures across the gate array ([0062]).
Regarding claim 9, Mahon in view of Feng teaches the structure of claim 8, wherein the force lines (210a, 210b) and the sense lines (212a, 212b) connect to a single (147) of the multiple floating gate structures ([0062]).
Regarding claim 10, Mahon teaches (Fig. 2B, adjacent structures not pictured) a structure comprising: a plurality of adjacent active gate structures (145, [0062]); and a built-in temperature sensor comprising a plurality of floating gate structures (147, [0062]) within source/drain regions (162, 160, [0054]) of selective active gates of the plurality of active gate structures, and further including force lines (210a, 210b) and sensing lines (212a, 212b, [0063]). Mahon does not explicitly teach in a serpentine configuration, as interpreted to be a structure comprising multiple floating gate structures, in addition to force and sensing lines, in a serpentine configuration.
Feng teaches (Fig. 2) a built-in temperature sensor (208, [0026]) in a serpentine configuration ([0030]), wherein force and sensing lines (2091, 2091, [0049]) are located at end points of the serpentine structure (4-point Kelvin detection is described as an appropriate embodiment, [0049]).
Because Mahon and Feng are both directed toward built-in temperature sensing of semiconductor devices, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Mahon and Feng to include a serpentine configuration, in order to allow for resistive temperature measurement across extended device features (i.e. the gate lines of Feng, [0030]).
Regarding claim 11, Mahon in view of Feng teaches (Mahon, Fig. 2B) the structure of claim 10, wherein at least one of the floating gate structures (147) connect to the force lines (210a, 210b) and sensing lines (212a, 212b, [0063]).
Regarding claim 12, Mahon in view of Feng teaches (Mahon, Fig. 2B, adjacent structures not pictured) the structure of claim 10, wherein the plurality of floating gate structures (147, [0062]) are parallel to and surround the plurality of adjacent active gate structures (145, [0062]).
Regarding claim 16, Mahon in view of Feng teaches (Mahon, Fig. 2A, cross-section of Fig. 2B) the structure of claim 10, wherein the plurality of floating gate structures (147, [0060]) and the plurality of active gate structures (145, [0060]) are on a same device level ([0060]).
Regarding claim 17, Mahon in view of Feng teaches (Mahon, Fig. 2B) the structure of claim 10, wherein the force lines (210a, 210b, [0063]) and sensing lines (212a, 212b, [0063]) extend from a same floating gate structure (147, [0062]) of the plurality of floating gate structures ([0062]).
Regarding claim 19, Mahon in view of Feng teaches (Mahon, Fig. 2B) the structure of claim 10, wherein the built-in temperature sensor comprises multiple floating gate structures (147, [0062]) surrounding inner active gate structures (145, [0062]).
Claims 4, 5, 13, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Mahon in view of Feng as applied to claims 1 and 10 above, and further in view of Pihet et al. (US PGPub 2003/0210507), herein referred to as Pihet.
Regarding claim 4, Mahon in view of Feng teaches the structure of claim 1, but does not explicitly teach wherein the built-in temperature sensor comprises two floating gate structures surrounding a single active gate structure.
Pihet teaches (Fig. 5) wherein the built-in temperature sensor comprises two floating gate structures (Ga, Gc, [0044]) surrounding a single active gate structure (Gb, [0044]).
Because Mahon in view of Feng and Pihet are both directed toward resistive temperature sensing of a memory device, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Mahon in view of Feng and of Pihet in order to allow for temperature sensing at temperature-critical locations of the transistor (Pihet, [0044]).
Regarding claim 5, Mahon in view of Feng and Pihet teaches the structure of claim 4, and further teaches (Mahon, Fig. 2B) wherein the two floating gate structures are located between source/drain regions (162, 160, [0054]) of the single active gate structure (145, [0062]).
Regarding claim 13, Mahon in view of Feng teaches the structure of claim 10, but does not explicitly teach wherein the plurality of floating gate structures surround a single active gate structure.
Pihet teaches (Fig. 5) wherein the plurality of floating gate structures (Ga, Gb, Gd, Ge, [0044]) surrounds a single active gate structure (Gc, [0044]). Pihet teaches wherein the number and position of floating gate structures surrounding an active gate can be chosen for appropriate temperature measurement ([0044]). A person of ordinary skill in the art would understand that this would include a configuration in which multiple floating gates surrounded an single active gate structure.
Because Mahon in view of Feng and Pihet are both directed toward resistive temperature measurement of memory devices it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Mahon in view of Feng and of Pihet to include wherein the plurality of floating gate structures surround a single active gate structure in order to provide temperature sensing at particularly temperature-critical locations of the transistor (Pihet, [0044]).
Regarding claim 18, Mahon in view of Feng teaches the structure of claim 10, but does not explicitly teach wherein the plurality of floating gate structures are provided at opposing ends of the plurality of active gate structures.
Pihet teaches (Fig. 5) wherein the plurality of floating gate structures (Ga, Gn, [0044]) are provided at opposing ends of the plurality of active gate structures (Gb, Gc, Gd, Ge [0044]). Pihet teaches wherein the number and position of floating gate structures surrounding an active gate can be chosen for appropriate temperature measurement ([0044]). A person of ordinary skill in the art would understand that this would include a configuration in which floating gate structures are provided at opposing ends of a plurality of active gate structures.
Because Mahon in view of Feng and Pihet are both directed toward resistive temperature measurement of memory devices it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Mahon in view of Feng and of Pihet to include wherein the plurality of floating gate structures surround a single active gate structure in order to provide temperature sensing at particularly temperature-critical locations of the transistor (Pihet, [0044]).
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Mahon in view of Feng as applied to claim 10 above, and further in view of Steinmann et al. (US PGPub 2019/0319180), herein referred to as Steinmann.
Regarding claim 15, Mahon in view of Feng teaches the structure of claim 10, but does not explicitly teach further comprising wiring lines connecting the plurality of floating gate structures. Mahon in view of Feng also teaches (Mahon, Fig. 3, a circuit view of the embodiments of Fig. 2B), the floating gate structure (147) in electrical series with resistive elements for temperature sensing. Mahon in view of Feng teaches wherein multiple floating gate structures can be arranged on a single device for temperature sensing and shows in Fig. 3 where only one input/output line is provided for floating gates, but does not explicitly depict wiring lines connecting the plurality of floating gate structures.
Steinmann teaches (Fig. 2) use of conductive strips or connections (24, [0023]) for electrical connection of conductive silicon elements (16, 18, [0023]) in a transistor device (22, [0023]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the conductive strips of Steinmann to provide electrical connections to the multiple floating gate structures of Mahon in view of Feng for the predictable result of creating electrical bridging between multiple conductive structures.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
US PGPub 2018/0321094 – Jang et al., CN 11123861A – Xuerui et al.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to EMILY N FARMER whose telephone number is (703)756-1472. The examiner can normally be reached Monday-Friday 7:30-5:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at 571-272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/EMILY FARMER/Examiner, Art Unit 2812
/DAVIENNE N MONBLEAU/Supervisory Patent Examiner, Art Unit 2812