DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
Claims 1-5, 7-13, and 15-20 are pending.
Claims 1, 2, 7, 10, and 20 are amended.
Claim 20 is withdrawn.
Drawings
The objections to the drawings of 01/16/2026 have been overcome.
The drawings are objected to under 37 CFR 1.83(a) because they fail to show metal wiring lines as described in the specification. The metal wiring line terminals (shown in Fig. 4 as 24c) of the figures appear to be visually obstructed by the wiring lines (for example, 24e and 24d of Figs. 1-4). Any structural detail that is essential for a proper understanding of the disclosed invention should be shown in the drawing. MPEP § 608.02(d). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Response to Arguments/Amendments
Applicant’s arguments, see pages 8-9, filed 04/16/2026, with respect to amended claims 1 and 10 under 35 U.S.C. 112(a) for the written description requirement, have been fully considered and are persuasive. The rejection of 01/16/2026 has been withdrawn.
Applicant’s arguments, see pages 9-12, filed 04/16/2026, with respect to the rejection of claims 1-5, 7-13, and 15-19 under 35 U.S.C 112(a) for the enablement requirement have been fully considered and are persuasive. The rejection of 01/16/2026 has been withdrawn.
Applicant's arguments filed 04/16/2026, with respect to the rejection of claims 1-5, 7-13, and 15-19 under 35 U.S.C. 112(b) as being indefinite, have been fully considered but they are not persuasive. Specifically, the applicant fails to clarify how a floating gate, defined by the applicant in the remarks of 10/14/2025 as “a gate structure that is electrically isolated,” is, in fact, floating, when it is described as containing a current source, in at least paragraph 0023 of the instant application. The applicant has failed to provide sufficient evidence that the floating gates of the instant application are floating as defined by the applicant to mean the common meaning to one of ordinary skill in the art. The rejection of 01/16/2026 is maintained.
Applicant’s arguments, filed 04/16/2026, with respect to the rejection of claims 1-5, 7-13, and 15-19 under 35 U.S.C. 103 have been fully considered but they are not persuasive. Specifically, amendment of independent claims 1 and 10 to include the claim limitation “and wiring lines connecting to the multiple floating gate structures” fails to overcome the prior art rejection of record. Additionally, regarding applicant’s arguments against the combination of Mahon and Feng, the cited embodiment Fig. 1C of Mahon teaches a built-in temperature sensor utilizing floating gate plates formed on each transistor so that each transistor’s temperature can be monitored independently. The cited paragraph 0030 of Feng teaches wherein metal wiring can extend across gate structures in order to provide a serpentine pattern, and connections at nodes of the metal wiring of Feng are not used to provide active device connection. One of ordinary skill would have known that the interconnecting wiring portions of Feng could be used to connect the floating gates of Mahon to thus form a serpentine floating gate structure across multiple transistor structures. The rejection of 01/16/2026 is maintained.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
The rejection of claims 1-5, 7-13, and 15-19 under 35 U.S.C 112(b) of 01/16/2026 as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention, is upheld. It has been replicated below.
Claims 1-5, 7-13, and 15-19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claims 1 and 10, where applicant acts as his or her own lexicographer to specifically define a term of a claim contrary to its ordinary meaning, the written description must clearly redefine the claim term and set forth the uncommon definition so as to put one reasonably skilled in the art on notice that the applicant intended to so redefine that claim term. Process Control Corp. V. HydReclaim Corp., 190 F.3d 1350, 1357, 52 USPQ2d 1029, 1033 (Fed. Cir. 1999). The term "floating gate structure" in claim 1, 2, and 4-19 is defined by the applicant in the response filed 10/14/2025 to be "a gate structure that is electrically isolated, which stores charge by trapping electrons on the floating gate, allowing it to retain data long term without power." However, it is unclear how a temperature sensor would be built using this definition of a floating gate structure, as the claims and specification detail wherein direct electrical connection is provided to the floating gate through at least wiring lines (force and sensing lines), and with no disclosure of an insulating or isolating layer to isolate from the active device, in direct contradiction to the applicant-provided definition of a gate having electrical isolation. One of ordinary skill in the art would not thus, understand the term "floating gate structure" as the ordinary meaning, as provided by the applicant. In the event that the applicant is acting as his or her own lexicographer, sufficient disclosure has not been provided in the application to clearly redefine the claim term and set forth the uncommon definition so as to put one reasonably skilled in the art on notice that the applicant intended to so redefine that claim term.
For the purposes of examination, it will be interpreted that the "floating gate structure" is a semiconductor material manufactured of a same material as an active gate structure, but not performing active gate function, consistent with at least paragraph 0018 of the specification.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 8-12, 16, 17, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Mahon et al. (US PGPub 2019/0028065), herein Mahon, and further in view of Feng et al. (US PGPub 2018/0038742), herein Feng.
Regarding claim 1, Mahon teaches (Fig. 2B) a structure comprising: at least one active gate structure (145); and a built-in temperature sensor (147) adjacent to and on a same device level as the at least one active gate structure (145, [0060]), the built-in temperature sensor further comprising force lines (210a, 210b) and sensing lines (212a, 212b), wherein the built-in temperature sensor comprises multiple floating gate structures (147, [0062]) surrounding multiple active gate structures (145, [0062]), and wiring lines (210a, 210b, 212a, 212b, [0063]) connecting to the multiple floating gate structures. Mahon does not explicitly teach in a serpentine configuration.
Feng teaches (Fig. 2) a built-in temperature sensor (208, [0026]) in a serpentine configuration ([0030]), wherein force and sensing lines (2091, 2091, [0049]) are located at end points of the serpentine structure (4-point Kelvin detection is described as an appropriate embodiment, [0049]).
Because Mahon and Feng are both directed toward built-in temperature sensing of semiconductor devices, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Mahon and Feng to include a serpentine configuration, in order to allow for resistive temperature measurement across extended device features (i.e. the gate lines of Feng, [0030]).
Regarding claim 2, Mahon in view of Feng teaches (Mahon, Fig. 2B) the structure of claim 1, wherein the built-in temperature sensor comprises floating gate structures (147, [0060]) which are connected to the force lines (210a, 210b, [0063]) and sensing lines (212a, 212b, [0063]).
Regarding claim 3, Mahon in view of Feng teaches (Mahon, Fig. 2B) the structure of claim 1, wherein the built-in temperature sensor (147) is parallel to the at least one active gate structure (145, [0054]).
Regarding claim 8, Mahon in view of Feng teaches the structure of claim 1, but does not explicitly teach wherein the built-in temperature sensor comprises multiple floating gate structures surrounding inner active gate structures.
Mahon teaches a further embodiment wherein multiple floating gate structures (147) may be formed along an array of a few transistors in a device ([0062]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further combine the teachings of Mahon to include wherein the built-in temperature sensor comprises multiple floating gate structures surrounding inner active gate structures for the purpose of sampling more representative temperatures across the gate array ([0062]).
Regarding claim 9, Mahon in view of Feng teaches the structure of claim 8, wherein the force lines (210a, 210b) and the sense lines (212a, 212b) connect to a single (147) of the multiple floating gate structures ([0062]).
Regarding claim 10, Mahon teaches (Fig. 2B, adjacent structures not pictured) a structure comprising: a plurality of adjacent active gate structures (145, [0062]); and a built-in temperature sensor comprising a plurality of floating gate structures (147, [0062]) within source/drain regions (162, 160, [0054]) of selective active gates of the plurality of active gate structures, and wiring lines (210a, 210b, 212a, 212b, [0063]) connecting to the multiple floating gate structures. Mahon does not explicitly teach in a serpentine configuration.
Feng teaches (Fig. 2) a built-in temperature sensor (208, [0026]) in a serpentine configuration ([0030]), wherein force and sensing lines (2091, 2091, [0049]) are located at end points of the serpentine structure (4-point Kelvin detection is described as an appropriate embodiment, [0049]).
Because Mahon and Feng are both directed toward built-in temperature sensing of semiconductor devices, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Mahon and Feng to include a serpentine configuration, in order to allow for resistive temperature measurement across extended device features (i.e. the gate lines of Feng, [0030]).
Regarding claim 11, Mahon in view of Feng teaches (Mahon, Fig. 2B) the structure of claim 10, wherein at least one of the floating gate structures (147) connect to the force lines (210a, 210b) and sensing lines (212a, 212b, [0063]).
Regarding claim 12, Mahon in view of Feng teaches (Mahon, Fig. 2B, adjacent structures not pictured) the structure of claim 10, wherein the plurality of floating gate structures (147, [0062]) are parallel to and surround the plurality of adjacent active gate structures (145, [0062]).
Regarding claim 16, Mahon in view of Feng teaches (Mahon, Fig. 2A, cross-section of Fig. 2B) the structure of claim 10, wherein the plurality of floating gate structures (147, [0060]) and the plurality of active gate structures (145, [0060]) are on a same device level ([0060]).
Regarding claim 17, Mahon in view of Feng teaches (Mahon, Fig. 2B) the structure of claim 10, wherein the force lines (210a, 210b, [0063]) and sensing lines (212a, 212b, [0063]) extend from a same floating gate structure (147, [0062]) of the plurality of floating gate structures ([0062]).
Regarding claim 19, Mahon in view of Feng teaches (Mahon, Fig. 2B) the structure of claim 10, wherein the built-in temperature sensor comprises multiple floating gate structures (147, [0062]) surrounding inner active gate structures (145, [0062]).
Claims 4, 5, 13, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Mahon in view of Feng as applied to claims 1 and 10 above, and further in view of Pihet et al. (US PGPub 2003/0210507), herein referred to as Pihet.
Regarding claim 4, Mahon in view of Feng teaches the structure of claim 1, but does not explicitly teach wherein the built-in temperature sensor comprises two floating gate structures surrounding a single active gate structure.
Pihet teaches (Fig. 5) wherein the built-in temperature sensor comprises two floating gate structures (Ga, Gc, [0044]) surrounding a single active gate structure (Gb, [0044]).
Because Mahon in view of Feng and Pihet are both directed toward resistive temperature sensing of a memory device, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Mahon in view of Feng and of Pihet in order to allow for temperature sensing at temperature-critical locations of the transistor (Pihet, [0044]).
Regarding claim 5, Mahon in view of Feng and Pihet teaches the structure of claim 4, and further teaches (Mahon, Fig. 2B) wherein the two floating gate structures are located between source/drain regions (162, 160, [0054]) of the single active gate structure (145, [0062]).
Regarding claim 13, Mahon in view of Feng teaches the structure of claim 10, but does not explicitly teach wherein the plurality of floating gate structures surround a single active gate structure.
Pihet teaches (Fig. 5) wherein the plurality of floating gate structures (Ga, Gb, Gd, Ge, [0044]) surrounds a single active gate structure (Gc, [0044]). Pihet teaches wherein the number and position of floating gate structures surrounding an active gate can be chosen for appropriate temperature measurement ([0044]). A person of ordinary skill in the art would understand that this would include a configuration in which multiple floating gates surrounded an single active gate structure.
Because Mahon in view of Feng and Pihet are both directed toward resistive temperature measurement of memory devices it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Mahon in view of Feng and of Pihet to include wherein the plurality of floating gate structures surround a single active gate structure in order to provide temperature sensing at particularly temperature-critical locations of the transistor (Pihet, [0044]).
Regarding claim 18, Mahon in view of Feng teaches the structure of claim 10, but does not explicitly teach wherein the plurality of floating gate structures are provided at opposing ends of the plurality of active gate structures.
Pihet teaches (Fig. 5) wherein the plurality of floating gate structures (Ga, Gn, [0044]) are provided at opposing ends of the plurality of active gate structures (Gb, Gc, Gd, Ge [0044]). Pihet teaches wherein the number and position of floating gate structures surrounding an active gate can be chosen for appropriate temperature measurement ([0044]). A person of ordinary skill in the art would understand that this would include a configuration in which floating gate structures are provided at opposing ends of a plurality of active gate structures.
Because Mahon in view of Feng and Pihet are both directed toward resistive temperature measurement of memory devices it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Mahon in view of Feng and of Pihet to include wherein the plurality of floating gate structures surround a single active gate structure in order to provide temperature sensing at particularly temperature-critical locations of the transistor (Pihet, [0044]).
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Mahon in view of Feng as applied to claim 10 above, and further in view of Steinmann et al. (US PGPub 2019/0319180), herein referred to as Steinmann.
Regarding claim 15, Mahon in view of Feng teaches the structure of claim 10, but does not explicitly teach further comprising wiring lines connecting the plurality of floating gate structures. Mahon in view of Feng also teaches (Mahon, Fig. 3, a circuit view of the embodiments of Fig. 2B), the floating gate structure (147) in electrical series with resistive elements for temperature sensing. Mahon in view of Feng teaches wherein multiple floating gate structures can be arranged on a single device for temperature sensing and shows in Fig. 3 where only one input/output line is provided for floating gates, but does not explicitly depict wiring lines connecting the plurality of floating gate structures.
Steinmann teaches (Fig. 2) use of conductive strips or connections (24, [0023]) for electrical connection of conductive silicon elements (16, 18, [0023]) in a transistor device (22, [0023]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to utilize the conductive strips of Steinmann to provide electrical connections to the multiple floating gate structures of Mahon in view of Feng for the predictable result of creating electrical bridging between multiple conductive structures.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to EMILY N FARMER whose telephone number is (703)756-1472. The examiner can normally be reached Monday-Friday 7:30-5:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at 571-272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/EMILY FARMER/Examiner, Art Unit 2812
/DAVIENNE N MONBLEAU/Supervisory Patent Examiner, Art Unit 2812
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