DETAILED ACTION
This Action is responsive to the Amendment filed on 05/13/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 05/13/2026 has been entered.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the claimed embodiment derived from the scope of Claim 19 and Claim 20, which depends from Claim 19, recited as “an etch stop layer disposed between the porous carbon-doped silicon dioxide layer and the fluorine-doped ILD layer” (emphasis added) of Claim 19 and “the first plurality of interconnects comprise vias that extend through the etch stop layer” (emphasis added) of Claim 20 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
Claim 20 is rejected under 35 U.S.C. 112(a) as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, had possession of the claimed invention.
Claim 20, which depends from Claim 19, recites the limitation: “the first plurality of interconnects comprise vias that extend through the etch stop layer” (emphasis added). The first plurality of interconnects 112 are in the first ILD layer 110 and the first plurality of interconnects 112 extend through etch stop layer 108, which is located below the first ILD layer 110 (see Applicants’ Specification para 0023 – para 0025). However, Claim 19 recites the limitation: “the etch stop layer disposed between the porous carbon-doped silicon dioxide layer and the fluorine-doped ILD layer” (emphasis added) as opposed to being located below the first ILD layer. Therefore, the claimed limitations of Claim 20 are not described in the specification in such a way as to reasonably convey to one skilled in the art that the inventor had possession of the claimed invention.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 4 and 22 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, regards as the invention.
Claim 4 recites the limitation: “the porous carbon-doped silicon dioxide layer comprises an aspect ratio of 3.8 when a pitch of the plurality of interconnects is between 28 nm and 39 nm.” In interconnect structures, aspect ratio is the proportional relationship between height/depth and width of a feature, such as vias and lines of an interconnect. It is unclear whether the limitation is intended to mean the layer comprises features, such as vias and lines, that have an aspect ratio of 3.8 or that the layer itself has an aspect ratio of 3.8 derived from the layer’s height and the layer’s width. Therefore, Claim 4 has been rendered indefinite.
Under the principles of compact prosecution, the Examiner will interpret the claimed limitation as meaning that the porous carbon-doped silicon dioxide layer comprises features, such as vias and lines, that have an aspect ratio of 3.8.
Claim 22 recites the limitation: “the first ILD layer comprises an aspect ratio of 3.8 when the metal line pitch is between 28 nm and 39 nm.” In interconnect structures, aspect ratio is the proportional relationship between height/depth and width of a feature, such as vias and lines of an interconnect. It is unclear whether the limitation is intended to mean the layer comprises features, such as vias and lines, that have an aspect ratio of 3.8 or that the layer itself has an aspect ratio of 3.8 derived from the layer’s height and the layer’s width. Therefore, Claim 22 has been rendered indefinite.
Under the principles of compact prosecution, the Examiner will interpret the claimed limitation as meaning that the first ILD layer comprises features, such as vias and lines, that have an aspect ratio of 3.8.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 6, 8, 11-12, 14-15, 21, and 26 are rejected under 35 U.S.C. 103 as being unpatentable over Chattopadhyay (US 8,173,537), in view of Ridgeway (US 2020/0354386), in view of Kumar (US 2004/0087133), in view of Cheng (US 2005/0124151).
Regarding claim 1, Chattopadhyay (see, e.g., FIG. 1E) discloses a device, comprising:
a substrate e.g., semiconductor layer (not shown) (col. 5, lines 37-40);
a carbon-doped silicon dioxide layer 103 with a silicon-to-oxygen atomic ratio of 1:2 disposed on the substrate e.g., semiconductor layer (not shown) (col. 5, lines 44-53; col. 11, lines 46-48); and
a plurality of interconnects e.g., vias and metal lines disposed in the carbon-doped silicon dioxide layer 103 (col. 5, lines 53-55),
a fluorine-doped ILD layer 111, 115 disposed on the carbon-doped silicon dioxide layer 103 (col. 8, lines 8-9; col. 9, lines 39-40).
Although Chattopadhyay shows substantial features of the claimed invention, Chattopadhyay fails to expressly teach a porous carbon-doped silicon dioxide layer, wherein the porous carbon-doped silicon dioxide layer has a hardness of at least about 3 GPa and a dielectric constant of about 3.3; and that the fluorine-doped ILD layer has a dielectric constant different from the dielectric constant of the porous carbon-doped silicon dioxide layer, and wherein the fluorine-doped ILD layer has a hardness less than the hardness of the porous carbon-doped silicon dioxide layer.
Ridgeway teaches a porous carbon-doped silicon dioxide layer (often referred as CDO), e.g., porous dielectric film SivOwCxHyFz, e.g., where v=20%, w=40%, x=10%, y=30%, z=0%, wherein the porous carbon-doped silicon dioxide layer has a hardness of at least about 3 GPa and a dielectric constant of about 3.2 for the purpose of utilizing a porous dielectric film with increased carbon content thereby preventing pattern collapse of fine features and integration issues when depositing subsequent layers (Para 0005, Para 0008, Para 0010).
Although Ridgeway fails to specify that the dielectric constant is about 3.3, Ridgeway does teach that the dielectric constant is about 3.2. However, a prima facie case of obviousness exists where the claimed ranges or amounts do not overlap with the prior art but are merely close. In this case, the dielectric constant differs by 0.1. Therefore, the properties of the porous carbon-doped silicon dioxide layer would have the same properties of the claimed invention. Titanium Metals Corp. of America v. Banner, 778 F.2d 775, 783, 227 USPQ 773, 779 (Fed. Cir. 1985) (Court held as proper a rejection of a claim directed to an alloy of "having 0.8% nickel, 0.3% molybdenum, up to 0.1% iron, balance titanium" as obvious over a reference disclosing alloys of 0.75% nickel, 0.25% molybdenum, balance titanium and 0.94% nickel, 0.31% molybdenum, balance titanium. "The proportions are so close that prima facie one skilled in the art would have expected them to have the same properties.").
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the carbon-doped silicon dioxide layer of Chattopadhyay to be a porous carbon-doped silicon dioxide layer having a hardness of at least about 3 GPa and a dielectric constant of about 3.2 (3.3) as described by Ridgeway, Titanium Metals for the purpose of utilizing a porous dielectric film with increased carbon content thereby preventing pattern collapse of fine features and integration issues when depositing subsequent layers (Para 0005).
Kumar (see, e.g., FIG. 1(c)) teaches a fluorine-doped ILD layer 6 having a dielectric constant of 2.4 to 4, and a hardness of 1 GPa to 6 GPa (Para 0046). Cheng, on the other hand, teaches that increasing the hardness of a low-k dielectric is associated with a lower leakage current and a higher breakdown voltage (Para 0003).
The combination of Chattopadhyay/Ridgeway/Kumar/Cheng teaches that the fluorine-doped ILD layer 111, 115 (as taught by Chattopadhyay and modified by Kumar) has a dielectric constant e.g., 4 (as taught by Kumar) different from the dielectric constant e.g., 3.3 (as taught by Ridgeway) of the porous carbon-doped silicon dioxide layer 103 (as taught by Chattopadhyay and modified by Ridgeway, Titanium Metals), and wherein the fluorine-doped ILD layer 111, 115 (as taught by Chattopadhyay and modified by Kumar) has a hardness e.g., 2 GPa (as taught by Kumar) less than the hardness e.g., at least about 3 GPa of the porous carbon-doped silicon dioxide layer 103 (as taught by Chattopadhyay and modified by Ridgeway, Titanium Metals) (Chattopadhyay: col. 5, lines 44-53; col. 8, lines 8-9; col. 9, lines 39-40; Ridgeway: Para 0010; Kumar: Para 0046).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the fluorine-doped layer of Chattopadhyay to have the mechanical properties of the fluorine-doped layer as described by Kumar for the purpose of providing low-k dielectric layer that enables a lower leakage current and a higher breakdown voltage in a metal interconnect (Cheng: Para 0003).
Regarding claim 2, Ridgeway teaches the device of claim 1, wherein that a refractive index of the porous carbon-doped silicon dioxide layer is at least about 1.42 for light having a wavelength of 633 nm (Para 0010).
Examiner Note: The porous carbon-doped silicon dioxide layer of Ridgeway is of the same material as disclosed by applicant (see, e.g., Para 0025 of the disclosure as originally filed), which would result in the claimed properties of the porous carbon-doped silicon dioxide layer. The burden is upon the Applicant to prove otherwise. See In re Fitzgerald 205 USPQ 594.
Regarding claim 3, Ridgeway teaches the device of claim 1, wherein that a density of the porous carbon-doped silicon dioxide is at least about 1.6 g/cm3 (Para 0010).
Examiner Note: The porous carbon-doped silicon dioxide layer of Ridgeway is of the same material as disclosed by applicant (see, e.g., Para 0025 of the disclosure as originally filed), which would result in the claimed properties of the porous carbon-doped silicon dioxide layer. The burden is upon the Applicant to prove otherwise. See In re Fitzgerald 205 USPQ 594.
Regarding claim 6, the combination of Chattopadhyay (see, e.g., FIG. 1E) / Ridgeway teaches the device of claim 1, further comprising an etch stop layer 109 (as taught by Chattopadhyay) disposed between the porous carbon-doped silicon dioxide layer 103 (as taught by Chattopadhyay and modified by Ridgeway, Titanium Metals) and the fluorine-doped ILD layer 111, 115 (as taught by Chattopadhyay), wherein the etch stop layer 109 (as taught by Chattopadhyay) comprises a thickness of about 20 nm, e.g., 200 angstroms (Chattopadhyay: col. 6, lines 10-25).
Regarding claim 8, Chattopadhyay (see, e.g., FIG. 1E) teaches the device of claim 1, wherein that the fluorine-doped ILD layer 111, 115 comprises a fluorine-doped silicon dioxide layer (col. 8, lines 8-9; col. 9, lines 39-40).
Examiner Note: Examiner notes that fluorine-doped silica glass (often referred to fluorosilicate glass, or FSG) is a specialized glass material where a small percentage of oxygen atoms in the silica (SiO2) network are substituted with fluorine.
Regarding claim 11, Chattopadhyay (see, e.g., FIG. 1E) discloses a semiconductor device comprising:
semiconductor substrate e.g., semiconductor layer (not shown) (col. 5, lines 37-40);
a first interlayer dielectric (ILD) layer 103 disposed on the semiconductor substrate e.g., semiconductor layer (not shown), the first ILD layer 103 comprising a carbon-doped silicon dioxide layer with a silicon-to-oxygen atomic ratio of 1:2 (col. 5, lines 44-53; col. 11, lines 46-48);
vias and metal lines e.g., left most vias and metal lines of 107 disposed in the first ILD layer 103, the vias e.g., left most vias of 107 having a via pitch e.g., via 107 spacing and the metal lines e.g., left most metal lines of 107 having a metal line pitch e.g., metal line 107 spacing (col. 5, lines 53-55); and
a second ILD layer 111, 115 disposed on the first ILD layer 103, the second ILD layer 111, 115 comprising a fluorine-doped silicon dioxide layer (col. 8, lines 8-9; col. 9, lines 39-40; col. 9, line 67; col. 10, lines 1-3),
Although Chattopadhyay shows substantial features of the claimed invention, Chattopadhyay fails to expressly teach the first interlayer dielectric (ILD) layer comprises a hardness of at least 3.2 GPa and a dielectric constant of about 3.3; and a second ILD layer with a hardness and a dielectric constant that are the same as the hardness and dielectric constant of the first ILD layer.
Ridgeway teaches a porous carbon-doped oxide layer (often referred as CDO), e.g., porous dielectric film SivOwCxHyFz, e.g., where v=20%, w=40%, x=10%, y=30%, z=0%, having a hardness of at least about 3.2 and a dielectric constant of about 3.2 for the purpose of utilizing a porous dielectric film with increased carbon content thereby preventing pattern collapse of fine features and integration issues when depositing subsequent layers (Para 0005, Para 0008, Para 0010).
Although Ridgeway fails to specify that the dielectric constant is about 3.3, Ridgeway does teach that the dielectric constant is about 3.2. However, a prima facie case of obviousness exists where the claimed ranges or amounts do not overlap with the prior art but are merely close. In this case, the dielectric constant differs by 0.1. Therefore, the properties of the porous carbon-doped silicon dioxide layer would have the same properties of the claimed invention. Titanium Metals Corp. of America v. Banner, 778 F.2d 775, 783, 227 USPQ 773, 779 (Fed. Cir. 1985) (Court held as proper a rejection of a claim directed to an alloy of "having 0.8% nickel, 0.3% molybdenum, up to 0.1% iron, balance titanium" as obvious over a reference disclosing alloys of 0.75% nickel, 0.25% molybdenum, balance titanium and 0.94% nickel, 0.31% molybdenum, balance titanium. "The proportions are so close that prima facie one skilled in the art would have expected them to have the same properties.").
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the carbon-doped silicon dioxide layer of Chattopadhyay to be a porous carbon-doped silicon dioxide layer having a hardness of at least about 3.2 GPa and a dielectric constant of about 3.2 (3.3) as described by Ridgeway, Titanium Metals for the purpose of utilizing a porous dielectric film with increased carbon content thereby preventing pattern collapse of fine features and integration issues when depositing subsequent layers (Para 0005).
Kumar (see, e.g., FIG. 1(c)) teaches an ILD layer 6, e.g., fluorine doped silicon glass (FSG) comprises a dielectric constant of 2.4 to 4 and a hardness of 1 GPa to 6 GPa (Para 0030, Para 0046). Cheng, on the other hand, teaches that increasing the hardness of a low-k dielectric is associated with a lower leakage current and a higher breakdown voltage (Para 0003).
Examiner Note: Examiner notes that fluorine-doped silica glass (often referred to fluorosilicate glass, or FSG) is a specialized glass material where a small percentage of oxygen atoms in the silica (SiO2) network are substituted with fluorine.
The combination of Chattopadhyay/Ridgeway/Kumar further teaches that the second ILD layer 111, 115 (as taught by Chattopadhyay as modified by Kumar) with a hardness e.g., at least about 3.2 GPa and a dielectric constant e.g., about 3.3 that are the same as the hardness e.g., at least about 3.2 GPa and dielectric constant e.g., about 3.3 GPa of the first ILD layer 103 (as taught by Chattopadhyay and modified by Ridgeway, Titanium Metals) (Chattopadhyay: col. 8, lines 8-9; col. 9, lines 39-40; Kumar: Para 0030, Para 0046; Ridgeway: Para 0010).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the hardness of the second ILD layer of Chattopadhyay to be at least 3.2 (3.3) GPa as described by Kumar for the purpose of providing low-k dielectric layer that enables a lower leakage current and a higher breakdown voltage in a metal interconnect (Cheng: Para 0003).
Regarding claim 12, Ridgeway teaches the semiconductor device of claim 11, wherein the hardness of the first ILD layer is between about 3.2 GPa and about 7 GPa (Para 0010).
Regarding claim 14, the combination of Chattopadhyay (see, e.g., FIG. 1E) / Ridgeway teaches the semiconductor device of claim 11, wherein a refractive index of the first ILD layer 103 (as taught by Chattopadhyay and modified by Ridgeway, Titanium Metals) is between about 1.42 and about 1.48 (col. 5, lines 44-53).
Examiner Note: The first ILD layer of Chattopadhyay/Ridgeway is of the same material as disclosed by applicant (see, e.g., Para 0025 of the disclosure as originally filed), which would result in the claimed property of the first ILD layer. The burden is upon the Applicant to prove otherwise. See In re Fitzgerald 205 USPQ 594.
Regarding claim 15, the combination of Chattopadhyay (see, e.g., FIG. 1E) / Ridgeway teaches semiconductor device of claim 11, wherein a density of the first ILD layer 103 (as taught by Chattopadhyay and modified by Ridgeway, Titanium Metals) is between about 1.6 g/cm3 and about 1.9 g/cm3 (col. 5, lines 44-53).
Examiner Note: The first ILD layer of Chattopadhyay/Ridgeway is of the same material as disclosed by applicant (see, e.g., Para 0017, Para 0025 of the disclosure as originally filed), which would result in the claimed property of the first ILD layer. The burden is upon the Applicant to prove otherwise. See In re Fitzgerald 205 USPQ 594.
Regarding claim 21, combination of Chattopadhyay (see, e.g., FIG. 1E) / Kumar (see, e.g., FIG. 1(c)) teaches the device of claim 1, wherein that the fluorine-doped ILD layer 111, 115 (as taught by Chattopadhyay as modified by Kumar) comprises a fluorine-doped silicon dioxide layer and a dielectric constant of about 3.3 (Chattopadhyay: col. 8, lines 8-9; col. 9, lines 39-40; Kumar: Para 0003).
Examiner Note: Examiner notes that fluorine-doped silica glass (often referred to fluorosilicate glass, or FSG) is a specialized glass material where a small percentage of oxygen atoms in the silica (SiO2) network are substituted with fluorine.
Regarding claim 26, the combination of Chattopadhyay (see, e.g., FIG. 1E) / Ridgeway teaches the device of claim 11, further comprising an etch stop layer 109 (as taught by Chattopadhyay) disposed between the first 103 (as taught by Chattopadhyay and modified by Ridgeway, Titanium Metals) and second ILD layers 111, 115 (as taught by Chattopadhyay), wherein the etch stop layer 109 (as taught by Chattopadhyay) comprises a thickness of about 20 nm, e.g., 200 angstroms (Chattopadhyay: col. 6, lines 23-25).
Claims 4 and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Chattopadhyay (US 8,173,537), in view of Ridgeway (US 2020/0354386), in view of Kumar (US 2004/0087133), in view of Cheng (US 2005/0124151), and further in view of Lee (US 2015/0255330), in view of Doubina (US 2015/0299886), in view of Yu (US 2015/0318263).
Regarding claim 4, Chattopadhyay fails to expressly teach the device of claim 1, wherein the porous carbon-doped silicon dioxide layer comprises an aspect ratio of 3.8 when a pitch of the plurality of interconnects is between about 28 nm and about 39 nm.
Doubina (see, e.g., FIG. 1C) teaches a layer 103 comprises features, e.g., 123 an aspect ratio of 3.8 (Para 0040, Para 0042, Para 0064). Yu, on the other hand, teaches that narrower, taller vias improves the aspect ratio of the vias to between about 3 and about 10, which results in more compactly arranged via arrays (Para 0012).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the porous carbon-doped silicon dioxide layer of Chattopadhyay to comprise [features] an aspect ratio of 3.8 as described by Doubina/Yu for the purpose of improving the aspect ratio of the vias to between about 3 and about 10, which results in more compactly arranged via arrays.
Regarding a pitch of the plurality of interconnects is between about 28 nm and about 39 nm, Chattopadhyay (see, e.g., FIG. 1E), however, does show spacing (pitch) between the interconnects e.g., left most 124, 125. Lee, on the other hand, teaches that the via pitch 318 and the metal line pitch 310 are each less than about 40 nm (Para 0019). However, differences in pitch will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such difference is critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. See In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Since the applicant has not established the criticality (see next paragraph) of the interconnect pitch as being between about 28 nm and about 39 nm, it would have been obvious to one of ordinary skill in the art to modify the pitch to be between about 28 nm and about 39 nm as taught by Lee.
CRITICALITY
The specification contains no disclosure of either the critical nature of the claimed pitch being between about 28 nm and about 39 nm or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Regarding claim 22, Chattopadhyay fails to expressly teach the semiconductor device of claim 11, wherein the first ILD layer comprises an aspect ratio of 3.8 when a pitch of the plurality of interconnects is between about 28 nm and about 39 nm.
Doubina (see, e.g., FIG. 1C) teaches a first ILD layer 103 comprises features, e.g., 123 an aspect ratio of 3.8 (Para 0040, Para 0042, Para 0064). Yu, on the other hand, teaches that narrower, taller vias improves the aspect ratio of the vias to between about 3 and about 10, which results in more compactly arranged via arrays (Para 0012).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the first ILD layer of Chattopadhyay to comprise [features] an aspect ratio of 3.8 as described by Doubina/Yu for the purpose of improving the aspect ratio of the vias to between about 3 and about 10, which results in more compactly arranged via arrays.
Regarding a pitch of the plurality of interconnects is between about 28 nm and about 39 nm, Chattopadhyay (see, e.g., FIG. 1E), however, does show spacing (pitch) between the interconnects e.g., left most 124, 125. Lee, on the other hand, teaches that the via pitch 318 and the metal line pitch 310 are each less than about 40 nm (Para 0019). However, differences in pitch will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such difference is critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. See In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Since the applicant has not established the criticality (see next paragraph) of the interconnect pitch as being between about 28 nm and about 39 nm, it would have been obvious to one of ordinary skill in the art to modify the pitch to be between about 28 nm and about 39 nm as taught by Lee.
CRITICALITY
The specification contains no disclosure of either the critical nature of the claimed pitch being between about 28 nm and about 39 nm or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Chattopadhyay (US 8,173,537), in view of Ridgeway (US 2020/0354386), in view of Kumar (US 2004/0087133), in view of Cheng (US 2005/0124151), and further in view of Lee (US 2015/0255330).
Regarding claim 16, Chattopadhyay fails to expressly teach that the interconnect pitch is between about 28 nm and about 39 nm. However, Chattopadhyay (see, e.g., FIG. 1E) does show spacing (pitch) between the interconnects e.g., left most 124, 125. Lee, on the other hand, teaches that the via pitch 318 and the metal line pitch 310 are each less than about 40 nm (Para 0019). However, differences in pitch will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such difference is critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. See In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Since the applicant has not established the criticality (see next paragraph) of the interconnect pitch as being between about 28 nm and about 39 nm, it would have been obvious to one of ordinary skill in the art to modify the pitch to be between about 28 nm and about 39 nm as taught by Lee.
CRITICALITY
The specification contains no disclosure of either the critical nature of the claimed pitch being between about 28 nm and about 39 nm or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Claims 17, 19, and 24-25 are rejected under 35 U.S.C. 103 as being unpatentable over Chattopadhyay (US 8,173,537), in view of Ridgeway (US 2020/0354386), in view of Lee (US 2015/0255330), in view of Kumar (US 2004/0087133), in view of Cheng (US 2005/0124151).
Regarding claim 17, Chattopadhyay (see, e.g., FIG. 1E) discloses a device, comprising:
a substrate e.g., semiconductor layer (not shown) (col. 5, lines 37-40);
a carbon-doped silicon dioxide layer 103 disposed on the substrate e.g., semiconductor layer (not shown) the carbon-doped silicon dioxide layer 103 having a silicon-to-oxygen atomic ratio of 1:2 (col. 5, lines 44-53; col. 11, lines 46-48); and
a first plurality of interconnects e.g., vias and metal lines in 103 disposed in the carbon-doped silicon dioxide layer 103, the first plurality of interconnects having a first pitch e.g., spacing between conductive routes (col. 5, lines 53-55),
a fluorine-doped ILD layer 111, 115 disposed on the first plurality of interconnects e.g., vias and metal lines in 103 (col. 8, lines 8-9; col. 9, lines 39-40),
a second plurality of interconnects 124, 125 disposed in the fluorine-doped ILD layer 111, 115, the second plurality of interconnects 124, 125 having a second pitch greater than the first pitch (col. 9, line 67; col. 10, lines 1-3).
Although Chattopadhyay shows substantial features of the claimed invention, Chattopadhyay fails to expressly teach a porous carbon-doped silicon dioxide layer, the porous carbon-doped silicon dioxide layer having a hardness greater than about 3 GPa and a dielectric constant of about 3.3; the first plurality of interconnects having a first pitch less than about 40 nm; and that the fluorine-doped ILD layer having a hardness less than the hardness of the porous carbon-doped silicon dioxide layer.
Ridgeway teaches a porous carbon-doped oxide layer (often referred as CDO), e.g., porous dielectric film SivOwCxHyFz, e.g., where v=20%, w=40%, x=10%, y=30%, z=0%, having a hardness greater than about 3 GPa and a dielectric constant of about 3.2 for the purpose of utilizing a porous dielectric film with increased carbon content thereby preventing pattern collapse of fine features and integration issues when depositing subsequent layers (Para 0005, Para 0008, Para 0010).
Although Ridgeway fails to specify that the dielectric constant is about 3.3, Ridgeway does teach that the dielectric constant is about 3.2. However, a prima facie case of obviousness exists where the claimed ranges or amounts do not overlap with the prior art but are merely close. In this case, the dielectric constant differs by 0.1. Therefore, the properties of the porous carbon-doped oxide layer would have the same properties of the claimed invention. Titanium Metals Corp. of America v. Banner, 778 F.2d 775, 783, 227 USPQ 773, 779 (Fed. Cir. 1985) (Court held as proper a rejection of a claim directed to an alloy of "having 0.8% nickel, 0.3% molybdenum, up to 0.1% iron, balance titanium" as obvious over a reference disclosing alloys of 0.75% nickel, 0.25% molybdenum, balance titanium and 0.94% nickel, 0.31% molybdenum, balance titanium. "The proportions are so close that prima facie one skilled in the art would have expected them to have the same properties.").
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the carbon-doped oxide layer of Chattopadhyay to be a porous carbon-doped oxide layer having a hardness of at least about 3 GPa and a dielectric constant of about 3.3 as described by Ridgeway, Titanium Metals for the purpose of utilizing a porous dielectric film with increased carbon content thereby preventing pattern collapse of fine features and integration issues when depositing subsequent layers (Para 0005).
Chattopadhyay fails to expressly teach that first plurality of interconnects having a first pitch less than about 40 nm. However, Chattopadhyay (see, e.g., FIG. 1E) does show spacing (pitch) between the interconnects e.g., vias and metal lines in 103. Lee, on the other hand, teaches that the via pitch 318 and the metal line pitch 310 are each less than about 40 nm (Para 0019). However, differences in pitch will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such difference is critical. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation”. See In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955).
Since the applicant has not established the criticality (see next paragraph) of the interconnect pitch having a pitch less than about 40 nm, it would have been obvious to one of ordinary skill in the art to modify the pitch to be less than about 40 nm as taught by Lee.
CRITICALITY
The specification contains no disclosure of either the critical nature of the claimed pitch being less than about 40 nm or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990).
Kumar (see, e.g., FIG. 1(c)) teaches a fluorine-doped ILD layer 6 having a hardness of 1 GPa to 6 GPa (Para 0046). Cheng, on the other hand, teaches that increasing the hardness of a low-k dielectric is associated with a lower leakage current and a higher breakdown voltage (Para 0003).
The combination of Chattopadhyay/Ridgeway/Kumar/Cheng teaches that the fluorine-doped ILD layer 111, 115 (as taught by Chattopadhyay and modified by Kumar) has a hardness e.g., 3 GPa (as taught by Kumar) less than the hardness e.g., greater than about 3 GPa of the porous carbon-doped silicon dioxide layer 103 (as taught by Chattopadhyay and modified by Ridgeway, Titanium Metals) (Chattopadhyay: col. 5, lines 44-53; col. 8, lines 8-9; col. 9, lines 39-40; Ridgeway: Para 0010; Kumar: Para 0046).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the fluorine-doped layer of Chattopadhyay to have the mechanical properties of the fluorine-doped layer as described by Kumar for the purpose of providing low-k dielectric layer that enables a lower leakage current and a higher breakdown voltage in a metal interconnect (Cheng: Para 0003).
Regarding claim 19, Chattopadhyay (see, e.g., FIG. 1E) teaches the device of claim 17, further comprises an etch stop layer 109 disposed between the carbon-doped silicon dioxide layer 103 and the fluorine-doped layer ILD layer 111, 115, wherein the etch stop layer 109 comprises a thickness of about 20 nm, e.g., 200 angstroms (col. 6, lines 10-25).
Regarding claim 24, Kumar (see, e.g., FIG. 1(c)) teaches the device of claim 17, wherein the hardness of the fluorine-doped ILD layer 6 is between about 3 GPa and about 7 GPa (Para 0046).
Regarding claim 25, Kumar (see, e.g., FIG. 1(c)) teaches the device of claim 17, wherein a refractive index of the fluorine-doped ILD layer is between about 1.42 and about 1.48.
Examiner Note: The first ILD layer of Chattopadhyay/Ridgeway is of the same material as disclosed by applicant (see, e.g., Para 0025 of the disclosure as originally filed), which would result in the claimed property of the first ILD layer. The burden is upon the Applicant to prove otherwise. See In re Fitzgerald 205 USPQ 594.
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Chattopadhyay (US 8,173,537), in view of Ridgeway (US 2020/0354386), in view of Lee (US 2015/0255330), in view of Kumar (US 2004/0087133), in view of Cheng (US 2005/0124151), and further in view of Lu (US 2012/0313256).
Regarding claim 18, Chattopadhyay (see, e.g., FIG. 1E) teaches that the substrate (not shown) comprises transistors (not shown) (col. 5, lines 35-41).
Although Chattopadhyay/Ridgeway/Lee/Kumar/Cheng shows substantial features of the claimed invention, Chattopadhyay fails to expressly teach the device of claim 17, wherein the transistors are in electrical contact with the first and second pluralities of interconnects.
Lu (see, e.g., FIG. 14) teaches that transistors 21 are in electrical contact with the first and second pluralities of interconnects 48 in M1; 64, 66 in M2 for the purpose of interconnecting the integrated circuit devices as functional circuits (Para 0001, Para 0009, Para 0013, Para 0018).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Chattopadhyay/Ridgeway/Lee/Kumar/Cheng to include transistors that are in electrical contact with the first and second pluralities of interconnect for the purpose of interconnecting the integrated circuit devices as functional circuits (Para 0001).
Response to Arguments
Applicant’s arguments with respect to claims 1, 11, and 17 have been considered but are moot because the new ground of rejection.
Conclusion
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/ANTONIO B CRITE/Primary Examiner, Art Unit 2817