DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of claims 1,2, 11-14, 16, and 17 in the reply filed on March 20, 2026 is acknowledged. The traversal is on the ground(s) that the search and examination of the entire application can be made without serious burden to the examiner as the claims of the present application would have to be searched in a closely related technical field that electronic searching is commonly performed so a search may be made across multiple subclasses without substantial additional effort . This is not found persuasive because the ascertained serious burden has been found by the examiner to be substantial as the various species are structurally different/distinct and would be found in different classes and subclasses and though the search may be electronic the differentiation and review of the search results is still performed by a human examiner. Those search result and the examination based upon them would be significant and burdensome.
The requirement is still deemed proper and is therefore made FINAL.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are:
Gas supply device is recited in claims 1, 2, 11-14, 16, and 17 where the functional language is gas supply where this structure supplies a processing gas and the generic placeholder is device
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
Gas supply device is interpreted as element 22 according to [0033] of the original specification the gas supply device may have one or more gas sources, one or more gas flow rate controller, and one or more on/off valves.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 and 2 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Kawakami et al (WO 2020090427 using the Machine Generated English Translation provided herewith).
Regarding claim 1. The prior art of Kawakami et al teaches a plasma processing apparatus comprising: a chamber 1; a lower electrode 6 included in a substrate support 2 disposed in the chamber; an upper electrode 16 disposed to face the lower electrode 6 ; a gas supply device 15 configured to supply a processing gas to a gap between the upper electrode and the lower electrode; an RF power supply 7 configured to generate plasma of the processing gas by applying an RF voltage to the upper electrode; and a circuit (see plurality of circuits 31 in Fig. 6) electrically connected between the lower electrode and ground and configured to provide a potential to the lower electrode, wherein the circuit includes a first circuit and a second circuit, the first circuit has a rectifier (diode 33) , a capacitor 32, a first current path, and a second current path, both the first current path and the second current path are disposed between the lower electrode and the ground, in the first current path, the rectifier is electrically connected between the lower electrode and the capacitor, and the capacitor is electrically connected between the rectifier and the ground, in the second current path, the rectifier is electrically connected between the lower electrode and the ground, the rectifier is configured to allow a current to flow toward the capacitor in the first current path and to allow a current to flow toward the lower electrode in the second current path, and the second circuit is electrically connected to the capacitor and is configured to provide a voltage generated in the capacitor. See Fig. 6 below of Kawakami et al for the first and second current paths.
PNG
media_image1.png
822
618
media_image1.png
Greyscale
PNG
media_image2.png
699
673
media_image2.png
Greyscale
See Figs 5 and 6 Kawakami et al
Regarding claim 2. The plasma processing apparatus of Kawakami et al teaches the rectifier has a first element and a second element, the first element is a first diode electrically connected between the lower electrode and the capacitor in the first current path, the second element is a second diode electrically connected between the lower electrode and the ground in the second current path, a cathode of the first diode is electrically connected to the capacitor and an anode of the first diode is electrically connected to the lower electrode, and a cathode of the second diode is electrically connected to the lower electrode and an anode of the second diode is electrically grounded. The prior art of Kawakami et al teaches a plasma processing apparatus with a lower electrode 6 and teaches that an impedance setting unit 30 see Figs. 5 and 6 where the impedance setting unit 30 includes an inductor 34, a plurality of series circuits 31-1 to 31-n connected in series to the inductor 34, a plurality of inductors 124, and a plurality of resistors 125. One end of the inductor 34 is connected to the electrode 6 of the stage 2. as a capacitor 32 and a diode 33. In the present embodiment, the diode 33 is, for example, a PIN diode. The capacitor 32 is an example of an impedance circuit, and the diode 33 is an example of a switch element. As another form, the capacitor 32 may be a circuit including at least one of a capacitor and an inductor, for example. Further, the diode 23 may be composed of a switch using at least one of a diode and a transistor. In each series circuit 31, one end of the capacitor 32 is connected to the inductor 34, the other end of the capacitor 32 is connected to the anode of the diode 33, and the cathode of the diode 33 is grounded. In each series circuit 31, the anode of the diode 33 may be connected to the inductor 34, the cathode of the diode 33 may be connected to one end of the capacitor 32, and the other end of the capacitor 32 may be grounded. In addition, in each series circuit 31, the anode of the diode 33 is connected to the driver circuit 127 via the inductor 124 and the resistor 125 that are connected in series. The node between the inductor 124 and the resistor 125 is grounded via the capacitor 126. The inductor 124 and the capacitor 126 form a low pass filter (LPF). The driver circuit 127 has a diode switch driver circuit and a high-voltage DC power supply circuit, and is controlled by the control device 12. In each of the series circuits 31, a positive or negative bias voltage is applied from the driver circuit 127 via the LPF composed of the inductor 124 and the capacitor 126 and the resistor 125, so that the diode 33 is turned on or off, and the inductor 34 is turned on. The electrode 6 of the stage 2 is grounded via the capacitor 32. As a result, the stage 2 is grounded.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 11 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Kawakami et al (WO 2020090427 using the Machine Generated English Translation provided herewith)in view of Yasui Hisateru et al (JP2002208587 using the Machine Generated English Translation provided herewith).
The prior art of Kawakami et al was discussed above.
The prior art of Kawakami et al fails to teach fails to teach the second circuit as recited in claims 1 and 2 is a variable resistance element.
The prior art of Yasui Hidateru et al teaches an apparatus for plasma treatment with a lower electrode 115 and a potential control circuit 126 comprising a variable capacitor C1 and a variable resistor R1. Providing a variable resistor enhances control of the incidence of ions on the auxiliary electrode 127. By controlling the plasma potential above, there is an effect that the occurrence of charging damage can be suppressed and the uniformity of etching by the scavenging action can be improved. Thus, it would have been obvious for one of ordinary skill in the art before the effective filing date of the present invention further modify the apparatus of Kawakami et al by providing a variable resistance element (R1) as suggested by Yasui Hidateru et al.
PNG
media_image3.png
420
544
media_image3.png
Greyscale
Fig 5 of Yasui Hidateru et al
Claim 13 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Kawakami et al (WO 2020090427 using the Machine Generated English Translation provided herewith) in view of view of Grimbergen et al (US 9,378,930).
The prior art of Kawakami et al was discussed above.
The prior art of Kawakami et al fails to teach fails to teach a third circuit electrically connected between the first circuit and the second circuit and configured to shield an RF voltage, wherein the third circuit has a capacitor and an inductor, and the capacitor and the inductor of the third circuit are electrically connected in parallel between the capacitor of the first circuit and the second circuit.
The prior art Grimbergen et al teaches an inductively coupled plasma reactor having RF phase control where Fig. 4 illustrates a four section example of a lumped element delay line where a plurality of inductors in series and a plurality of capacitors are disposed in parallel to the ground. According to the prior art of Grimbergen et al lumped element circuits typically LC circuits can be provided to have the desired delay. Each section can be switched on or off as desired. The primary advantage of this lumped element is to obviate the need to house long coaxial cable lengths See col. 6 lines 7-38 where Grimbergen et al teaches that the lumped elements provide greater reliability because it does not require power or signal conditioning to function, signal fidelity, wide bandwidth, small physical size. Thus, it would have been obvious for one of ordinary skill in the art before the effective filing date of the present invention further modify the apparatus of Kawakami et al by providing a third circuit that has a capacitor and an inductor, and the capacitor and the inductor of the third circuit are electrically connected in parallel between the capacitor of the first circuit and the second circuit as suggested by Grimbergen et al.
PNG
media_image4.png
328
678
media_image4.png
Greyscale
Fig. 4 of Grimbergen et al
Claims 16 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Kawakami et al (WO 2020090427 using the Machine Generated English Translation provided herewith in view of Lenz et al (US 8,674,255).
The prior art of Kawakami et al was discussed above.
The prior art of Kawakami et al fails to teach: a ring electrode that is disposed around the lower electrode and is electrically grounded.
The prior art of Lenz et al teaches an apparatus and method for controlling etching uniformity where a ground shield 119 surrounds (and is in contact with) focus ring 110 which surrounds lower electrode 106. The motivation to provide the ground shelf to contact the focus ring is to provide a second grounding pathway so that edge region of the substrate can be processed and plasma and thus etching uniformity can be better controlled and ensured. Thus, it would have been obvious for one of ordinary skill in the art before the effective filing date of the present invention to modify the apparatus of Kawakami et al by providing a ground shield 119 surrounds (and is in contact with) focus ring 110 which surrounds lower electrode 106 which would ground the ring electrode and enhance plasma processing on the edge of the substrate as suggested by the prior art of Lenz et al.
PNG
media_image5.png
518
648
media_image5.png
Greyscale
Fig. 1 of Lenz et al
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Yamawaku et al (US 10,283,328) teaches plasma processing apparatus with a parallel electrodes 14 and 17a see Fig. 2.
Morii et al (WO 2018092855) teaches pin diodes D used as switching elements to control power.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SYLVIA MACARTHUR whose telephone number is (571)272-1438. The examiner can normally be reached M-F 8:30-5 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Parviz Hassanzadeh can be reached at 571-272-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/SYLVIA MACARTHUR/Primary Examiner, Art Unit 1716