Prosecution Insights
Last updated: October 02, 2026
Application No. 17/876,788

DISPLAY APPARATUS

Final Rejection §103
Filed
Jul 29, 2022
Priority
Aug 10, 2021 — RE 10-2021-0105479
Examiner
WARD, DAVID WILLIAM
Art Unit
2891
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Display Co., Ltd.
OA Round
4 (Final)
62%
Grant Probability
Moderate
5-6
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 62% of resolved cases
62%
Career Allowance Rate
48 granted / 77 resolved
-5.7% vs TC avg
Strong +37% interview lift
Without
With
+37.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
72 currently pending
Career history
145
Total Applications
across all art units

Statute-Specific Performance

§103
60.6%
+20.6% vs TC avg
§102
15.7%
-24.3% vs TC avg
§112
23.1%
-16.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 77 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment The Office acknowledges receipt on 17 April 2026 of Applicants’ amendments in which claims 1, 2, 6, 16, and 21 are amended, claim 9 is cancelled, and claim 22 is newly added. The Office withdraws the drawing objection, the section 112(a) new matter rejection, and the indefiniteness rejection identified in the Office Communication dated 20 January 2026 in view of the amendments. Response to Arguments Applicants’ arguments with respect to independent claim(s) 1 and 21 have been considered but are not persuasive. Applicants argue with respect to claim 1 (and similarly with respect to claim 21) that Zhao and Lee do not teach the subject matter newly added to the claim whereby “a second sub-line which is spaced apart from the auxiliary pixel circuit in a direction along the substrate, wherein an insulating layer is disposed between the first sub-line and the second sub-line, and the first sub-line and the second sub-line are connected electrically to each other through a contact hole of the insulating layer, and wherein the contact hole is defined outside of the auxiliary display area.” Claims 1 and 21 are rejected over the combined teachings of Zhao and Lee. Obviousness can be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so. MPEP §2143.01. As this principle applies to the present circumstance, Zhao teaches in Fig. 10A a second sub-line (1052) which is spaced apart from the auxiliary pixel circuit (102) in a direction (horizontal) along the substrate (101), wherein an insulating layer (1042) is disposed between the first sub-line (1051) and the second sub-line (1052), and the first sub-line (1051) and the second sub-line (1052) are connected electrically to each other through a contact hole (contact hole interconnecting 1051 and 1052 through 1042) of the insulating layer (1042) {Fig. 10A; [0067]}, and wherein the contact hole (contact hole interconnecting 1051 and 1052 through 1042) is defined outside of the auxiliary display area (100c). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-8, 12, 13, 18, 19, and 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zhao et al. (US20210408200A1) in view of Lee et al. (US20170323936A1). Regarding claim 1, Zhao teaches in Fig. 10A a display apparatus comprising: a substrate (101) including an auxiliary display area (100c) and an auxiliary circuit area (portion of 100b between 100a and 100c) which is outside of the auxiliary display area (100c) {[0064]}; a plurality of layers on the substrate (101), the plurality of layers including: an auxiliary display element (106) which is on the auxiliary display area (100c) {[0064]}; and an auxiliary pixel circuit (102) on the auxiliary circuit area (100c) and connected to the auxiliary display element (106) {[0064]}; and a connection line (105) extending from the auxiliary circuit area (portion of 100b between 100a and 100c) to the auxiliary display area (100c), the connection line (105) connecting the auxiliary pixel circuit (102) to the auxiliary display element (106) {[0064]}, wherein the connection line (105) includes: a first sub-line {(1051 for most claims)/(1053 for claim 2)} {[0081]}, and a second sub-line {(1052 for most claims)/(1052 & portion of 1053 in 100a for claims 9 & 13)} which is spaced apart from the auxiliary pixel circuit (102) in a direction (horizontal) along the substrate (101), wherein an insulating layer {(1042 for most claims)/(1043 for claim 2)} is disposed between the first sub-line {(1051 for most claims)/(1053 for claim 2)} and the second sub-line {(1052 for most claims)/( 1052 & portion of 1053 in 100a for claims 9 & 13)}, and the first sub-line {(1051 for most claims)/(1053 for claim 2)} and the second sub-line {(1052 for most claims)/(1052 & portion of 1053 in 100a for claims 9 & 13)} are connected electrically to each other through a contact hole (contact hole interconnecting 1051/1053 and 1052 through 1042/1043) of the insulating layer {(1042 for most claims)/(1043 for claim 2)} {Fig. 10A; [0067]}, and wherein the contact hole (contact hole interconnecting 1051/1053 and 1052 through 1042/1043) is defined outside of the auxiliary display area (100c). Zhao does not expressly teach: the auxiliary display element includes electrodes facing each other with an emission layer therebetween; the auxiliary pixel circuit including: a thin-film transistor including a semiconductor layer, a gate electrode and a transistor electrode which is connected to the semiconductor layer; and a storage capacitor; the second sub-line is spaced apart from the thin-film transistor. In an analogous art, Lee teaches in Fig. 2: a display element (300) includes electrodes (310, 330) facing each other with an emission layer (320) therebetween {[0052]}; a pixel circuit (circuit including T1 and Cst) including: a thin-film transistor (T1) including a semiconductor layer (A1), a gate electrode (G1) and a transistor electrode (D1) which is connected to the semiconductor layer (A1) {[0040]}; and a storage capacitor (Cst) {[0048]}. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Zhao’s display apparatus based on the teachings of Lee – such that Zhao’s auxiliary display element includes electrodes facing each other with an emission layer therebetween; and Zhao’s auxiliary pixel circuit includes: a thin-film transistor including a semiconductor layer, a gate electrode and a transistor electrode which is connected to the semiconductor layer; and a storage capacitor – so as to display imagery with a display element that is driven by an electrical signal generated by a pixel circuit. Lee [0035]. Moreover, all the claimed elements (e.g., display element, electrodes, emission layer, pixel circuit, etc.) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Lee) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07. A consequence of this modification is that Zhao’s second sub-line is spaced apart from the thin-film transistor of Zhao’s modified auxiliary pixel circuit. Regarding claim 2, Zhao as modified by Lee teaches the display apparatus of claim 1, and Zhao further teaches wherein the connection line (105) further includes a third sub-line (1051) electrically connected to the second sub-line (1052) {Fig. 10A; [0081]}, the second sub-line (1052) is closer to the substrate (101) than the first sub-line (1053) {Fig. 10A; [0081]}, and the second sub-line (1052) and the gate electrode (modified 102) are on {e.g., above} a same layer (101) {Fig. 10A; [0081]}. Regarding claim 3, Zhao as modified by Lee teaches the display apparatus of claim 1, and Zhao further teaches wherein the first sub-line (1051) and the transistor electrode (e.g., D1 of modified 102 or, e.g., electrode interconnecting 1051 and 102 through 1041) are on {e.g., above} a same layer (101) {Fig. 10A; [0081]}. Regarding claim 4, Zhao as modified by Lee teaches the display apparatus of claim 3, and Zhao further teaches wherein the first sub-line (1051) and the transistor electrode (e.g., D1 of modified 102) are on {e.g., above} the same layer (101) {Fig. 10A; [0081]}. Zhao does not expressly teach the first sub-line and the transistor electrode include different materials. However, Zhao teaches in paragraph [0087] the first sub-line (1051) may include any one of indium oxide, indium zinc oxide, or silver. Lee teaches in paragraph [0046] the transistor electrode (D1) may include any of Mo, Al, Cu, or Ti. The motivation for this modification is identified with respect to base claim 1. Moreover, all the claimed elements (e.g., sub-line, transistor electrode, different materials) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Zhao and Lee) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known material based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07. Regarding claim 5, Zhao as modified by Lee teaches the display apparatus of claim 1, and Zhao further teaches wherein the substrate (101) further includes a main display area (100a) which is outside of the auxiliary display area (100a) {Fig. 1; [0055]}, and the plurality of layers on the substrate (101) further comprises: a main display element (107) which is on the main display area (100a) {Fig. 10A; [0088]}; a main pixel circuit (103) which is on the main display area (100a) and connected to the main display element (107) {Fig. 10A; [0088]}; and a connection electrode (105 in 100a) which is on the main display area (100a) and connecting the main pixel circuit (103) and the main display element (107); wherein a portion of the connection line (105) and the connection electrode (105 in 100a) are on {e.g., above} a same layer (101/1041) {Fig. 10A; [0081]}. Regarding claim 6, Zhao as modified by Lee teaches the display apparatus of claim 1, and Zhao further teaches wherein the connection line (105) further includes a third sub-line (1053) electrically connected to the second sub-line (1052) {Fig. 10A; [0081]}, the second sub-line (1052) is on {e.g., above} a same layer (101) as the auxiliary pixel circuit (102) {Fig. 10A; [0081]}. Lee does not teach: the storage capacitor includes a lower electrode and an upper electrode, and the second sub-line is on a same layer as the lower electrode or the upper electrode of the storage capacitor. Lee teaches in Fig. 2 and paragraph [0048] a storage capacitor (Cst) includes a lower electrode (CE1) and an upper electrode (CE2). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Zhao’s display apparatus as modified by Lee based on the further teachings of Lee – such that the storage capacitor includes a lower electrode and an upper electrode – so the first electrode … of the storage capacitor … may be integrally formed with the gate electrode. Lee [0048]. Moreover, all the claimed elements (e.g., upper and lower electrodes, capacitor) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Lee) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07. A consequence of this modification is that Zhao’s second sub-line (1052) is on a same layer (e.g., substrate 101) as Zhao’s modified auxiliary pixel circuit (102), which includes the lower electrode (CE1) and the upper electrode (CE2) of Lee’s storage capacitor (Cst). Regarding claim 7, Zhao as modified by Lee teaches the display apparatus of claim 1, and Zhao further teaches wherein the plurality of layers further includes: a first planarization insulating layer (1041) {[0067]}; and a second planarization insulating layer (1042) on the first planarization insulating layer (1041) {[0067]}, wherein the first sub-line (1051) is on the first planarization insulating layer (1041), and the second sub-line (1052) is on the second planarization insulating layer (1051) {Fig. 10A; [0067]}. Regarding claim 8, Zhao as modified by Lee teaches the display apparatus of claim 1, and Zhao further teaches wherein the connection line (105) further includes a third sub-line (1053) which is spaced apart from the thin-film transistor (modified 102) in the direction (horizontal) along the substrate (101) and on a different layer (e.g., 1043) from the first sub-line (1051) and the second sub-line (1052) {Fig. 10A; [0067]}, and the third sub-line (1053) is electrically connected to the first sub-line (1051) or the second sub-line (1052) {Fig. 10A; [0067]}. Regarding claim 12, Zhao as modified by Lee teaches the display apparatus of claim 1, and Zhao further teaches wherein the plurality of layers further include a pixel-defining layer (108) on the substrate (101) and having an opening (opening in which 106 is disposed) in the auxiliary display area (100c), the opening (opening in which 106 is disposed) in the pixel-defining layer defining an auxiliary emission area (area directly above 106) {Fig. 10A; [0064]}, and the connection line (105) which connects the auxiliary pixel circuit (102) to the auxiliary display element (106) is spaced apart from the auxiliary emission area (area directly above 106) {Fig. 10A; [0080]}. Regarding claim 13, Zhao as modified by Lee teaches the display apparatus of claim 1, and Zhao further teaches wherein within the connection line (105) which connects the auxiliary pixel circuit (102) to the auxiliary display element (106) {Fig. 10A; [0080]}: one sub-line among the first sub-line (1051) and the second sub-line (1052, 1053) includes a plurality of segments (segments 1052 & 1053) {Fig. 10A; [0081]}, and the plurality of segments (segments 1052 & 1053) and the other sub-line (1051) among the first sub-line (1051) and the second sub-line (1052, 1053) are alternated along the connection line (105) and connected to each other {Fig. 10A; [0081]}. Regarding claim 18, Zhao as modified by Lee teaches the display apparatus of claim 1, and Zhao further teaches wherein a portion of the connection line (105) is in the auxiliary display area (100c) and includes a transparent conductive material (e.g., silver) {[0087]}. Regarding claim 19, Zhao as modified by Lee teaches the display apparatus of claim 1, and Zhao further teaches wherein the substrate (101) further includes a main display area (100a) in which a main display element (107) and a main pixel circuit (103) are arranged {Fig. 10A; [0055]}, and the auxiliary display area (100c) is arranged in contact with an outer boundary of the auxiliary circuit area (portion of 100b between 100a and 100c) {Figs. 1, 9A}. Regarding claim 21, Zhao teaches in Fig. 10A an electronic apparatus comprising: a display panel (100) {Fig. 1; [0055]}; and a component (photosensitive element) under the display panel (100) {Fig. 1; [0055]}, wherein the display panel (100) comprises: a substrate (101) including an auxiliary display area (100c) and an auxiliary circuit area (portion of 100b between 100a and 100c) which is outside of the auxiliary display area (100c) {[0064]}; a plurality of layers on the substrate (101), the plurality of layers including: an auxiliary display element (106) which is on the auxiliary display area (100c) {[0064]}; and an auxiliary pixel circuit (102) on the auxiliary circuit area (100c) and connected to the auxiliary display element (106) {[0064]}; and a connection line (105) extending from the auxiliary circuit area (portion of 100b between 100a and 100c) to the auxiliary display area (100c), the connection line (105) connecting the auxiliary pixel circuit (102) to the auxiliary display element (106) {[0064]}, wherein the connection line (105) includes: a first sub-line (1051) {[0081]}, and a second sub-line (1052) which is non-overlapping the auxiliary pixel circuit (102), wherein an insulating layer (1042) is disposed between the first sub-line (1051) and the second sub-line (1052), and the first sub-line (1051) and the second sub-line (1052) are connected electrically through a contact hole (contact hole interconnecting 1051 and 1052 through 1042) of the insulating layer (1042) {[0081]}, wherein the contact hole (contact hole interconnecting 1051 and 1052 through 1042) is defined outside of the auxiliary display area (100c). Zhao does not expressly teach: the auxiliary display element includes electrodes facing each other with an emission layer therebetween; the auxiliary pixel circuit including: a thin-film transistor including a semiconductor layer, a gate electrode and a transistor electrode which is connected to the semiconductor layer; and a storage capacitor; the second sub-line is non-overlapping the thin-film transistor. Lee teaches in Fig. 2: a display element (300) includes electrodes (310, 330) facing each other with an emission layer (320) therebetween {[0052]}; a pixel circuit (circuit including T1 and Cst) including: a thin-film transistor (T1) including a semiconductor layer (A1), a gate electrode (G1) and a transistor electrode (D1) which is connected to the semiconductor layer (A1) {[0040]}; and a storage capacitor (Cst) {[0048]}. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Zhao’s electronic apparatus based on the teachings of Lee – such that Zhao’s auxiliary display element includes electrodes facing each other with an emission layer therebetween; and Zhao’s auxiliary pixel circuit includes: a thin-film transistor including a semiconductor layer, a gate electrode and a transistor electrode which is connected to the semiconductor layer; and a storage capacitor – so as to display imagery with a display element that is driven by an electrical signal generated by a pixel circuit. Lee [0035]. Moreover, all the claimed elements (e.g., display element, electrodes, emission layer, pixel circuit, etc.) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Lee) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07. A consequence of this modification is that Zhao’s second sub-line is non-overlapping the thin-film transistor of Zhao’s modified auxiliary pixel circuit. Claim(s) 11 and 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zhao in view of Lee as applied to claim 1 above, and further in view of Chen et al. (US20230329065A1). Regarding claim 11, Zhao as modified by Lee teaches the display apparatus of claim 1, and Zhao further teaches wherein the auxiliary display element (106) is provided in plural including a plurality of auxiliary display elements (106) {[0059]}. Zhao does not expressly teach the display apparatus further comprises an auxiliary electrode line which electrically connects the plurality of auxiliary display elements to each other. In an analogous art, Chen teaches in Fig. 1C and paragraph [0034] an auxiliary electrode line (103) which electrically connects a plurality of auxiliary display elements (101) to each other. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Zhao’s display apparatus as modified by Lee based on the teachings of Chen – such that an auxiliary electrode line electrically connects the plurality of auxiliary display elements to each other – so that the plurality of auxiliary display elements may be driven by the same driving circuit. Chen [0031]. Moreover, all the claimed elements (e.g., auxiliary electrode line, auxiliary display elements) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Chen) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07. Regarding claim 22, Zhao as modified by Lee teaches the display apparatus of claim 1, but Zhao does not teach in the embodiment illustrated by Fig. 10A wherein the contact hole is in the auxiliary circuit area. In an analogous art, Chen teaches in Fig. 1D and paragraphs [0060] a contact hole, interconnecting a first sub-line (1082/1081) and a second sub-line (1081/1082), is in an auxiliary circuit area (100c). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Zhao’s display apparatus as modified by Lee based on the teachings of Chen – such that Zhao’s contact hole is in Zhao’s auxiliary circuit area, as taught by Chen – so that the contact hole, a corresponding driving circuit, and all interconnecting conductive wiring material therebetween do not diminish the light transmittance of the light-transmitting display region. Chen [0094]. Claim(s) 14-17 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zhao in view of Lee as applied to claim 1 above, and further in view of Long et al. (US20220302241A1). Regarding claim 14, Zhao as modified by Lee teaches the display apparatus of claim 1, and Zhao further teaches wherein the substrate (101) further includes a main display area (100a), the main display area (100a) being arranged to surround at least a portion of the auxiliary display area (100c) {Fig. 1; [0055]}. Zhao does not necessarily teach: a peripheral area which is outside the main display area, the peripheral area being arranged to surround at least a portion of the auxiliary display area, and the auxiliary circuit area is spaced apart from the auxiliary display area with the main display area therebetween. In an analogous art, Long teaches in Fig. 1 and paragraph [0051] a peripheral area (200) which is outside a main display area (100B), the peripheral area (200) being arranged to surround at least a portion of an auxiliary display area (100A), and an auxiliary circuit area (area of 12s) is spaced apart from the auxiliary display area (100A) with the main display area (100B) therebetween. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Zhao’s display apparatus as modified by Lee based on the teachings of Long – such that a peripheral area is outside the main display area, the peripheral area being arranged to surround at least a portion of the auxiliary display area, and the auxiliary circuit area is spaced apart from the auxiliary display area with the main display area therebetween – which prevents a light-blocking layer in the first pixel driving circuit … from affecting a light transmittance, and thus improves the light transmittance in the transparent display … and ensures a good photographing effect. Long [0052]. Moreover, all the claimed elements (e.g., peripheral area, main display area, auxiliary display area, the auxiliary circuit area) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Long) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07. Regarding claim 15, Zhao as modified by Lee and Long teaches the display apparatus of claim 14, but Zhao does not teach wherein the peripheral area includes the auxiliary circuit area. Long teaches in Fig. 1 and paragraph [0051] a peripheral area (200) includes an auxiliary circuit area (area of 12s). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Zhao’s display apparatus as modified by Lee and Long based on the further teachings of Long – such that the peripheral area includes the auxiliary circuit area – which prevents a light-blocking layer in the first pixel driving circuit … from affecting a light transmittance, and thus improves the light transmittance in the transparent display … and ensures a good photographing effect. Long [0052]. Moreover, all the claimed elements (e.g., peripheral area, auxiliary circuit area) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Long) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07. Regarding claim 16, Zhao as modified by Lee and Long teaches the display apparatus of claim 14, and Zhao further teaches wherein the contact hole (contact hole interconnecting 1051/1053 and 1052 through 1042/1043) is in the main display area (100a) {Fig. 10A}. Regarding claim 17, Zhao as modified by Lee teaches the display apparatus of claim 1, and Zhao further teaches wherein the substrate (101) further includes a main display area (100a), the main display area (100a) being arranged to surround at least a portion of the auxiliary display area (100c) {Fig. 1; [0055]}, and the auxiliary circuit area (portion of 100b between 100a and 100c) meets the auxiliary display area (100c) at a boundary therebetween {Figs. 1, 9A}. Zhao does not necessarily teach a peripheral area which is outside the main display area, the peripheral area being arranged to surround at least a portion of the auxiliary display area. Long teaches in Fig. 1 and paragraph [0051] a peripheral area (200) which is outside a main display area (100B), the peripheral area (200) being arranged to surround at least a portion of an auxiliary display area (100A). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Zhao’s display apparatus as modified by Lee based on the teachings of Long – such that a peripheral area (which includes an auxiliary circuit area) is outside the main display area, the peripheral area being arranged to surround at least a portion of the auxiliary display area – which prevents a light-blocking layer in the first pixel driving circuit … from affecting a light transmittance, and thus improves the light transmittance in the transparent display … and ensures a good photographing effect. Long [0052]. Moreover, all the claimed elements (e.g., peripheral area, main display area, auxiliary display area) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Long) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07. Regarding claim 20, Zhao as modified by Lee teaches the display apparatus of claim 19, but Zhao does not teach wherein the plurality of layers on the substrate further comprises a driving circuit which drives the main pixel circuit of the main display area, and the driving circuit overlaps the auxiliary display area and overlaps the auxiliary display element. Long teaches in Figs. 2, 3, and 5 and paragraphs [0058-0059] a plurality of layers on a substrate (98) further comprises a driving circuit (83, etc.) which drives a main pixel circuit (22) of a main display area (100B), and the driving circuit (83, etc.) overlaps the auxiliary display area (100A) and overlaps the auxiliary display element (11). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Zhao’s display apparatus as modified by Lee based on the teachings of Long – such that the plurality of layers on the substrate further comprises a driving circuit which drives the main pixel circuit of the main display area, and the driving circuit overlaps the auxiliary display area and overlaps the auxiliary display element – to provide a common electrode for both the main and auxiliary display elements and thereby reduce manufacturing resources (e.g., different materials, processing operations/time). Long [0058-0059]. Moreover, all the claimed elements (e.g., driving circuit, main pixel circuit, main display area, auxiliary display area, auxiliary display element) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Long) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID WARD whose telephone number is (703)756-1382. The examiner can normally be reached 6:30-3:30 EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at (571)-272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /D.W.W./Examiner, Art Unit 2891 /MATTHEW C LANDAU/Supervisory Patent Examiner, Art Unit 2891
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Prosecution Timeline

Show 2 earlier events
Jun 12, 2025
Response Filed
Jul 23, 2025
Final Rejection mailed — §103
Sep 10, 2025
Response after Non-Final Action
Oct 23, 2025
Request for Continued Examination
Oct 31, 2025
Response after Non-Final Action
Jan 20, 2026
Non-Final Rejection mailed — §103
Apr 17, 2026
Response Filed
Aug 19, 2026
Final Rejection mailed — §103 (current)

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Patent 12731641
MICROELECTRONIC DEVICES INCLUDING INTERCONNECTIONS, RELATED MEMORY DEVICES AND ELECTRONIC SYSTEMS
4y 4m to grant Granted Sep 08, 2026
Patent 12733147
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
4y 2m to grant Granted Sep 08, 2026
Patent 12733239
UNDER EPITAXY ISOLATION STRUCTURE
4y 1m to grant Granted Sep 08, 2026
Patent 12720880
Method for Forming Backside Illumination CMOS Image Sensor
3y 9m to grant Granted Aug 25, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
62%
Grant Probability
99%
With Interview (+37.4%)
3y 8m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 77 resolved cases by this examiner. Grant probability derived from career allowance rate.

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