DETAILED ACTION
Election/Restrictions
Applicant’s election without traverse to the restriction requirement mailed on 10/22/25 of Group A (claim 1-8), in the reply filed on 10/22/25 was acknowledged in a previous office action. Applicant has canceled originally-filed, nonelected claims 9-20.
Newly submitted claims 21-33 are directed to an invention that is independent or distinct from the invention originally claimed for the following reasons: Claims 21-33 are a group D, which is distinct from Group A for similar reasons as listed in section 2 of the 10/22/25 restriction requirement, being subcombinations disclosed as usable together in a single combination.
Subcombination A requires the limitations
forming a metal silicide layer on a capacitor side of a semiconductor material layer and on the capacitor side of a polysilicon layer of a memory stack on a substrate,
the semiconductor material layer and the polysilicon layer having the capacitor side and an opposing bit line side;
forming a capacitor adjacent to and in contact with the metal silicide layer on the capacitor side of the semiconductor material layer and the polysilicon layer; and
forming a bit line on the bit line side of the semiconductor material layer and the polysilicon layer,
the bit line extending through the memory stack to a substrate.
Subcombination D requires the limitations:
forming an active opening through a memory stack on a substrate,
the memory stack comprising one or more of a sacrificial layer, a poly-silicon layer, a first material layer, a second material layer, and a semiconductor material layer, and
recessing the first material layer through the active opening to form a recessed region;
depositing a gate oxide layer on the poly-silicon layer and on the semiconductor material layer within the recessed region;
forming a word line in the recessed region, the word line comprising one or more of a barrier layer and a word line metal;
depositing a fill material in the active opening;
forming a slit pattern opening through the memory stack;
forming a capacitor opening by recessing the poly-silicon layer and the semiconductor material layer through the slit pattern opening;
forming a metal silicide layer on the poly-silicon layer and the semiconductor material layer through the slit pattern opening;
forming a capacitor within the capacitor opening, wherein the capacitor is adjacent to and in contact with the metal silicide layer;
forming a bit line opening in the fill material; and
forming a bit line in the bit line opening.
The underlined limitations of subcombination A are not required by subcombination D, and the underlines limitations of subcombination D are not required by subcombination A.
Since applicant has received an action on the merits for the originally presented invention, this invention has been constructively elected by original presentation for prosecution on the merits. Accordingly, claims 21-33 are withdrawn from consideration as being directed to a non-elected invention. See 37 CFR 1.142(b) and MPEP § 821.03.
To preserve a right to petition, the reply to this action must distinctly and specifically point out supposed errors in the restriction requirement. Otherwise, the election shall be treated as a final election without traverse. Traversal must be timely. Failure to timely traverse the requirement will result in the loss of right to petition under 37 CFR 1.144. If claims are subsequently added, applicant must indicate which of the subsequently added claims are readable upon the elected invention.
Should applicant traverse on the ground that the inventions are not patentably distinct, applicant should submit evidence or identify such evidence now of record showing the inventions to be obvious variants or clearly admit on the record that this is the case. In either instance, if the examiner finds one of the inventions unpatentable over the prior art, the evidence or admission may be used in a rejection under 35 U.S.C. 103 or pre-AIA 35 U.S.C. 103(a) of the other invention.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2021/0104527 A1 (“Son”) in view of US 2021/0013210 A1 (“Lee”).
Son teaches, for example:
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Son teaches and/or would have suggested as obvious to one of ordinary skill in the art at the time of invention:
1. A method of forming a memory device, the method comprising:
forming a metal silicide layer (e.g. SC2, see e.g. Fig. 3) on a capacitor side of a semiconductor material layer (e.g. top SP as shown in Fig. 3) and on the capacitor side of a polysilicon layer (e.g. second-to-top SP as shown in Fig. 3) of a memory stack on a substrate (e.g. SUB),
the semiconductor material layer and the polysilicon layer having the capacitor side and an opposing bit line side (see e.g. Fig.3, wherein the left sides thereof face the bitline and are the “opposing bit line side” and wherein the right sides thereof face the capacitor and are the “capacitor side”);
forming a capacitor (comprising e.g. EL1, DL, and EL2) adjacent to and in contact with the metal silicide layer on the capacitor side of the semiconductor material layer and the polysilicon layer (see e.g. Fig. 3); and
forming a bit line (e.g. BL) on the bit line side of the semiconductor material layer and the polysilicon layer (see e.g. Fig. 3),
the bit line extending through the memory stack to a substrate (see e.g. Fig. 2).
Son does not explicitly teach that the SP is made of “polysilicon”. Rather, it is merely disclosed as “silicon” (see e.g. 31).
However, the use of polysilicon in DRAM for the channels of the transistors is well known. For example: Lee teaches using polysilicon for the material of the channel and source/drain regions of the transistors (see e.g. para 93, 98).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add the invention of Lee, including the use of polycrystalline silicon as the “silicon” of the transistors, to the invention of Son. The motivation to do so is that the combination produces the predictable results of using a material that may be deposited in the layers above the monocrystalline silicon wafer for use in thin-film transistors, and which may be appropriately doped (see e.g. para 98-99).
Applicant has not disclosed that the claimed material is for a particular unobvious purpose, produces an unexpected result, or is otherwise critical, which are criteria that have been held to be necessary for material limitations to be prima facie unobvious. The claimed material is considered to be a "preferred" or "optimum" material out of a plurality of well known materials that a person of ordinary skill in the art at the time the invention was made would have found obvious to provide to the invention of the cited prior art reference, using routine experimentation and optimization of the invention. In re Leshin, 125 USPQ 416 (CCPA 1960).
2. The method of claim 1, wherein the memory stack comprises one or more of a sacrificial layer, a first material layer, a second material layer, the semiconductor material layer, and the polysilicon layer (see the discussion of claim 1, where there are semiconductor patterns, which can reasonably be interpreted as a first material layer, and/or a second material layer, and/or a semiconductor layer; furthermore, in view of Lee, at least one channel would be made of a material that would reasonably allow the layer to be interpreted as a “polysilicon layer”).
3. The method of claim 2, wherein the first material layer comprises a first insulating material and the second material layer comprises a second insulating material (claim 2 only requires one or more of the various layers, so the first insulating layer and the second insulating layer are not positively required; furthermore, Son and Lee would have suggested as obvious to one of ordinary skill in the art first and second insulating layers having first and second insulating materials, see e.g. Figs. 2-3 of Son and e.g. Fig. 39 of Lee).
4. The method of claim 3, wherein the first material layer comprises a nitride layer and the second material layer comprises an oxide layer (claim 2 only requires one or more of the various layers, so the first insulating layer and the second insulating layer are not positively required; furthermore, Son and Lee would have suggested as obvious to one of ordinary skill in the art an oxide layer and a nitride layer, see e.g. para 37-39 of Son and e.g. para 65, 73, 115 of Lee).
Applicant has not disclosed that the claimed material is for a particular unobvious purpose, produces an unexpected result, or is otherwise critical, which are criteria that have been held to be necessary for material limitations to be prima facie unobvious. The claimed material is considered to be a "preferred" or "optimum" material out of a plurality of well known materials that a person of ordinary skill in the art at the time the invention was made would have found obvious to provide to the invention of the cited prior art reference, using routine experimentation and optimization of the invention. In re Leshin, 125 USPQ 416 (CCPA 1960).
5. The method of claim 4, wherein the first material layer comprises silicon nitride and the second material layer comprises silicon oxide (claim 2 only requires one or more of the various layers, so the first insulating layer and the second insulating layer are not positively required; furthermore, Son and Lee would have suggested as obvious to one of ordinary skill in the art a silicon oxide layer and a silicon nitride layer, see e.g. para 37-39 of Son and e.g. para 65, 73, 115 of Lee).
Applicant has not disclosed that the claimed material is for a particular unobvious purpose, produces an unexpected result, or is otherwise critical, which are criteria that have been held to be necessary for material limitations to be prima facie unobvious. The claimed material is considered to be a "preferred" or "optimum" material out of a plurality of well known materials that a person of ordinary skill in the art at the time the invention was made would have found obvious to provide to the invention of the cited prior art reference, using routine experimentation and optimization of the invention. In re Leshin, 125 USPQ 416 (CCPA 1960).
6. The method of claim 1, wherein the semiconductor material layer comprises poly-silicon (see discussion of claim 1)
7. The method of claim 1, wherein the metal silicide layer comprises a metal selected from one or more of titanium (Ti), tantalum (Ta), tungsten (W), ruthenium (Ru), iridium (Ir), and molybdenum (Mo) (see e.g. para 34, 60).
It would have been obvious to one of ordinary skill in the art that the cobalt, tungsten, and titanium silicides disclosed in Lee and Son are known equivalent materials that could each be used as the claimed silicide material.
It has been established that “the [obviousness] analysis need not seek out precise teachings directed to the specific subject matter of the challenged claim” because the Office or “a court can take account of the inferences and creative steps that a person of ordinary skill in the art would employ.” KSR Int’ Co. v. Teleflex Inc., 550 U.S. 398, 418 (2007). It is also well settled that a reference stands for all of the specific teachings thereof as well as the inferences one of ordinary skill in the art would have reasonably been expected to draw therefrom. See In re Fritch, 972 F.2d 1260, 1264-65 (Fed. Cir. 1992).
Applicant has not disclosed that the claimed material is for a particular unobvious purpose, produces an unexpected result, or is otherwise critical, which are criteria that have been held to be necessary for material limitations to be prima facie unobvious. The claimed material is considered to be a "preferred" or "optimum" material out of a plurality of well known materials that a person of ordinary skill in the art at the time the invention was made would have found obvious to provide to the invention of the cited prior art reference, using routine experimentation and optimization of the invention. In re Leshin, 125 USPQ 416 (CCPA 1960).
8. The method of claim 1, wherein forming the capacitor comprises depositing one or more of a lower electrode, a high-K dielectric layer, a top electrode, and a silicon germanium (SiGe) layer (see e.g. EL1, DL, and EL2 and e.g. para 58-59).
Response to Arguments
Applicant's arguments with respect to the pending claims have been considered but are moot in view of the new ground(s) of rejection.
Conclusion
Conclusion / Finality
Applicant's amendment changed the scope of the claims and necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Conclusion / Prior Art
The prior art made of record, because it is considered pertinent to applicant's disclosure, but which is not relied upon specifically in the rejections above, is listed on the Notice of References Cited.
Conclusion / Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kevin Parendo who can be contacted by phone at (571) 270-5030 or by direct fax at (571) 270-6030. The examiner can normally be reached Monday-Friday from 9 am to 4 pm ET.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Billy Kraig, can be reached at (571) 272-8660. The fax number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Kevin Parendo/Primary Examiner, Art Unit 2896
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