DETAILED ACTION
Claim Rejections - 35 USC § 103
1. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
2. Claim(s) 1 – 4, 6, 7, 9, 12, 25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (20230082312) in view of Furumi et al. (12,100,722) and further in view of Oshiyama (11508768).
With regard to claim 1, Chen et al. disclose an optical device (for example, see fig. 22), comprising:
a substrate (referred to as “A” by examiner’s annotation shown in fig. 22 below) comprising a first surface (a top surface) and a second surface (a bottom surface) opposite to the first surface;
first and second radiation sensing devices (the pixels forming in an array, include photodiode portions 405 in order convert incident light into an electrical signal, functioning as first and second radiation sensing devices) disposed in the substrate (A);
a first isolation structure (204) disposed in the substrate (A) and between the first and second radiation sensing devices, the first isolation structure (204) comprising a first surface (a top surface) and a second surface (a bottom surface) opposite to the first surface; and
a second isolation structure (440) disposed in the substrate (A) and on the first surface (the top surface) of the first isolation structure (204), comprising: a metal structure (430; the metal layer 430 comprises aluminum, tungsten, nickel, titanium, ruthenium metal material; for example, see paragraph [0036]);
a first dielectric layer (425) surrounding sidewalls and a bottom surface of the metal structure (430); and
a second dielectric layer (420) surrounding sidewalls and a bottom surface of the first dielectric layer (425).
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Chen et al. do not clearly disclose the second isolation structure vertically extends over the first surface of the substrate.
However, Furumi et al. disclose the second isolation structure (the structure, including layers 190, 810, functioning as a second isolation structure in fig. 21B or a structure 190, 192, 810, in fig. 28) vertically extends over the first surface (the top surface) of the substrate (A) (the substrate A as indicated in fig. 21B).
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Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified the Chen et al.’s device to have the second isolation structure vertically extends over the first surface of the substrate as taught by Furumi et al. in order to prevent the generation of crosstalk, and improve the sensitivity of the devices for enhancing a stability operation of the semiconductor device, as is known to one of ordinary skill in the art.
Chen et al. and Furumi et al. do not clearly disclose the second dielectric layer comprises a second dielectric constant higher than the first dielectric constant of the first dielectric layer.
However, Oshiyama disclose the second dielectric layer (45) comprises a second dielectric constant (tantalum oxide material having a high dielectric constant; for example, see column 5, lines 34 – 38) higher than the first dielectric constant (silicon oxide material having a low dielectric constant; for example, see column 5, lines 47 – 51) of the first dielectric layer (46). (for example, see fig. 8).
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Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified the Chen et al. and Furumi et al.’s device to have the second dielectric layer comprises a second dielectric constant higher than the first dielectric constant of the first dielectric layer as taught by Oshiyama in order to minimize the signal interference for enhancing a stability operation of the semiconductor device, as is known to one of ordinary skill in the art.
With regard to claim 2, Furumi et al. disclose the second surface (the bottom surface) of the first isolation structure (510A) is substantially coplanar with the second surface (the bottom surface) of the substrate (A).
With regard to claim 3, Furumi et al. disclose a height of the second isolation structure (the structure, including layers 190, 810, functioning as a second isolation structure) is greater than a height of the first isolation structure (510A).
With regard to claim 4, Furumi et al. disclose a width of the first isolation structure (510A) is greater than a width of the second isolation structure.
With regard to claim 6, Furumi et al. disclose the dielectric layer (810) is in physical contact with the first surface of the first isolation structure (510A).
With regard to claim 7, Furumi et al. disclose the dielectric layer (192, 810, fig. 28) comprises: the first dielectric layer (192) is an oxide layer surrounding the metal structure (190); and the second dielectric layer (810) is a high-k dielectric layer surrounding the first dielectric layer (192), wherein materials of the oxide layer (tantalum oxide; for example, column 17, lines 47, 48) and the high-k dielectric layer aluminum oxide, hafnium oxide; (for example, column 18, lines 57, 58) are different from each other.
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With regard to claim 9, Furumi et al. disclose the metal structure (190) comprises tungsten (for example, see column 16, lines 37 – 39).
With regard to claim 12, Furumi et al. disclose a buffer layer (a layer 200, forming below chip lenses 400, functioning as a buffer layer. Although the applicant uses terms different to those of Furumi et al. to label/describe the claimed invention, this does not result in any structural difference between the claimed invention and the prior art. The use different terminology to describe the plurality of elements that constitute an integrated circuit as this is just a writing style and the way in which a structural limitation is expressed does not affect the configuration of the described elements.) on the second isolation structure.
With regard to claim 25, Furumi et al. disclose an anti-reflecting coating (111, fig. 12) disposed on a surface (a top surface) of the substrate (12, fig. 12), wherein a sidewall of the anti-reflecting coating (111, fig. 12) is in contact with a sidewall of the second isolation structure (referred to as “12A” by examiner’s annotation shown in fig. 12 below)
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3. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (20230082312) in view of Furumi et al. (12,100,722) and further in view of NOUDO et al. (2024/0055456).
With regard to claim 5, Chen et al. and Furumi et al. do not clearly disclose the second isolation structure vertically extends by a distance of about 80 nm to about 130 nm over the first surface of the substrate.
However, NOUDO et al. disclose the second isolation structure (structures 124, 125 functioning as the second isolation structure) vertically extends by a distance (a distance is a thickness of the layer 125 is 100 nm; for example, see paragraph [0234]) of about 100 nm over the first surface (the top surface) of the substrate (140).
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Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified the Chen et al. and Furumi et al.’s device to have the second isolation structure vertically extends by a distance of about 100 nm over the first surface of the substrate as taught by Finkelstein in order to increase the probability of absorption of the incident photons by the photoelectric conversion unit for enhancing a stability operation of the semiconductor device, as is known to one of ordinary skill in the art.
5. Claim(s) 10, 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (20230082312) in view of Furumi et al. (12266674) and further in view of Finkelstein (11978754).
With regard to claims 10, 11, Chen et al. and Furumi et al.do not clearly disclose the first surface of the substrate comprises grooved regions substantially aligned with the first and second radiation sensing devices wherein the grooved regions comprise triangular-shaped profiles.
However, Finkelstein disclose the first surface (a top surface) of the substrate (301) comprises grooved regions (“A3” as indicated in fig. 3 below) substantially aligned with the first and second radiation sensing devices (“A1” and “A2” as indicated in fig. 3 below) wherein the grooved regions (A3) comprise triangular-shaped profiles.
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Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified the Chen et al. and Furumi et al.’s device to have the first surface of the substrate comprises grooved regions substantially aligned with the first and second radiation sensing devices wherein the grooved regions comprise triangular-shaped profiles as taught by Finkelstein in order to increase the probability of absorption of the incident photons by the photodiode for enhancing a stability operation of the semiconductor device, as is known to one of ordinary skill in the art.
6. Claim(s) 13, 15, 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (20230082312) in view of Jang et al. (12266674).
With regard to claim 13, Chen et al. disclose an optical device (for example, see fig. 22), comprising:
a substrate (referred to as “A” by examiner’s annotation shown in fig. 22 below) comprising a front-side surface and a back-side surface (one of a top surface and a bottom surface functioning as a front-side surface and a back-side surface);
first and second pixel structures (the pixels forming in an array, include photodiodes 405) disposed in the substrate (A);
a shallow trench isolation structure (204) disposed between the first and second pixel structures (the pixels forming in an array, include photodiodes 405);
a deep trench isolation structure (440) disposed on the STI structure (204), comprising: a metal structure (430; the metal layer 430 comprises aluminum, tungsten, nickel, titanium, ruthenium metal material; for example, see paragraph [0036]); and
a dielectric liner (a dielectric liner 420 or both layer 420, 425 functioning as a dielectric liner) disposed along sidewalls of the metal structure (430) and on the STI structure (204);
wherein a bottom surface of the dielectric liner (a dielectric liner 420 or both layer 420, 425 functioning as a dielectric liner) is in physical contact with a top surface of the STI structure (204).
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Chen et al. do not clearly disclose a grid structure disposed on the back-side surface of the substrate and aligned with the DTI structure wherein a color filter disposed adjacent to the grid structure and non-overlapping with the metal structure along a cross-sectional plane.
However, Jang et al. disclose a grid structure (a conductive structure 53 functioning as a grid structure) disposed on the back-side surface of the substrate (referred to as “B” by examiner’s annotation shown in fig. 17 below) and substantially aligned with the DTI structure (structure 43 functioning as the DTI structure); wherein a color filter (CF1) disposed adjacent to the grid structure (53) and non-overlapping with the metal structure (49) along a cross-sectional plane.
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Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified the Chen et al.’s device to have a grid structure disposed on the back-side surface of the substrate and aligned with the DTI structure wherein a color filter disposed adjacent to the grid structure and non-overlapping with the metal structure along a cross-sectional plane as taught by Jang et al. in order to enhance a high light efficiency of the semiconductor device for enhancing a stability operation of the semiconductor device, as is known to one of ordinary skill in the art.
With regard to claim 15, Chen et al. disclose the metal structure (430) comprises tungsten or aluminum. (for example, see paragraph [0036]).
With regard to claim 16, Jang et al. disclose a buffer layer (an insulating layer 23 functioning as buffer layer) between the metal structure (9) and the grid structure (27g).
7. Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (20230082312) in view of Jang et al. (12266674) and further in view of Furumi et al. (12,100,722).
With regard to claim 14, Chen et al. and Jang et al. do not clearly disclose a high-k dielectric layer comprising hafnium oxide and aluminum oxide surrounding the oxide layer.
However, Furumi et al. disclose the dielectric layer (192, 810, fig. 28) comprises: a high-k dielectric layer (810) comprising hafnium oxide, aluminum oxide, and inherently having a high-k dielectric layer (810) comprising hafnium oxide, and aluminum oxide (for example, column 18, lines 57, 58), surrounding the oxide layer (192),
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified the Chen et al. and Jang et al.’s device to have the oxide layer is silicon oxide layer as taught by Furumi et al. in order to minimize the signal interference for enhancing a stability operation of the semiconductor device, as is known to one of ordinary skill in the art.
8. Claim(s) 21 - 24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shiina et al. (12,035,063) in view of Chen et al. (20230082312).
With regard to claim 21, Shiina et al. disclose an optical device (for example, see fig. 8), comprising:
a substrate (referred to as “50A” by examiner’s annotation shown in fig. 8 below);
first and second radiation sensing devices (the pixels forming in an array, as shown in figs. 8, 9, include photodiodes PDs in order convert incident light into an electrical signal, functioning as first and second radiation sensing devices) disposed in the substrate (50A);
an isolation structure (referred to as “56A” by examiner’s annotation shown in fig. 8 below; wherein the isolation portion structure 56A is a part of the dielectric layer 56) disposed between the first and second radiation sensing devices;
a grooved region (referred to as “42A” by examiner’s annotation shown in fig. 8 below) disposed on a surface of the substrate (A);
a metal structure (wirings 63, 62, 61, inherently made of metal material, functioning as a metal structure) disposed on the isolation structure (56A); and
a dielectric structure (55, 53) surrounding the metal structure (63, 62, 61), wherein the metal structure (63, 62, 61) and the dielectric structure (55, 53) vertically extend over the grooved region (42A).
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Shiina et al. do not clearly disclose top surfaces of the metal structure and the dielectric structure are coplanar with each other.
However, Chen et al. disclose top surfaces of the metal structure (430) and the dielectric structure (420, 425) are coplanar with each other.
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Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified the Shiina et al.’s device to have top surfaces of the metal structure and the dielectric structure are coplanar with each other as taught by Chen et al. in order to minimize the signal interference for enhancing a stability operation of the semiconductor device, as is known to one of ordinary skill in the art.
Chen et al. and Shiina et al. do not clearly disclose the second dielectric layer comprises a second dielectric constant higher than the first dielectric constant of the first dielectric layer.
However, Oshiyama disclose the second dielectric layer (45) comprises a second dielectric constant (tantalum oxide material having a high dielectric constant; for example, see column 5, lines 34 – 38) higher than the first dielectric constant (silicon oxide material having a low dielectric constant; for example, see column 5, lines 47 – 51) of the first dielectric layer (46). (for example, see fig. 8).
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Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to have modified the Chen et al. and Shiina et al.’s device to have the second dielectric layer comprises a second dielectric constant higher than the first dielectric constant of the first dielectric layer as taught by Oshiyama in order to minimize the signal interference for enhancing a stability operation of the semiconductor device, as is known to one of ordinary skill in the art.
With regard to claim 22, Oshiyama discloses the first dielectric layer (46) comprises a silicon oxide layer (silicon oxide material having a low dielectric constant; for example, see column 5, lines 47 – 51); and wherein the second dielectric layer (layer 45 or antireflection film functioning as the second dielectric layer) comprises a high-k dielectric layer comprising hafnium oxide and aluminum oxide (for example, see column 5, lines 34 – 38, 63 - 66).
With regard to claim 23, Shiina et al. disclose a grid structure (structures 36, 37 functioning as a grid structure) disposed on the metal structure (61, 62, 63).
With regard to claim 24, Shiina et al. disclose a buffer layer (referred to as “53A” by examiner’s annotation shown in fig. 8 below) disposed between the metal structure (61, 62, 63) and the grid structure (structures 36, 37).
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Response to Amendment
10. Applicant's arguments with respect to claims have been considered but are moot in view of the new ground(s) of rejection.
Conclusion
12. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TAN N TRAN whose telephone number is (571) 272 - 1923. The examiner can normally be reached on 8:30-5:00PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached on (571) 272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/TAN N TRAN/
Primary Examiner, Art Unit 2812