Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
The amendments filed on 7/22/2025 have been fully considered and made of record in this application.
Response to Arguments
Applicant’s arguments with respect to claims 1-3, 5, 7-9, 13-17, 19, and 20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-3, 5, 13, 15, 17, 19, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Choi et al. (US 12,641,963) in view of Kim et al. (US 2021/0020716).
With respect to Claims 1 and 15, Choi discloses a substrate 100 including a first area (i.e. DA1), a second area (i.e. DA2), and a third area (i.e. PCP). The first area (i.e. DA1) and the second area (i.e. DA2) are a display area and the third area being a peripheral area surrounding the first and second areas. A substrate and a first pixel circuit PCm in the first area, and a first display element Pm connected to the first pixel circuit. A second display element Pa in the second area and a second pixel circuit PCa in the third area. A connection wiring TWL between the substrate 100 and the second display element Pa and connecting the second display element to the second pixel circuit. A first conductive layer DL in the first area (see col. 4 lines 40-67, col. 13 lines 1-67, and col. 19 lines 10-67; Figs. 5 and 6).
Choi fails to explicitly to disclose a first protective layer including a same material as the connection wiring and on the first conductive layer. However, Kim discloses
a first protective layer TFT1 D (i.e. may be a multi-layer structure with Ti on top including a same material as the connection wiring and on the first conductive layer; and the connection wiring 215_2 may also have Ti on top (see paragraphs 139 and 0152). Thus, Choi and Kim have substantially the same environment of a plurality of LED’s mounted on a substrate with a plurality of pixel circuits between the substrate and the LED’s. Therefore, it would have been obvious to one skilled in the art before the effective filing date of the claimed invention to incorporate a protection layer over the on the first conductive layer of Choi, since the protection layer would facilitate in a reliable electrically connecting the LED to the pixel circuit as taught by Kim.
With respect to Claim 2, Kim discloses a second conductive layer in the first area and on a same layer as the first conductive layer (Fig. 8/TFT1 source electrode S, which is on the same layer as D, [0134] lines 5-6); an insulating layer covering the first conductive layer and the second conductive layer (Fig. 8/118 organic insulating layer, [0153] line 1); and a third conductive layer (Fig. 8/215_1, [0152] line 1) on the insulating layer and connected to the first protective layer through a first contact hole defined in the insulating layer (Fig. 8/215_1 is connected to top of D by a conductive via, [0151], lines 1-3).
With respect to Claim 3, Kim discloses the first contact hole overlaps the first protective layer (Fig. 8/contact hole between 215_1 and D overlaps D in Z- direction).
With respect to Claim 5, Kim discloses an area of a lower surface of the first protective layer is a same as an area of an upper surface of the first conductive layer (Fig. 8/TFT1 D does not have a stepped sidewall, so the bottom of the first protective layer of Ti has the same area as the top surface of the conductive layer of Al).
With respect to Claims 13 and 20, Kim discloses a second conductive layer in the first area and in a same layer as the first conductive layer (Fig. 8/TFT1 source electrode S, which is on the same layer as D, [0134] lines 5-6). An insulating layer covering the first conductive layer and the second conductive layer (Fig. 8/118 organic insulating layer, [0153] line 1). A third conductive layer (Fig. 8/215_1, [0152] line 1) on the insulating layer and connected to the first protective layer through a first contact hole defined in the insulating layer (Fig. 8/215_1 is connected to top of D by a conductive via, [0151], lines 1-3).
With respect to Claim 17, Kim discloses the electronic device of claim 16, wherein the first contact hole overlaps the first protective layer (Fig. 8/contact hole between 215_1 and D overlaps D in Z-direction).
With respect to Claim 19, Kim discloses an area of a lower surface of the first protective layer is a same as an area of an upper surface of the first conductive layer (Fig. 8/TFT1 D does not have a stepped sidewall, so the bottom of the first protective layer of Ti has the same area as the top surface of the conductive layer of Al).
Claims 7-9 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Choi et al. (US 12,641,963) and Kim et al. (US 2021/0020716) as applied to claim 1 above, and further in view of US-11700748-B2 by Kim (hereinafter KIM2), as evidenced by “Enhanced sensitivity of silicon-photonics-based ultrasound detection via BCB coating” by Kumar (hereinafter KUMAR).
With respect to Claim 7, Choi–Kim fail to disclose an organic insulating layer above the connection wiring. Phase compensation layer below the connection wiring, wherein a refractive index of the phase compensation layer is less than a refractive index of the organic insulating layer.
However, Kim 2 and Kumar discloses it further comprising an organic insulating layer (Fig. 8/117, col. 14, lines 1-2) above the connection wiring (Fig. 8/BML, which is beneath 117). A phase compensation layer below the connection wiring (Fig. 8/PSL phase shift layer which is below BML, col. 7, line 50). A refractive index of the phase compensation layer is less than a refractive index of the organic insulating layer (the refractive index of PSL may be between about 1.0 and about 1.5 — col. 13, lines 1-2 — while the organic insulator may include BCB — col. 14, line 19 — which has an index of refraction of 1.54, KUMAR page 3, Table 1. Thus, Choi-Kim and Kim 2 and Kumar have substantially the same environment of a plurality of LED’s mounted on a substrate with a plurality of pixel circuits between the substrate and the LED’s. Therefore, it would have been obvious to one skilled in the art before the effective filing date of the claimed invention to incorporate the phase compensation layer into the device of Choi-Ki, since the compensation layer would facilitate in reducing the light distortion in display devices as taught by Kim 2.
With respect to Claim 8, Choi-Kim and Kim 2 disclose the phase compensation layer is patterned in a shape of the connection wiring (KIM2 Fig 10/PSL is the same shape as BML, i.e. squares connected by lines at the center of each side).
With respect to Claim 9, Kim fails to disclose a thickness of the phase compensation layer is greater than a thickness of the connection wiring.
KIM2 teaches wherein a thickness of the phase compensation layer (Fig. 8/PSL) may be between about 1000 A and about 3000 A (col. 12, lines 54-56). KIM2 further teaches that the degree of phase shift may depend on its thickness and index of refraction (col. 13, lines 10-13). KIM2 does not teach that thickness of PSL is greater than a thickness of the connection wiring. However, “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” per MPEP 2144.05(ID(A). Routine experimentation involving the thickness of PSL would determine the claimed thickness relation.
There is a motivation to have a 180-degree phase shift in order to obtain destructive interference and reduce light distortion (col. 7, lines 58-63). Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the instant application to incorporate the film thicknesses of KIM2 into the display device of KIM1 to obtain a good display effect.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Choi et al. (US 12,641,963) and Kim et al. (US 2021/0020716) as applied to claim 1 above, and further in view of US-20160315134-Al by Nishido (hereinafter NISHIDO).
With respect to Claim 14, Choi-Kim discloses the claimed invention except for
a thickness of the first protective layer is less than a thickness of the first conductive layer.
However, Nishido disclose a thickness of the first protective layer is less than a thickness of the first conductive layer (Fig. 45C/116b electrode which is a layered film including an approximately 100-nm-thick titanium film, an approximately 400-nm-thick aluminum film, and an approximately 100-nm-thick titanium film, thus the top protective Ti layer is thinner than the Al conductive layer; [0551] lines 35-38). Thus, Choi-Kim have substantially the same environment of a plurality of LED’s mounted on a substrate with a plurality of pixel circuits between the substrate and the LED’s. Therefore, it would have been obvious to one skilled in the art before the effective filing date of the claimed invention to substitute the thickness of the first conductive layer for the thickness of Choi-Kim, since the thickness would facilitate in reducing damage to the electrode during processing as taught by Nishido.
The prior art made of record and not relied upon is cited primarily to show the
product of the instant invention.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Applicant's amendment necessitated the new ground(s) of rejection presented in
this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a).
Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE
MONTHS from the mailing date of this action. In the event a first reply is filed within
TWO MONTHS of the mailing date of this final action and the advisory action is not
mailed until after the end of the THREE-MONTH shortened statutory period, then the
shortened statutory period will expire on the date the advisory action is mailed, and any
nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be
calculated from the mailing date of the advisory action. In no event, however, will the
statutory period for reply expire later than SIX MONTHS from the mailing date of this
final action.
Any inquiry concerning the communication or earlier communications from the
examiner should be directed to Alonzo Chambliss whose telephone number is (571)
272-1927.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's
supervisor, Jacob Y. Choi can be reached on (469) 295-9060. The fax phone number
for the organization where this application or proceeding is assigned is (571) 273-8300.
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AC/August 15, 2026 /Alonzo Chambliss/
Primary Examiner, Art Unit 2897
Prosecution Insights