DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 1/12/26 have been fully considered but they are not persuasive.
Applicant’s arguments with respect to claim(s) 1, 2, 4-11, and 14-17 have been considered but are moot because the new ground of rejection below.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 2, 6, 8 and 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Choi et al. (US 2020/0321234) in view of Shiau (US 2021/0111326) and Li et al.(US 2018/0333945) (with evidence by Epler et al. (US 2013/0313562), Iwafuchi et al. (US 2004/0115849)) and Pourchet et al. (US 2022/0376135)..
Regarding claim 1, Choi et al disclose providing a plurality of die sized semiconductor structures (200,210, 230) (fig. 1 and fig. 8) on the substrate(100)[0069] the semiconductor structures (LEDs, [0116-0120] the examiner submits semiconductor structures 200 would be LEDs and they would be made of a plurality of semiconductor layers as evidenced by Epler et al. (US 2013/0313562)[0010] ) (comprising a plurality of electrodes the LEDs would inherently have electrodes as evidenced by Iwafuchi et al. (US 2004/0115849) fig. 5); providing a receiving plate (310) having an polymer (300)[0100-0101]; applying an adhesive force to the electrodes on the semiconductor structures by placing the electrodes (on the LED as evidenced by Iwafuchi, fig. 5) in contact with the polymer layer [0105] the semiconductor structures physically (200, 210, 230)(figs 1 and 8) connected to the substrate (100)(fig.1) performing a laser lift-off (LLO)[0137, 0138, 0141] process by directing a uniform laser beam through the substrate to the semiconductor layers having interfaces with the substrate to lift off [0075] the semiconductor structures onto the polymer layer (300)(fig. 1 and fig 8) on the receiving plate.
Choi et al fails to explicitly disclose the polymer is an elastomeric polymer layer.
Shiau disclose the thermal tape that is based on silicone (elastomeric polymer) [0021]. The applicant also discloses the elastomeric polymer is made of silicone [specification, 0030, 0037].
The prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference.
One of ordinary skill in the art could have combined the elements as claimed by known methods (applicant admits in arguments, in 18/384020, filed 9/26/24 that silicone thermal tape is a well known material), and that in combination, each element merely performs the same function as it does separately.
One of ordinary skill in the art would have recognized that the results of the combination were predictable.
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to combine Choi et al and Shiau because the silicone would transfer heat [Shiau 0021] away from the die and the silicone tape is well known (applicant admits in arguments, in 18/384020, filed 9/26/24 silicone thermal tape is a well known material).
Choi et al and Shiau fail to explicitly disclose providing a space between the substrate and the receiving plate.
Li disclose disclose a space (H122’) between the substrate (100) and a layer (140f) (fig. 6c) and receiving plate (s2).
The combination of Choi et al. Shiau and Li would form semiconductor structures with electrodes providing a space between the semiconductor structures and the elastomeric polymer layer and would result in the applying of adhesive force to the electrodes on the semiconductor structures by placing the electrodes in contact with the elastomeric polymer layer.
The prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference.
One of ordinary skill in the art could have combined the elements as claimed by known methods (affixing electrodes of an LED to another layer ), and that in combination, each element merely performs the same function as it does separately.
One of ordinary skill in the art would have recognized that the results of the combination were predictable (the LED electrodes would be affixed to the elastomeric polymer layer).
The combination of Choi et al. Shiau and Li fails to disclose each semiconductor structure includes a sacrificial layer at the interface of the semiconductor structure with the substrate that is ablated during the laser lift-off (LLO) process.
Pourchet et al. disclose each semiconductor structure includes a sacrificial layer (top portion of semiconductor layer) at the interface of the semiconductor structure with the substrate that is ablated during the laser lift-off (LLO) process [0054].
The prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference.
One of ordinary skill in the art could have combined the elements as claimed by known methods ( ablating a sacrificial layer), and that in combination, each element merely performs the same function as it does separately.
One of ordinary skill in the art would have recognized that the results of the combination were predictable (ablating a sacrificial layer in order to lift off the substrate).
Regarding claim 2, Choi et al disclose removing the semiconductor structures from the receiving plate(310) (fig. 1, the semiconductors are bonded on 310 and then bonded to bonded to target substrate 400, then layer 310 is removed).
Regarding claim 4, Li et al disclose during the placing step, the gap is maintained using a holder (the structure containing 142f, 110b, 120, 132, 122)(fig. 6b) configured to hold the substrate (100) and the receiving plate (s2) apart by a distance.
Regarding claim 6, Li et al Shiau et al. and Choi et al. disclose each semiconductor structure comprises a dual pad ( Li et al. 122, fig. 6c) light emitting diode (LED) die (Li et al. 120, fig. 6c) configured to provide a spacing between the semiconductor structures and the elastomeric polymer layer (Choi et al. and Shiau et al.).
Regarding claim 8, Li et al and Choi et al. disclose each semiconductor structure comprises an epitaxial stack comprising a P-layer, an N-layer, and an active layer between the P-layer and the N-layer configured to emit light, the epitaxial stack having a surface (Choi et al. as evidenced by Epler et al. (US 2013/0313562)[0010]); and one or more coplanar metal electrodes on the surface of the epitaxial stack, each metal electrode making electrical contact to the P-layer or the N-layer (Li et al fig. 6C).
Regarding claim 9, Li et al disclose each semiconductor structure includes coplanar electrodes (122) configured to provide a spacing between the semiconductor structures and the substrate (fig. 6c)
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Choi et al. (US 2020/321234) in view of Shiau (US 2021/0111326) and Li et al.(US 2018/0333945) (with evidence by Epler et al. (US 2013/0313562) and Iwafuchi et al. (US 2004/0115849)) and Pourchet et al. (US 2022/0376135) as applied to claim 1 above and further in view of Rudmann et al. (US 2016/0216138).
Choi et al. Shiau, Li and Pourchet et al. disclose the invention supra. Regarding claim 4, Li et al disclose during the placing step, the gap is maintained using a holder (the structure containing 142f, 110b, 120, 132, 122)(fig. 6b) configured to hold the substrate (100) and the receiving plate (s2) apart by a distance.
Choi et al. Shiau Li and Pourchet et al. fails to disclose the holder comprising a deposited polymer in contact with the elastomeric polymer layer and the substrate
Rudmann et al. disclose the holder (spacer) comprising a deposited polymer [0045](fig. 4).
The combination of Choi et al. Shiau Li and Pourchet et al. with Rudmann et al. would result in the holder (spacer) (Rudmann et al.) in contact with the elastomeric polymer layer and the substrate.
The prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference.
One of ordinary skill in the art could have combined the elements as claimed by known methods ( using a holder/spacer between substrates), and that in combination, each element merely performs the same function as it does separately.
One of ordinary skill in the art would have recognized that the results of the combination were predictable (the spacer would maintain a space).
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Choi et al. (US 2020/321234) in view of Shiau (US 2021/0111326) and Li et al.(US 2018/0333945) (with evidence by Epler et al. (US 2013/0313562) and Iwafuchi et al. (US 2004/0115849)) as applied to claim 1 above and further in view of Pourchet et al. (US 2022/0376135).
The combination of Choi et al. Shiau and Li disclose the invention supra.
The combination of Choi et al. Shiau and Li fails to disclose
Pourchet et al. disclose during the placing step, the gap is maintained using a tool or a tooling fixture (carrier stage 116, target stage 120) configured to hold the substrate (carrier substrate) and the receiving plate (target substrate) apart by a distance (fig.1). (The examiner notes the carrier stage and the target stage are held apart by a distance in figure 1.)
The prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference.
One of ordinary skill in the art could have combined the elements as claimed by known methods ( holding a substrate and receiving plate a part), and that in combination, each element merely performs the same function as it does separately.
One of ordinary skill in the art would have recognized that the results of the combination were predictable (a distance would be maintained between the a substrate and receiving plate).
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Choi et al. (US 2020/321234) in view of Shiau (US 2021/0111326) and Li et al.(US 2018/0333945) (with evidence by Epler et al. (US 2013/0313562) and Iwafuchi et al. (US 2004/0115849)) as applied to claim 1 above and further in view of Pourchet et al. (US 2022/0376135) and Lee (US 2021/0375833).
The combination of Choi et al. Shiau and Li disclose the invention supra.
The combination of Choi et al. Shiau and Li fails to disclose the laser lift-off (LLO) process is performed to form a laser lift off area on the substrate to lift only selected semiconductor structures onto the receiving plate without lifting off all of the semiconductor structures on the substrate.
Pourchet et al. disclose the laser lift-off (LLO) process is performed to form a laser lift off area on the substrate [0054] (fig. 1).
Leed disclose lifting only selected semiconductor structures onto the receiving plate without lifting off all of the semiconductor structures on the substrate (fig 1C).
The combination of Pourchet and Lee et al. would result in the laser lift-off (LLO) process is performed to form a laser lift off area on the substrate to lift only selected semiconductor structures onto the receiving plate without lifting off all of the semiconductor structures on the substrate.
The prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference.
One of ordinary skill in the art could have combined the elements as claimed by known methods ( using the LLO to lift off LEDs), and that in combination, each element merely performs the same function as it does separately.
One of ordinary skill in the art would have recognized that the results of the combination were predictable (the LLO would remove LEDs from the substrate).
The prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference.
One of ordinary skill in the art could have combined the elements as claimed by known methods ( ablating a sacrificial layer), and that in combination, each element merely performs the same function as it does separately.
One of ordinary skill in the art would have recognized that the results of the combination were predictable (ablating a sacrificial layer in order to lift off the substrate).
Claim(s) 10, 11, 14, 16, and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Choi et al. (US 2020/321234) in view of Shiau (US 2021/0111326) and Li et al.(US 2018/0333945) Doan et al. (US 2019/0165231) (with evidence by Epler et al. (US 2013/0313562) Iwafuchi et al. (US 2004/0115849)) and Rudmann et al. (US 2016/0216138).
Choi et al disclose providing a plurality of die sized semiconductor structures (200) on the substrate(100)[0069] the semiconductor structures (LEDs, [0116-0120] the examiner submits semiconductor structures 200 would be LEDs and they would be made of a plurality of semiconductor layers as evidenced by Epler et al. (US 2013/0313562)[0010] )) comprising a plurality of electrodes (the LEDs would inherently have electrodes as evidenced by Iwafuchi et al. (US 2004/0115849) fig. 5) and a plurality of semiconductor layers having interfaces with the substrate(fig. 1); providing a receiving plate (310) having an polymer (300)[0100-0101]; ]; applying an adhesive force to the electrodes on the semiconductor structures by placing the electrodes (electrodes are on the LED as evidenced by Iwafuchi et al.) in contact with the polymer layer [0105] the semiconductor structures physically (200, 210, 230)(figs 1 and 8) connected to the substrate (100)(fig.1) performing a laser lift-off (LLO) process by directing a uniform laser beam through the substrate to the semiconductor layers having interfaces with the substrate to lift off [0075] the semiconductor structures onto the polymer layer (300)(fig. 1) on the receiving plate.
Choi et al fails to explicitly disclose the thermal tape is an elastomeric polymer layer.
Shiau disclose the thermal tape that is based on silicone (elastomeric polymer) [0021]. The applicant also discloses the elastomeric polymer is made of silicone [specification, 0030, 0037].
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to combine Choi et al and Shiau because the silicone would transfer heat [Shiau 0021] away from the die.
The prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference.
One of ordinary skill in the art could have combined the elements as claimed by known methods(applicant admits in arguments filed 9/26/24 silicone thermal tape is a well known material), and that in combination, each element merely performs the same function as it does separately.
One of ordinary skill in the art would have recognized that the results of the combination were predictable.
Choi et al and Shiau fail to explicitly disclose the electrodes providing a space between the semiconductor structures and the elastomeric polymer layer.
Li disclose disclose the semiconductor structures (120)[0019] physically with the electrodes (122) providing a space (H122’) between the semiconductor structures and a layer (140f) (fig. 6c).
The combination of Choi et al. Shiau and Li would form semiconductor structures with electrodes providing a space between the semiconductor structures and the elastomeric polymer layer and would result in the applying of adhesive force to the electrodes on the semiconductor structures by placing the electrodes in contact with the elastomeric polymer layer.
The prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference.
One of ordinary skill in the art could have combined the elements as claimed by known methods (affixing electrodes of an LED to another layer ), and that in combination, each element merely performs the same function as it does separately.
One of ordinary skill in the art would have recognized that the results of the combination were predictable (the LED electrodes would be affixed to the elastomeric polymer layer).
Choi et al. Shiau, Li and Doan et al. disclose the invention supra. Li et al disclose during the placing step, the gap is maintained using a holder (the structure containing 142f, 110b, 120, 132, 122)(fig. 6b) configured to hold the substrate (100) and the receiving plate (s2) apart by a distance.
Choi et al. Shiau Li and Doan et al. fail to disclose the holder comprising a deposited polymer in contact with the elastomeric polymer layer and the substrate
Rudmann et al. disclose the holder (spacer) comprising a deposited polymer [0045](fig. 4).
The combination of Choi et al. Shiau Li and Doan et al. with Rudmann et al. would result in the holder (spacer) (Rudmann et al.) in contact with the elastomeric polymer layer and the substrate.
The prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference.
One of ordinary skill in the art could have combined the elements as claimed by known methods ( using a holder/spacer between substrates), and that in combination, each element merely performs the same function as it does separately.
One of ordinary skill in the art would have recognized that the results of the combination were predictable (the spacer would maintain a space).
Regarding claim 11, Choi et al disclose removing the semiconductor structures from the receiving plate(310) (fig. 1, the semiconductors are bonded on 310 and then bonded to bonded to target substrate 400, then layer 310 is removed).
Regarding claim 13, Li et al disclose during the placing step, the gap is maintained using a holder (the structure containing 142f, 110b, 120, 132, 122)(fig. 6b) configured to hold the substrate (100) and the receiving plate (s2) apart by a precise distance.
Regarding claim 14, Li et al Shiau et al. and Choi et al. disclose each semiconductor structure comprises a dual pad ( Li et al. 122, fig. 6c) light emitting diode (LED) die (Li et al. 120, fig. 6c) configured to provide a spacing between the semiconductor structures and the elastomeric polymer layer (Choi et al. and Shiau et al.).
Regarding claim 16, Li et al and Choi et al. disclose each semiconductor structure comprises an epitaxial stack comprising a P-layer, an N-layer, and an active layer between the P-layer and the N-layer configured to emit light, the epitaxial stack having a surface (Choi et al. as evidenced by Epler et al. (US 2013/0313562)[0010]); and one or more coplanar metal electrodes on the surface of the epitaxial stack, each metal electrode making electrical contact to the P-layer or the N-layer (Li et al fig. 6C).
Regarding claim 17, Li et al disclose each semiconductor structure includes coplanar electrodes (122) configured to provide a spacing between the semiconductor structures and the substrate (fig. 6c)
Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Choi et al. (US 2020/321234) in view of Shiau (US 2021/0111326) and Li et al.(US 2018/0333945) (with evidence by Epler et al. (US 2013/0313562) and Iwafuchi et al. (US 2004/0115849)) Doan et al. and Rudmann et al. (US 2016/0216138) as applied to claim 10 above and further in view of Pourchet et al. (US 2022/0376135) and Lee (US 2021/0375833).
The combination of Choi et al. Shiau and Li disclose the invention supra.
The combination of Choi et al. Shiau and Li fails to disclose the laser lift-off (LLO) process is performed to form a laser lift off area on the substrate to lift only selected semiconductor structures onto the receiving plate without lifting off all of the semiconductor structures on the substrate.
Pourchet et al. disclose the laser lift-off (LLO) process is performed to form a laser lift off area on the substrate [0054] (fig. 1).
Leed disclose lifting only selected semiconductor structures onto the receiving plate without lifting off all of the semiconductor structures on the substrate (fig 1C).
The combination of Pourchet and Lee et al. would result in the laser lift-off (LLO) process is performed to form a laser lift off area on the substrate to lift only selected semiconductor structures onto the receiving plate without lifting off all of the semiconductor structures on the substrate.
The prior art included each element claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference.
One of ordinary skill in the art could have combined the elements as claimed by known methods ( using the LLO to lift off LEDs), and that in combination, each element merely performs the same function as it does separately.
One of ordinary skill in the art would have recognized that the results of the combination were predictable (the LLO would remove LEDs from the substrate).
Allowable Subject Matter
Claims 18-20, 29 and 31 are allowed.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRADLEY K SMITH whose telephone number is (571)272-1884. The examiner can normally be reached Monday-Friday, 10am-6pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/BRADLEY SMITH/Primary Examiner, Art Unit 2817