DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 6, 9-11, and 14-20 are rejected under 35 U.S.C. 103 as being unpatentable over Chuang et al. (United States Patent Application Publication No. US 2022/0029093 A1, hereinafter “Chuang”) in view of Chiang et al. (United States Patent Application Publication No. US 2020/0105830 A1, hereinafter “Chiang”).
In reference to claim 1, Chuang discloses a similar device. Fig. 1-18 of Chuang disclose a semiconductor device which comprises a first conductive feature (112) and a second conductive feature (note unlabeled structure to the right of and is identical to (112)) disposed in a first dielectric layer (114). A buffer layer (120) is disposed over the first dielectric layer (114). A second dielectric layer (130) is disposed over the buffer layer (120). A first bottom via (140) extends through the buffer layer (120) and the second dielectric layer (130) to couple to the first conductive feature (112) along a first direction (vertical direction). A second bottom via (note unlabeled structure to the right of and is identical to (140)) extends through the buffer layer (120) and the second dielectric layer (130) to couple to the second conductive feature (note unlabeled structure to the right of and is identical to (112)) along the first direction. A first bottom electrode (152) is disposed on the first bottom via (140). A second bottom electrode (note unlabeled structure to the right of and is identical to (152)) is disposed on the second bottom via ((note unlabeled structure to the right of and is identical to (140)). A first magnetic tunnel junction (MTJ) stack (162) is over the first bottom electrode (152). A first top electrode (172) is over the first MTJ stack (162). A second MTJ stack (note unlabeled structure to the right of and is identical to (162)) is over the second bottom electrode (note unlabeled structure to the right of and is identical to (152)). A second top electrode (note unlabeled structure to the right of and is identical to (172)) is over the second MTJ stack (note unlabeled structure to the right of and is identical to (162)). A first contact via (210) is disposed over and interfaces the first top electrode (172) and a second contact via (note unlabeled structure to the right of and is identical to (210)) is disposed over and interfaces the second top electrode (note unlabeled structure to the right of and is identical to (172)). A first spacer layer (182) extends along and interfaces sidewalls of the first top electrode (172), the first MTJ stack (162), the first bottom electrode (152), and the second dielectric layer (130). A second spacer layer (note unlabeled structure to the right of and is identical to (182)) extends along and interfaces sidewalls of the second top electrode (note unlabeled structure to the right of and is identical to (172)), the second MTJ stack (note unlabeled structure to the right of and is identical to (162)), the second bottom electrode (note unlabeled structure to the right of and is identical to (152)), and the second dielectric layer (130). An etch stop layer (190) is disposed over and interfaces the second dielectric layer (130), the first spacer layer (182), and the second spacer layer (note unlabeled structure to the right of and is identical to (182)). A third dielectric layer (200) is disposed over and interfaces the etch stop layer (190). A first contact via (210) extends through the third dielectric layer (200) and the etch stop layer (190) to interface the first top electrode (172). A second contact via (note unlabeled structure to the right of and is identical to (210)) extends through the third dielectric layer (200) and the etch stop layer (190) to interface the second top electrode (note unlabeled structure to the right of and is identical to (172)). Top surfaces of the first contact via (210) and the second contact via (note unlabeled structure to the right of and is identical to (210)) are coplanar with a top surface of the third dielectric layer (200). The first MTJ stack (162) and the second MTJ stack (note unlabeled structure to the right of and is identical to (162)) have a same thickness along the first direction. A width of the first contact via (210) is greater than a width of the first top electrode (172) such that the first contact via (210) interfaces sidewalls of the first top electrode (172) . A width of the second contact via (note unlabeled structure to the right of and is identical to (210)) is greater than a width of the second top electrode (note unlabeled structure to the right of and is identical to (172)) such that the second contact via (note unlabeled structure to the right of and is identical to (210)) interfaces sidewalls of the second top electrode (note unlabeled structure to the right of and is identical to (172)).
The first MTJ stack (162) has a first width along a second direction perpendicular to the first direction and the second MTJ stack (note unlabeled structure to the right of and is identical to (162)) has a second width along the second direction. Chuang does not disclose that the second width of the second MTJ stack (note unlabeled structure to the right of and is identical to (162)) is greater than the first width of the first MTJ stack (162). However Chiang discloses that the width of the MTJ stack can be selected for desired current and speed (p. 4, paragraph 28). Thus Chiang makes it clear that the width of the MTJ stack is a result effective variable. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to adjust the first and second widths of the first and second MTJ stacks to desired values, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Therefore this limitation is not patentable over Chuang and Chiang.
With regard to claim 2, Chuang discloses that the first MTJ stack (162) comprises a pinned layer over the first bottom electrode (152), a tunnel barrier layer over the pinned layer, and a free layer over the tunnel barrier layer (p. 2-3, paragraphs 21-23).
In reference to claim 3, Chuang discloses that the pinned layer comprises cobalt, iron, boron, or platinum (p. 2-3, paragraph 21). The tunnel barrier layer comprises magnesium oxide (MgO – p. 3, paragraph 22). The free layer comprises cobalt, iron, or boron (p. 3, paragraph 23).
With regard to claim 6, Chuang does not disclose the exact first and second widths of the first and second MTJ stacks as that claimed by the applicant. However Chiang discloses that the width of the MTJ stack can be selected for desired current and speed (p. 4, paragraph 28). Thus Chuang makes it clear that the width of the MTJ stack is a result effective variable. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to adjust the first and second widths of the first and second MTJ stacks to desired values, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Therefore claim 6 is not patentable over Chuang and Chiang.
In reference to claim 9, Chuang discloses a similar device. Fig. 1-18 of Chuang disclose a semiconductor device in region MR1 which comprises a first bottom via (140) and a second bottom via (note unlabeled structure to the right of and is identical to (140)) disposed in a first dielectric layer (130). A first memory structure comprises a first bottom electrode (152) disposed on the first bottom via (140) and the first dielectric layer (1301), a first top electrode (172) over the first bottom electrode (152), and a first magnetic tunnel junction stack (162) sandwiched between the first bottom electrode (152) and the first top electrode (172) along a first direction (vertical direction). There is a second memory structure that comprises a second bottom electrode (note unlabeled structure to the right of and is identical to (152)) disposed on the second bottom via (note unlabeled structure to the right of and is identical to (140)) and the first dielectric layer (130), a second top electrode (note unlabeled structure to the right of and is identical to (172)) over the second bottom electrode (note unlabeled structure to the right of and is identical to (152)), and a second MTJ stack (note unlabeled structure to the right of and is identical to (162)) sandwiched between the second bottom electrode (note unlabeled structure to the right of and is identical to (152)) and the second top electrode (note unlabeled structure to the right of and is identical to (172)) along the first direction (vertical direction). A first spacer layer (182) is disposed along and interfaces sidewalls of the first dielectric layer (130), the first bottom electrode (152), the first top electrode (172), and the first MTJ stack (162). A second spacer layer (note unlabeled structure to the right of and is identical to (182)) disposed along and interfaces sidewalls of the first dielectric layer (130), the second bottom electrode (note unlabeled structure to the right of and is identical to (152)), the second top electrode (note unlabeled structure to the right of and is identical to (172)), and the second MTJ stack (note unlabeled structure to the right of and is identical to (162)). An etch stop layer (190) is disposed over and interfaces the first dielectric layer (130), the first spacer layer (182), and the second spacer layer (note unlabeled structure to the right of and is identical to (182)). A second dielectric layer (200) is disposed over and interfaces the etch stop layer (190). A first contact via (210) extends through the second dielectric layer (200) and the etch stop layer (190) to interface the first top electrode (172). A second contact via (note unlabeled structure to the right of and is identical to (210)) extends through the second dielectric layer (200) and the etch stop layer (190) to interface the second top electrode (note unlabeled structure to the right of and is identical to (172)). Top surfaces of the first contact via (210) and the second contact via (note unlabeled structure to the right of and is identical to (210)) are coplanar with a top surface of the second dielectric layer (200). A width of the first contact via (210) is greater than a width of a top surface of the first top electrode (172). A width of the second contact via (note unlabeled structure to the right of and is identical to (210)) is greater than a width of a top surface of the second top electrode (note unlabeled structure to the right of and is identical to (172)). A width of the first contact via (210) is greater than a width of a top surface of the first top electrode (172). A width of the second contact via (note unlabeled structure to the right of and is identical to (210)) is greater than a width of a top surface of the second top electrode (note unlabeled structure to the right of and is identical to (172)).
The first MTJ stack (162) has a first width along a second direction perpendicular to the first direction and the second MTJ stack (note unlabeled structure to the right of and is identical to (162)) has a second width along the second direction. Chuang does not disclose that the second width of the second MTJ stack (note unlabeled structure to the right of and is identical to (162)) is greater than the first width of the first MTJ stack (162). However Chiang discloses that the width of the MTJ stack can be selected for desired current and speed (p. 4, paragraph 28). Thus Chiang makes it clear that the width of the MTJ stack is a result effective variable. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to adjust the first and second widths of the first and second MTJ stacks to desired values, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Therefore this limitation is not patentable over Chuang and Chiang.
With regard to claim 10, the first MTJ stack (162) and the second MTJ stack (note unlabeled structure to the right of and is identical to (162)) have a same thickness along the first direction (vertical direction).
In reference to claim 11, in fig. 1-18 of Chuang, the first bottom electrode (152) and the second bottom electrode (note unlabeled structure to the right of and is identical to (152)) comprise titanium nitride, tantalum nitride, or a combination of the two (p. 2, paragraph 18). Chuang does not disclose that the first top electrode (172) and the second top electrode (note unlabeled structure to the right of and is identical to (172)) comprise titanium nitride, tantalum nitride, or a combination of the two. However as noted above, Chuang discloses the known use of titanium nitride, tantalum nitride, or a combination of the two as conductive electrode materials (p. 2, paragraph 18). The applicant is reminded in this regard that it has been held that the selection of a known material based on its suitability for its intended use would be entirely obvious. See Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945) ("Reading a list and selecting a known compound to meet known requirements is no more ingenious than selecting the last piece to put in the last opening in a jig-saw puzzle." 325 U.S. at 335, 65 USPQ at 301.). See also In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960) (selection of a known plastic to make a container of a type made of plastics prior to the invention was held to be obvious). See MPEP 2144.07. In view of the above, it would therefore be obvious to use titanium nitride, tantalum nitride, or a combination of the two for the material of the first and second top electrodes.
With regard to claim 14, the device of fig. 1-18 of Chuang is an MRAM array device (magneto-resistive random access memory – p. 1, paragraphs 2 and 9). It is understood that are many more MTJ memory structures to form a memory array. Therefore it is understood that there is a third MTJ memory structure which has a third bottom electrode (152), a top electrode (172) over the bottom electrode (152), and an MTJ stack (162) sandwiched between the bottom electrode (152) and the third top electrode (172). The third MTJ stack (162) has a third width along the second direction (horizontal direction). Chuang does not disclose that the third width of the third MTJ stack (162) is greater than the first width of the first MTJ stack (162). However Chiang discloses that the width of the MTJ stack can be selected for desired current and speed (p. 4, paragraph 28). Thus Chiang makes it clear that the width of the MTJ stack is a result effective variable. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to adjust the first and third widths of the first and third MTJ stacks to desired values, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Therefore claim 14 is not patentable over Chuang and Chiang.
In reference to claim 15, Chuang does not disclose the exact first, second, and third widths of the first, second, and third MTJ stacks as that claimed by the applicant. However Chiang discloses that the width of the MTJ stack can be selected for desired current and speed (p. 4, paragraph 28). Thus Chuang makes it clear that the width of the MTJ stack is a result effective variable. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to adjust the first, second, and third widths of the first, second, and third MTJ stacks to desired values, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Therefore claim 15 is not patentable over Chuang and Chiang.
In reference to claim 16, Chuang discloses a similar method. Fig. 1-18 of Chuang disclose a method which comprises receiving a workpiece (not explicitly shown but is present – p. 2, paragraph 12) with a first conductive feature (112) and a second conductive feature (note unlabeled structure to the right of and is identical to (112)) disposed in a first dielectric layer (114). A second dielectric layer (130) is over the first dielectric layer (114). A first bottom via (140) extends through the second dielectric layer (130) to couple to the first conductive feature (112) along a first direction (vertical direction). A second bottom via (note unlabeled structure to the right of and is identical to (140)) extends through the second dielectric layer (130) to couple to the second conductive feature (note unlabeled structure to the right of and is identical to (112)) along the first direction. A bottom electrode layer (150) is formed over the first bottom via (140), the second bottom via feature (note unlabeled structure to the right of and is identical to (140)), and the second dielectric layer (130). A magnetic tunnel junction (MTJ) stack (160) is formed over the bottom electrode layer (150). A top electrode layer (170) is formed over the MTJ stack (160). Although not explicitly shown, it ii understood that a hard mask layer is deposited over the top electrode layer (170) and is patterned to form a first hard mask pattern directly over the first bottom via (140) and a second hard mask pattern over the second bottom via (note unlabeled structure to the right of and is identical to (140)) which is then followed by etching the top electrode layer (170), the MTJ stack (160), the bottom electrode layer (150), and the second dielectric layer (130) using the first hard mask pattern and the second hard mask pattern as an etch mask to form a tapered first memory structure (MC1) directly over the first bottom via (140) and a tapered second memory structure (note unlabeled structure to the right of and is identical to (MC1)) directly over the second bottom via (note unlabeled structure to the right of and is identical to (140)). The first memory structure (MC1) includes a first top electrode (172) patterned from the top electrode layer (170) and the second memory structure (note unlabeled structure to the right of and is identical to (MC1)) includes a second top electrode (note unlabeled structure to the right of and is identical to (172)) patterned from the top electrode layer (170).
After the etching, a spacer layer (180) is deposited over the first memory structure (MC1), the second memory structure (note unlabeled structure to the right of and is identical to (MC1)), and the second dielectric layer (130). The spacer layer (180) is etched back to remove the spacer layer (180) from top-facing surfaces of the second dielectric layer (130) and the top electrode layer (170, 172). After the etching back, an etch stop layer (190) is deposited over the spacer layer (180), the first memory structure, the second memory structure, and the second dielectric layer (130) such that the etch stop layer (190) interfaces the spacer layer (180), the first top electrode (172), the second top electrode (note unlabeled structure to the right of and is identical to (172)), and the second dielectric layer (130). A third dielectric layer (200) is deposited over the etch stop layer (190) such the third dielectric layer (200) interfaces the etch stop layer (190).
A first contact opening is formed through the third dielectric layer (200) and the etch stop layer (190) to expose the first top electrode (172) and the etch stop layer (190) and a second contact opening is formed through the third dielectric layer (200) and the etch stop layer (190) to expose the second top electrode (note unlabeled structure to the right of and is identical to (172)) and the etch stop layer (190). A metal fill layer (p. 4, paragraph 34) is deposited in the first and second contact openings. The third dielectric layer (200) and the metal fill layer are planarized (p. 5, paragraph 37) to form a first contact via (210) is formed in the first contact opening and a second contact via (note unlabeled structure to the right of and is identical to (210)) is formed in the second contact opening such that top surfaces of the first contact via (210) and the second via (note unlabeled structure to the right of and is identical to (210)) are coplanar with a top surface of the third dielectric layer (200). It is also understood that the first hard mask pattern comprises a first width along the second direction perpendicular to the first direction and the second hard mask pattern comprises a second width along the second direction. The widths of the first hard mask pattern and the second hard mask pattern determine the width of the etched MTJ stacks/structures (162). Chuang does not disclose that the second width is greater than the first width. However Chiang discloses that the width of the MTJ stack can be selected for desired current and speed (p. 4, paragraph 28). Thus Chiang makes it clear that the width of the MTJ stack is a result effective variable. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to adjust the first and second widths of the first and second hard mask patterns and thus the widths of their respective MTJ stacks/structures to desired values, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Therefore claim 16 is not patentable over Chuang and Chiang.
With regard to claim 17, the etching comprises the use of ion beam etching (p. 3, paragraph 25).
In reference to claim 18, the first memory structure (MC1) comprises a first bottom electrode (152) formed from the bottom electrode layer (150). The second memory structure (note unlabeled structure to the right of and is identical to (MC1)) comprises a second bottom electrode (note unlabeled structure to the right of and is identical to (152)) formed from the bottom electrode layer (150). The first bottom electrode (152) comprises a third width along the second direction (horizontal) and the second bottom electrode (note unlabeled structure to the right of and is identical to (152)) comprises a fourth width along the second direction (horizontal). Chuang does not disclose that the fourth width is greater than the third width. However Chiang discloses that the width of the MTJ stack can be selected for desired current and speed (p. 4, paragraph 28). Thus Chiang makes it clear that the width of the MTJ stack is a result effective variable. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to adjust the third and fourth widths of the first and second bottom electrodes to desired values, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Therefore claim 18 is not patentable over Chuang and Chiang.
With regard to claim 19, a width of the first contact opening is greater than a width of the first top electrode (172).
In reference to claim 20, Chuang discloses that the etch stop layer (190) comprises aluminum oxide (p. 7, paragraph 31).
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Chuang in view of Chiang and as applied to claim 1 above and further in view of Jiang et al. (United States Patent Application Publication No. US 2002/0031906 A1, hereinafter “Jiang”).
In reference to claim 7, Chuang does not disclose that the buffer layer (120) or etch stop layer comprises silicon carbide (SiC). However Jiang discloses the known use of silicon carbide as an etch stop layer (p. 2, paragraph 19). The applicant is reminded in this regard that it has been held that the selection of a known material based on its suitability for its intended use would be entirely obvious. See Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945) ("Reading a list and selecting a known compound to meet known requirements is no more ingenious than selecting the last piece to put in the last opening in a jig-saw puzzle." 325 U.S. at 335, 65 USPQ at 301.). See also In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960) (selection of a known plastic to make a container of a type made of plastics prior to the invention was held to be obvious). See MPEP 2144.07. In view of the above, it would therefore be obvious to use silicon carbide as the material for the etch stop layer/buffer layer (120).
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Chuang in view of Chiang and as applied to claim 1 above and further in view of Udayakumar et al. (United States Patent Application Publication No. US 2005/0012126 A1, hereinafter “Udayakumar”).
In reference to claim 8, Chuang does not disclose that the first dielectric layer (114) or interlayer dielectric (ILD) comprises silicon-rich silicon oxide. However Udayakumar discloses the known use of silicon-rich silicon oxide as an interlayer dielectric material (p. 5, paragraphs 40, 43). The applicant is reminded in this regard that it has been held that the selection of a known material based on its suitability for its intended use would be entirely obvious. See Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945) ("Reading a list and selecting a known compound to meet known requirements is no more ingenious than selecting the last piece to put in the last opening in a jig-saw puzzle." 325 U.S. at 335, 65 USPQ at 301.). See also In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960) (selection of a known plastic to make a container of a type made of plastics prior to the invention was held to be obvious). See MPEP 2144.07. In view of the above, it would therefore be obvious to use silicon-rich silicon oxide as the material for the first dielectric layer (114) or interlayer dielectric (ILD).
Allowable Subject Matter
Claims 4, 5, 12, and 13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: in the examiner’s opinion, it would not be obvious to implement a semiconductor device with first and second magnetic tunnel junction (MTJ) stacks over respective conductive features in a first dielectric layer, bottom via structures extending through a buffer layer and a second dielectric layer, with the first and second MTJ stacks having respective first and second top and bottom electrodes and first and second contact via structures in combination with the suggested multilayer structure of the first MTJ stack as described by the applicant in claim 4. In the examiner’s opinion, it would also not be obvious to implement a semiconductor device with first and second magnetic tunnel junction (MTJ) stacks over bottom via structures in a dielectric layer, with the first and second MTJ stacks having respective first and second top and bottom electrodes and first and second contact via structures in combination with the suggested widths of the first and second MTJ stacks and the specific multilayer structure of the first MTJ stack as described by the applicant in claim 12.
Response to Arguments
Applicant’s arguments with respect to claims 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/KEVIN QUINTO/Examiner, Art Unit 2893
/Britt Hanley/Supervisory Patent Examiner, Art Unit 2893
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