DETAILED ACTION
This Office action responds to the Applicant’s RCE amendments filed on 12/02/2025.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for a rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Continued Examination Under 37 CFR 1.114
A request for continued examination (RCE) under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection mailed on 09/04/2025. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/02/2025 has been entered.
Amendment Status
The present Office action is made with all previously suggested amendments being fully considered. Accordingly, pending in this Office action are claims 1-3, and 6-11. Claims 4-5 were cancelled by the Applicant.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, and 6-11 are rejected under 35 U.S.C. 103 as being unpatentable over Zhao (US 2022/0376061) in view of Wong (US 2022/0123109).
Regarding claim 1, Zhao (see, e.g., Zhao: figs. 1B-1C) shows all aspects of the instant invention including a semiconductor device structure for lateral power transistor 100A (see, e.g., Zhao: par. [0002]), comprising a drain contact structure comprising:
A drain ohmic contact 126
A drain terminal structure
The drain terminal structure comprises a plurality of drain field plates
The drain field plates have different capacitive coupling and overlap with the drain ohmic contact 126 to achieve a reduction in a peak intensity of a channel electric field near the drain contact structure 126 (see MPEP 2112.01(I) and also MPEP 2114.I/2114.II)
The first drain field plate extending laterally beyond the drain ohmic contact 126 by a first distance in a source direction
The second drain field plate extending laterally beyond the first drain field plate by a second distance in the source direction
Zhao, however, fails to show (see, e.g., Zhao: figs. 1B-1C) that the second distance is greater than the first distance. Wong, in a similar device to Zhao, discloses (see, e.g., Wong: fig. 3) a drain terminal structure 72 with the first field plate 110 extending laterally beyond the drain ohmic contact 80 by a first distance W2 in the source direction 71, and the second field plate 100 extending laterally beyond the first field plate 110 by a second distance W1 in the source direction 71, wherein the second distance W1 is greater than the first distance 21 (see, e.g., Wong: par. [0058]). Wong also teaches that, when the second distance W1 is greater than the first distance W2, an electric field near the drain 72 can be further reduced, and the reliability degree of the semiconductor device 1c can be improved (see, e.g., Wong: par. [0058] and [0068]).
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to have the first and second field plates as suggested by Wong in the semiconductor device of Zhao to reduce an electric field near the drain, and improve the reliability degree of the semiconductor device.
Regarding claim 2, Zhao (see, e.g., Zhao: figs. 1B-1C) shows all aspects of the instant invention including a semiconductor device structure 100A, comprising:
A lateral GaN semiconductor power transistor (see, e.g., Zhao: par. [0002] and [0022])
A plurality of metallization layers 134/140 (see, e.g., Zhao: par. [0019] and [0022]) and intermetal dielectric layers 130/138/143 (see, e.g., Zhao: par. [0019], [0049], [0052], and [0056])
wherein the drain contact structure comprises:
A drain ohmic contact 126
A drain terminal structure
The drain terminal structure comprises a plurality of drain field plates
The drain field plates have different capacitive coupling and overlap with the drain ohmic contact 126 to achieve a reduction in a peak intensity of a channel electric field near the drain contact structure 126 (see MPEP 2112.01(I) and also MPEP 2114.I/2114.II)
The first drain field plate extending laterally beyond the drain ohmic contact 126 by a first distance in a source direction
The second drain field plate extending laterally beyond the first drain field plate by a second distance in the source direction
Zhao, however, fails to show (see, e.g., Zhao: figs. 1B-1C) that the second distance is greater than the first distance. Wong, in a similar device to Zhao, discloses see, e.g., Wong) fig. 3) a drain terminal structure 72 with the first field plate 110 extending laterally beyond the drain ohmic contact 80 by a first distance W2 in the source direction 71, and the second field plate 100 extending laterally beyond the first field plate 110 by a second distance W1 in the source direction 71, wherein the second distance W1 is greater than the first distance 21 (see, e.g., Wong: par. [0058]). Wong also teaches that, when the second distance W1 is greater than the first distance W2, an electric field near the drain 72 can be further reduced, and the reliability degree of the semiconductor device 1c can be improved (see, e.g., Wong: par. [0058] and [0068]).
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to have the first and second field plates as suggested by Wong in the semiconductor device of Zhao to reduce an electric field near the drain, and improve the reliability degree of the semiconductor device.
Regarding claim 3, Zhao in view of Wong shows (see, e.g., Zhao: figs. 1B-1C) that:
The plurality of drain field plates comprises first and second field plates 134/140, at least one field plate being defined by a metallization layer of said plurality of metallization layers
The first drain field plate has a first capacitive coupling and first overlap with the drain ohmic contact 126
The second drain field plate has a second capacitive coupling and second overlap with the drain ohmic contact 126
Regarding claim 6, Zhao in view of Wong shows (see, e.g., Zhao: figs. 1B-1C) that the dimensions of the first and second drain field plates and thicknesses of intermetal dielectric layers are selected to provide first and second capacitive couplings (see MPEP 2112.01(I) and also MPEP 2114.I/2114.II).
Regarding claim 7, Zhao in view of Wong shows (see, e.g., Wong: fig. 3) that the first distance W2 is at least 1µm (see, e.g., Wong: par. [0058]).
Regarding claim 8, Zhao in view of Wong shows (see, e.g., Wong: fig. 3) that the second distance W1 is at least 1µm (see, e.g., Wong: par. [0047]).
Regarding claim 9, Zhao in view of Wong shows (see, e.g., Zhao: figs. 1B-1C) that the first metallization layer 134 defining the first field plate is a metallization layer 134 that also defines a gate field plate (see, e.g., Zhao: the metallization structure connected with the element 122).
Regarding claim 10, Zhao in view of Wong shows (see, e.g., Zhao: figs. 1B-1C) that the first metallization layer 134 is a layer of titanium nitride (see, e.g., Zhao: par. [0051]).
Regarding claim 11, Zhao in view of Wong shows (see, e.g., Zhao: figs. 1B-1C) the lateral GaN semiconductor power transistor (see, e.g., Zhao: par. [0002]) is an enhancement-mode GaN HEMT (see, e.g., Zhao: par. [0025] and [0028]).
Response to Arguments
Examiner has read and considered Applicants’ arguments, and finds them to be unpersuasive. Applicant’s arguments involve discussing why the previously cited prior art documents fail to disclose the amended limitation. Examiner believes that the Zhao in view of Wong also disclose the amended limitation. The applicability of the Zhao and Wong references to the amended limitation is indicated in the claim rejections above.
The applicants argue:
The teaching of Zhao fails to anticipate or otherwise render obvious that "… a lack of motivation to have the first and second field plates as suggested by Wong in the semiconductor device of Zhao”, as recited in Remarks/Arguments, par. 7.
The examiner responds:
In view of the previous grounds of rejection of Zhao in view of Wong, where Wong clearly shows, see, e.g., Wong: figs. 3, that the field plate configuration is in similar configuration as in the instant invention. The motivation of such field plate configuration is clearly shown in Wong reference (see, e.g., Wong: par. [0058] and [0068]), and it is similar to the motivation given in the instant application.
Wong, in a similar device to Zhao, discloses (see, e.g., Wong fig. 3) a drain terminal structure 72 with the first field plate 110 extending laterally beyond the drain ohmic contact 80 by a first distance W2 in the source direction 71, and the second field plate 100 extending laterally beyond the first field plate 110 by a second distance W1 in the source direction 71, wherein the second distance W1 is greater than the first distance 21 (see, e.g., Wong: par. [0058]). Wong also teaches that, when the second distance W1 is greater than the first distance W2, an electric field near the drain 72 can be further reduced, and the reliability degree of the semiconductor device 1c can be improved (see, e.g., Wong: par. [0058] and [0068]).
It would have been obvious at the time of filing the invention to one of ordinary skill in the art to have the first and second field plates as suggested by Wong in the semiconductor device of Zhao to reduce an electric field near the drain, and improve the reliability degree of the semiconductor device.
The applicants argue:
The teaching of Zhao fails to anticipate or otherwise render obvious that "…drain field plates … are non-overlapping with the drain nor drain ohmic contact”, as recited Remarks/Arguments, par. 9.
The examiner responds:
In view of the previous grounds of rejection of Zhao in view of Wong, see, e.g., Zhao: figs. 1B-1C, where Zhao clearly shows a plurality of drain field plates that overlap with the drain or drain ohmic contact 126.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TIBERIU DAN ONUTA and between the hours of 8:00 AM to 5:00 PM (Eastern Standard Time) Monday through Friday or by e-mail via Tiberiu.Onuta@uspto.gov. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Wael Fahmy, can be reached on (571) 272-1705.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (in USA or Canada) or 571-272-1000.
/TIBERIU DAN ONUTA/Examiner, Art Unit 2814
/WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814
Prosecution Insights