Prosecution Insights
Last updated: July 17, 2026
Application No. 17/883,584

HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) WITH A BACK BARRIER LAYER

Final Rejection §102§103§112
Filed
Aug 08, 2022
Priority
Oct 29, 2020 — divisional of 11/855,199
Examiner
CHEN, JACK S J
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
2 (Final)
77%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
82%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allowance Rate
438 granted / 572 resolved
+8.6% vs TC avg
Moderate +5% lift
Without
With
+5.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
49 currently pending
Career history
610
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
53.6%
+13.6% vs TC avg
§102
23.8%
-16.2% vs TC avg
§112
9.9%
-30.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 572 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Terminal Disclaimer The terminal disclaimer filed on 11/18/2025 disclaiming the terminal portion of any patent granted on this application which would extend beyond the expiration date of any patent granted on Application Number 17/513,404 has been reviewed and is accepted. The terminal disclaimer has been recorded. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Re claim 1, the phrase “wherein a resistivity of the second portion of the GaN layer is lower than a resistivity of the buffer layer” was not described in the original specification (i.e., Re element 208b). Note: paragraph 25 of the instant specification appears to indicate the second GaN layer, 208A (NOT 208b) has a lower resistivity than the transition layer. Re claim 3, the phrase “the first portion of the GaN layer is in a range of 300 and 1500 nanometers” was not described in the original specification. Re claim 6, the phrase “AlyGa1-yN where 0≤y≤1” was not described in the original specification (i.e., 0=y=1). Re claim 7, the phrase “forming a Gallium Nitride (GaN) layer over a buffer layer, the GaN layer comprising a first portion and a second portion over the first portion … and wherein a resistivity of the second portion of the GaN layer is lower than a resistivity of the buffer layer” was not described in the original specification (note: at least element 210 and/or 212 is not part of the GaN layer) Re claim 7, the phrase “wherein a resistivity of the second portion of the GaN layer is lower than a resistivity of the buffer layer” was not described in the original specification (i.e., Re element 208b). Re claim 14, the phrase “wherein a resistivity of the first portion of the GaN layer is greater than a resistivity of the second portion of the GaN layer” was not described in the original specification. Re claim 14, the phrase “forming a Gallium Nitride (GaN) layer over a buffer layer, the GaN layer comprising a first portion, a second portion over the first portion, and a third portion over the second portion … wherein a resistivity of the first portion of the GaN layer is greater than a resistivity of the second portion of the GaN layer” was not described in the original specification (note: at least element 210 and/or 212 is not part of the GaN layer). The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 6-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Re claim 6, the phrase “the Si substrate is polished to have a surface orientation of<111>” does not positively recite the active processing step. Re claim 7, the phrase “forming a Gallium Nitride (GaN) layer over a buffer layer, the GaN layer comprising a first portion and a second portion over the first portion … and wherein a resistivity of the second portion of the GaN layer is lower than a resistivity of the buffer layer” is unclear and indefinite (note: at least element 210 and/or 212 cannot be considered as part of the recited GaN layer). Re claim 14, the phrase “forming a Gallium Nitride (GaN) layer over a buffer layer, the GaN layer comprising a first portion, a second portion over the first portion, and a third portion over the second portion … wherein a resistivity of the first portion of the GaN layer is greater than a resistivity of the second portion of the GaN layer” is unclear and indefinite (i.e., how? Since they are the exact same material, Ga1N1 for first, second and third portions and/or at least element 210 and/or 212 cannot be considered as part of the recited GaN layer and/or which portion is considered as the first portion of the GaN layer? Etc.). Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-2, 4-5, 7-9, 11-12, 14-16 and 18-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al., WO-2017/000906 A1. Re claim 1, Chen et al. disclose a method for manufacturing a High Electron Mobility Transistor, comprising: forming a first portion of a Gallium Nitride (GaN) layer408b (fig. 4 and paragraph 43) over a buffer layer 406; depositing a back barrier layer 409 (fig. 4 and paragraph 43, i.e., AlN, intrinsic properties of the material) on the first portion of the GaN layer; forming a second portion of the GaN layer 408a (fig. 4) over the back barrier layer; depositing a front barrier layer 410 (fig. 4) on the second portion of the GaN layer; and forming a source electrode 416, a drain electrode 420 and a gate electrode 418 (fig. 4) on the front barrier layer, wherein the back barrier layer comprises Aluminum Nitride (AIN) (fig. 4 and paragraph 43) and where a 2- Dimensional Electron Gas (2-DEG) in the second portion of the GaN layer at a first interface between the second portion of the GaN layer and the front barrier layer (fig. 4), and wherein a resistivity of the second portion of the GaN layer (fig. 4, inherently show this feature since 422a is formed within upper channel 408a; the upper channel having a higher electron mobility and/or very low resistance. Furthermore, they are the same material, i.e, GaN as the cited prior art) is lower than a resistivity of the buffer layer. see figs. 1-30 and pages 1-28 for more details. Re claim 2. The method of claim 1, wherein the front barrier layer comprises Aluminum Gallium Nitride (AlxGa1-xN), and wherein 0≤x≤1 (fig. 4 and paragraph 43). Re claim 4. The method of claim 1, wherein a third thickness of the back barrier layer is in a range of 0.5 and 10 nanometers (paragraph 47). Re claim 5. The method of claim 1, wherein electrons in the 2-DEG in the second portion of the GaN layer at the first interface 410/408a is blocked by a second interface 408b/409 between the first portion of the GaN layer and the back barrier layer (fig. 4). Re claim 7, Chen et al. disclose a method of making a semiconductor device, comprising: forming a Gallium Nitride (GaN) layer 408a/b (fig. 4) over a buffer layer 406, the GaN layer comprising a first portion 408b and a second portion 408a over the first portion (fig. 4); forming a front barrier layer 410 (fig. 4) over the GaN layer; forming a source electrode 416, a drain electrode 420 and a gate electrode 418 (fig. 4) over the front barrier layer; providing a 2-Dimensional Electron Gas (2-DEG) in the GaN layer 408a at a first interface between the GaN layer 408a and the front barrier layer 410 (fig. 4); and forming a back barrier layer 409 (fig. 4 and paragraph 43, i.e., AlN, intrinsic properties of the material) on the first portion 408b of the GaN layer and underneath the second portion 408a of the GaN layer, wherein the back barrier layer comprises Aluminum Nitride (AIN), and wherein a resistivity of the second portion 408a of the GaN layer (fig. 4, inherently show this feature since 422a is formed within upper channel 408a; the upper channel having a higher electron mobility and/or very low resistance. Furthermore, they are the same material, i.e, GaN as the cited prior art) is lower than a resistivity of the buffer layer. See figs. 1-30 and pages 1-28 for more details. Re claim 8. The method of claim 7, wherein the front barrier layer comprises Aluminum Gallium Nitride (AlxGa1-xN), and wherein 0≤x≤1 (fig. 4 and paragraph 43). Re claim 9. The method of claim 7, wherein the back barrier layer 409 is separated from the first interface by a first thickness of a second portion of the GaN layer 408a (fig. 4). Re claim 11. The method of claim 7, wherein a second thickness of the back barrier layer is in a range of 0.5 and 10 nanometers (paragraph 47). Re claim 12. The method of claim 7, wherein electrons in the 2-DEG in the GaN layer 408a at the first interface (fig. 4) is blocked by a second interface between the first portion of the GaN layer 408b and the back barrier layer 409 (fig. 4). Re claim 14. Chen et al. disclose a method of making a High Electron Mobility Transistor (HEMT), comprising: forming a Gallium Nitride (GaN) layer (fig. 4) over a buffer layer 404, the GaN layer comprising a first portion 406, a second portion 408b over the first portion, and a third portion 408a over the second portion; forming a front barrier layer 410 (fig. 4) over the third portion 408a of the GaN layer; forming a source electrode 416, a drain electrode 420, and a gate electrode 418 (fig. 4) over the front barrier layer; providing a gas in the GaN layer at a first interface between the third portion 408a of the GaN layer and the front barrier layer 410 (fig. 4); and forming a back barrier layer 409 on the second portion 408b of the GaN layer and underneath the third portion 408a of the GaN layer, wherein a resistivity of the first portion 406 of the GaN layer is greater than a resistivity of the second portion 408b (fig. 4, inherently show this feature since 422b, 2DEG is formed within lower channel 408b, the lower channel having a heterojunction channel with higher electron mobility and/or very low resistance. Furthermore, they are the same material, i.e, GaN as the cited prior art) of the GaN layer, see figs. 1-30 and pages 1-28 for more details. Re claim 15. The method of claim 14, wherein the back barrier layer 409 (fig. 4) comprises Aluminum Nitride (AIN) and the front barrier layer comprises Aluminum Gallium Nitride (AlxGa1-xN), and wherein 0≤x≤1 (fig. 4 and paragraph 43). Re claim 16. The method of claim 14, wherein the back barrier layer 409 is separated from the first interface by a first thickness of the third portion of the GaN layer (fig. 4). Re claim 18. The method of claim 14, wherein a second thickness of the back barrier layer is in a range of 0.5 and 10 nanometers (fig. 4 and paragraph 47). Re claim 19. The method of claim 14, wherein the gas comprises a 2-Dimensional Electron Gas (2- DEG) (fig. 4), and wherein electrons in the 2-DEG in the GaN layer at the first interface 410/408a is blocked by a second interface between the second portion of the GaN layer 408b and the back barrier layer 409. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 3, 6, 10, 13, 17, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al., WO-2017/000906 A1. Chen et al. disclose above; however, Chen does not explicitly show the instant claim thickness (Re claims 3, 10, 13, 17, and 20). The thickness range of claims 3, 10, 13, 17, and 20 are considered to involve routine optimization while has been held to be within the level of ordinary skill in the art. As noted in In re Aller, the selection of reaction parameters such as thickness, temperature and concentration etc. would have been obvious: “Normally, it is to be expected that a change in temperature, or in concentration, or in both, would be an unpatentable modification. Under some circumstances, however, changes such as these may impart patentability to a process if the particular ranges claimed produce a new and unexpected result which is different in kind and not merely degree from the results of the prior art...such ranges are termed Acritical ranges and the applicant has the burden of proving such criticality.... More particularly, where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In re Aller 105 USPQ233, 255 (CCPA 1955). See also In re Waite 77 USPQ 586 (CCPA 1948); In re Scherl 70 USPQ 204 (CCPA 1946); In re Irmscher 66 USPQ 314 (CCPA 1945); In re Norman 66 USPQ 308 (CCPA 1945); In re Swenson 56 USPQ 372 (CCPA 1942); In re Sola 25 USPQ 433 (CCPA 1935); In re Dreyfus 24 USPQ 52 (CCPA 1934). Therefore, one of ordinary skill in the requisite art before the invention was made would have used any thickness range suitable to the method of Chen et al. in order to optimize the process of the device etc. Further in this regard, the specification contains no disclosure of either the critical nature of the claimed arrangement (i.e. - the thickness of the second portion of the GaN layer is in a range of 25 and 350 nanometers and the thickness of the first portion of the GaN layer is in a range of 300 and 1500 nanometers) or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen limitations or upon another variable recited in a claim, the Applicant must show that the chosen limitations are critical. In re Woodruff, 919 F.2d 1575, 1578 (Fed. Cir. 1990). Note: nowhere in the Figs. 5A-5C and/or paragraphs 42-45 of specification show that the particular ranges (i.e. - the thickness of the second portion of the GaN layer is in a range of 25 and 350 nanometers and the thickness of the first portion of the GaN layer is in a range of 300 and 1500 nanometers) claimed produce a new and unexpected results. Re claim 6, Chen et al. further shows prior to the forming a first portion of a GaN layer 408b, preparing a buffer layer 406 on a Silicon (Si) substrate 402, wherein the buffer layer comprises AlyGal-yN (i.e., y=0, GaN) and forming a conductive GaN layer (fig. 4, ie., a lower portion of the 408b) on the buffer layer. However, Chen et al. does not explicitly state that the Si substrate has a surface orientation of<111>. Using Si substrate has a surface orientation of<111> has been well-known in the semiconductor art for forming a semiconductor device. The selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co., Inc. v. Interchemical Corp. , 325 U.S. 327, 65 USPQ 297 (1945). "Reading a list and selecting a known compound to meet known requirements is no more ingenious than selecting the last piece to put in the last opening in a jig - saw puzzle." 65 USPQ at 301.). Therefore, the subject matter as a whole would have been obvious to one having ordinary skill in the art before the invention was made to use any suitable surface orientation of Si substrate in the method of Chen et al. in order to form the HEMT device. Response to Arguments Applicant's arguments filed 11/18/2025 have been fully considered but they are not persuasive for reasons herein above. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JACK CHEN whose telephone number is (571)272-1689. The examiner can normally be reached Monday to Friday, 8am to 4pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara J. Green can be reached at (571)270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JACK S CHEN/ Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Aug 08, 2022
Application Filed
Mar 13, 2025
Non-Final Rejection mailed — §102, §103, §112
Jul 11, 2025
Response after Non-Final Action
Jul 11, 2025
Response Filed
Nov 18, 2025
Response Filed
May 14, 2026
Final Rejection mailed — §102, §103, §112
Jun 29, 2026
Applicant Interview (Telephonic)
Jun 29, 2026
Examiner Interview Summary

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Prosecution Projections

3-4
Expected OA Rounds
77%
Grant Probability
82%
With Interview (+5.2%)
2y 11m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 572 resolved cases by this examiner. Grant probability derived from career allowance rate.

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