Prosecution Insights
Last updated: April 19, 2026
Application No. 17/885,574

HEMT WITH INSULATING LAYER BETWEEN GATE ELECTRODE AND CAP LAYER AND FABRICATING METHOD OF THE SAME

Final Rejection §102§103
Filed
Aug 11, 2022
Examiner
CHEN, DAVID Z
Art Unit
2815
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
UNITED MICROELECTRONICS CORPORATION
OA Round
4 (Final)
44%
Grant Probability
Moderate
5-6
OA Rounds
3y 9m
To Grant
94%
With Interview

Examiner Intelligence

Grants 44% of resolved cases
44%
Career Allow Rate
299 granted / 675 resolved
-23.7% vs TC avg
Strong +49% interview lift
Without
With
+49.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 9m
Avg Prosecution
63 currently pending
Career history
738
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
47.4%
+7.4% vs TC avg
§102
26.4%
-13.6% vs TC avg
§112
24.4%
-15.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 675 resolved cases

Office Action

§102 §103
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. This Office Action is in response to Amendments/Remarks filed on December 03, 2025. Claim Objections Claim 5 is objected to because of the following informalities: claim 5 does not appear to be further limiting in view of the amended claim 1. Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-5 and 7-8 are rejected under 35 U.S.C. 102(a)(1)(2) as being anticipated by U.S. Patent Application Publication No. 2014/0084346 A1 to Tajiri (“Tajiri”). As to claim 1, Tajiri discloses a normally-on high electron mobility transistor (HEMT), comprising: a first III-V compound layer (12); two dimensional electron gas (20) disposed in the first III-V compound layer (12); a second III-V compound layer (13) disposed on and directly contacting the first III-V compound layer (12), wherein composition of the first III-V compound layer (12) and composition of the second III-V compound layer (13) are different from each other, and the second III-V compound layer (13) is a single layer (13); two III-V compound cap layers (17b, 18b) covering and contacting the second III-V compound layer (13), wherein composition of the III-V compound cap layers (17b, 18b) is different from composition of the second III-V compound layer (13); a first opening (between 17b, 18b) disposed between the III-V compound cap layers (17b, 18b); two first insulating layers (19b) respectively covering and directly contacting a top surface of each of the III-V compound cap layers (17b, 18b), and the first insulating layers (19b) respectively directly contacting two sidewalls of the first opening (between 17b, 18b), wherein each of the first insulating layers (19b) is a unitary insulating structure formed from a single continuous material body, and the first insulating layers (19b) are not physically connected to each other; a second opening (between 19b) disposed between the first insulating layers (19b); and a gate electrode (16) disposed in the second opening (between 19b) and directly contacting the second III-V compound layer (13) (See Fig. 1, Fig. 4, ¶ 0051, ¶ 0053, ¶ 0056, ¶ 0057, ¶ 0058, ¶ 0069, ¶ 0070, ¶ 0071). As to claim 2, Tajiri further discloses wherein the first insulating layers (19b) separate the gate electrode (16) and the III-V compound cap layers (17b, 18b) (See Fig. 4). As to claim 3, Tajiri discloses further comprising: a source electrode (14) disposed at one side of the gate electrode (16) and embedded within one of the first insulating layers (19b), one of the III-V compound cap layers (17b, 18b), the first III-V compound layer (12), and the second III-V compound layer (13); and a drain electrode (15) disposed at another side of the gate electrode (16) and embedded within the other of first insulating layers (19b), the other of the III-V compound cap layers (17b, 18b), the first III-V compound layer (12), and the second III-V compound layer (13) (See Fig. 4, ¶ 0069). As to claim 4, Tajiri further discloses wherein the III-V compound cap layers (17b, 18b) comprise gallium nitride, aluminum nitride or indium gallium nitride (See ¶ 0056, ¶ 0057). As to claim 5, Tajiri further discloses wherein the gate electrode (16) contacts the second III-V compound layer (13) (See Fig. 4). As to claim 7, Tajiri further discloses wherein an angle is disposed between an outer sidewall of the second opening (between 19b) and a top surface of the second III-V compound layer (13), and the angle is between 30 degrees and 90 degrees (See Fig. 4). As to claim 8, Tajiri further discloses wherein the first insulating layers (19b) comprise silicon nitride, silicon oxide or silicon oxynitride (See Fig. 4, ¶ 0058). Furthermore, the limitation “first opening, second opening” is a product-by-process limitation that does not structurally distinguish the claimed invention over the prior art. It has been held it has been held that “The Patent Office bears a lesser burden of proof in making out a case of prima facie obviousness for product-by-process claims because of their peculiar nature” than when a product is claimed in the conventional fashion. In re Fessmann, 489 F.2d 742, 744, 180 USPQ 324, 326 (CCPA 1974). Once the examiner provides a rationale tending to show that the claimed product appears to be the same or similar to that of the prior art, although produced by a different process, the burden shifts to applicant to come forward with evidence establishing an unobvious difference between the claimed product and the prior art product. In re Marosi, 710 F.2d 798, 802, 218 USPQ 289, 292 (Fed. Cir. 1983). The structure implied by the process steps should be considered when assessing the patentability of product-by-process claims over the prior art, especially where the product can only be defined by the process steps by which the product is made, or where the manufacturing process steps would be expected to impart distinctive structural characteristics to the final product. See, e.g., In re Garnero, 412 F.2d 276, 279, 162 USPQ 221, 223 (CCPA 1979). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 6 is rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication No. 2014/0084346 A1 to Tajiri (“Tajiri”) as applied to claim 1 above, and further in view of U.S. Patent No. 6,528,405 B1 to Martinez et al. (“Martinez”). The teaching of Tajiri has been discussed above. As to claim 6, Tajiri in view of Martinez discloses further comprising two second insulating layers (72, 73) respectively covering a top surface of each of the first insulating layers (19b/71) (See Tajiri Fig. 4 and Martinez Fig. 5, Column 4, lines 67-68, Column 5, lines 1-64) such that the transistor is well protected and insulated from the environment. Response to Arguments Applicant's arguments with respect to claim 1 have been considered but are moot in view of the new ground(s) of rejection. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID CHEN whose telephone number is (571)270-7438. The examiner can normally be reached M-F 12-6. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JOSHUA BENITEZ can be reached at (571) 270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DAVID CHEN/Primary Examiner, Art Unit 2815
Read full office action

Prosecution Timeline

Aug 11, 2022
Application Filed
Mar 08, 2025
Non-Final Rejection — §102, §103
May 21, 2025
Response Filed
Jun 02, 2025
Final Rejection — §102, §103
Aug 25, 2025
Request for Continued Examination
Aug 27, 2025
Response after Non-Final Action
Sep 06, 2025
Non-Final Rejection — §102, §103
Dec 03, 2025
Response Filed
Feb 27, 2026
Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
44%
Grant Probability
94%
With Interview (+49.2%)
3y 9m
Median Time to Grant
High
PTA Risk
Based on 675 resolved cases by this examiner. Grant probability derived from career allow rate.

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