DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on May 22, 2026 has been entered.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-4 and 7-8 are rejected under 35 U.S.C. 102(a)(1)(2) as being anticipated by U.S. Patent Application Publication No. 2010/0155741 A1 to Ohki et al. (“Ohki”). As to claim 1, Ohki discloses a normally-on high electron mobility transistor (HEMT), comprising: a first III-V compound layer (2); two dimensional electron gas (2DEG) disposed in the first III-V compound layer (2); a second III-V compound layer (3) disposed on and directly contacting the first III-V compound layer (2), wherein composition of the first III-V compound layer (2) and composition of the second III-V compound layer (3) are different from each other, and the second III-V compound layer (3) is a single layer (3); two III-V compound cap layers (4, 5/6) covering and contacting the second III-V compound layer (3), wherein composition of the III-V compound cap layers (4, 5/6) is different from composition of the second III-V compound layer (3); a first opening (21) disposed between the III-V compound cap layers (4, 5/6); two first insulating layers (7) respectively covering and directly contacting a top surface of each of the III-V compound cap layers (4, 5/6), and the first insulating layers (7) respectively directly contacting two sidewalls of the first opening (21), wherein each of the first insulating layers (7) is a unitary insulating structure formed from a single continuous material body, and the first insulating layers (7) are not physically connected to each other; a second opening (22) disposed between the first insulating layers (7); a gate electrode (11g) disposed in the second opening (22) and directly contacting the second III-V compound layer (3); a source electrode (11s) disposed at one side of the gate electrode (11g) and physically contacting one (4, 5/6) of the III-V compound cap layers (4, 5/6); and a drain electrode (11d) disposed at another side of the gate electrode (11g) and physically contacting the other (4, 5/6) of the III-V compound cap layers (4, 5/6) (See Fig. 2, Fig. 8, ¶ 0020, ¶ 0021, ¶ 0022, ¶ 0049, ¶ 0050, ¶ 0054). As to claim 2, Ohki further discloses wherein the first insulating layers (7) separate the gate electrode (11g) and the III-V compound cap layers (4, 5/6) (See Fig. 2). As to claim 3, Ohki further discloses wherein: the source electrode (11s) is embedded within one of the first insulating layers (7), one of the III-V compound cap layers (4, 5/6), the first III-V compound layer (2), and the second III-V compound layer (3); and the drain electrode (11d) is embedded within the other of first insulating layers (7), the other of the III-V compound cap layers (4, 5/6), the first III-V compound layer (2), and the second III-V compound layer (3) (See Fig. 2). As to claim 4, Ohki further discloses wherein the III-V compound cap layers (4, 5/6) comprise gallium nitride, aluminum nitride or indium gallium nitride (See ¶ 0020). As to claim 7, Ohki further discloses wherein an angle is disposed between an outer sidewall of the second opening (22) and a top surface of the second III-V compound layer (3), and the angle is between 30 degrees and 90 degrees (See Fig. 2). As to claim 8, Ohki further discloses wherein the first insulating layers (7) comprise silicon nitride, silicon oxide or silicon oxynitride (See Fig. 2, ¶ 0020). Furthermore, the limitation “first opening, second opening” is a product-by-process limitation that does not structurally distinguish the claimed invention over the prior art. It has been held it has been held that “The Patent Office bears a lesser burden of proof in making out a case of prima facie obviousness for product-by-process claims because of their peculiar nature” than when a product is claimed in the conventional fashion. In re Fessmann, 489 F.2d 742, 744, 180 USPQ 324, 326 (CCPA 1974). Once the examiner provides a rationale tending to show that the claimed product appears to be the same or similar to that of the prior art, although produced by a different process, the burden shifts to applicant to come forward with evidence establishing an unobvious difference between the claimed product and the prior art product. In re Marosi, 710 F.2d 798, 802, 218 USPQ 289, 292 (Fed. Cir. 1983). The structure implied by the process steps should be considered when assessing the patentability of product-by-process claims over the prior art, especially where the product can only be defined by the process steps by which the product is made, or where the manufacturing process steps would be expected to impart distinctive structural characteristics to the final product. See, e.g., In re Garnero, 412 F.2d 276, 279, 162 USPQ 221, 223 (CCPA 1979).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 6 is rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication No. 2010/0155741 A1 to Ohki et al. (“Ohki”) as applied to claim 1 above, and further in view of U.S. Patent No. 6,528,405 B1 to Martinez et al. (“Martinez”). The teaching of Ohki has been discussed above. As to claim 6, although Ohki does disclose further comprising two second insulating layers respectively covering a top surface of each of the first insulating layers, Martinez does disclose further comprising two second insulating layers (72, 73) respectively covering a top surface of each of the first insulating layers (7/71) (See Ohki Fig. 2 and Martinez Fig. 5, Column 4, lines 67-68, Column 5, lines 1-64) such that the transistor is well protected and insulated from the environment.
Response to Arguments
Applicant's arguments with respect to claim 1 have been considered but are moot in view of the new ground(s) of rejection.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID CHEN whose telephone number is (571)270-7438. The examiner can normally be reached M-F 12-6.
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/DAVID CHEN/Primary Examiner, Art Unit 2815
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