Prosecution Insights
Last updated: July 17, 2026
Application No. 17/887,499

A Semiconductor Package Comprising An Underfill Material That Extends to, And is Coplanar With, A Bottom Surface Of An Electrical Device

Final Rejection §103
Filed
Aug 14, 2022
Examiner
MIHALIOV, DMITRI
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
4 (Final)
75%
Grant Probability
Favorable
5-6
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 75% — above average
75%
Career Allowance Rate
18 granted / 24 resolved
+7.0% vs TC avg
Strong +33% interview lift
Without
With
+33.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
24 currently pending
Career history
48
Total Applications
across all art units

Statute-Specific Performance

§103
82.8%
+42.8% vs TC avg
§102
12.5%
-27.5% vs TC avg
§112
2.3%
-37.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 24 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Status of Claims Examiner notes that in the instant application: -Claims 1-14 and 21-26 are pending. -Claims 5-20 are cancelled. -Claims 1, 5, 8, 12, 21, and 25 are amended. Response to Arguments Applicant’s amendments and arguments filed May 4, 2026 have been fully considered and are persuasive, the rejection has been updated to address the newly amended limitations. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-14 and 21-26 are rejected under 35 U.S.C. 103 as being unpatentable by of Huang et al. (U.S. Pub. 2019/0371781), hereinafter Huang, in view of Lee et al. (U.S. Pub. 2012/0193779), hereinafter Lee, and Chen et al. (U.S. Pub. 2015/0228580), hereinafter Chen. Regarding, Claim 1, Huang teaches a semiconductor structure (‘package structure’ (10); Fig. 1I, Paragraph [0043]), comprising: -a package ((10b); Fig. 1l, Paragraph [0043]) comprising a redistribution structure ((132); Fig. 1I, Paragraph [0031]) and at least one die (die (100); Fig. 1I, Paragraph [0027]), wherein the at least one die (100) is disposed on a first side (e.g. the top side, relative to the vertical) of the redistribution structure (148); -an electrical device (passive device (110); Fig. 1I, Paragraph [0034]) disposed on a second side (e.g. the bottom side, relative to the vertical) of the redistribution structure (132), wherein the electrical device (110) has a top surface (e.g. relative to the vertical) and a bottom surface (e.g. relative to the vertical) opposite to each other and has a side wall (e.g. relative to the horizontal) connected between the top surface and the bottom surface, and the top surface faces the redistribution structure (132); and -a plurality of conductive components (‘conductive connectors’ (138); Fig. 1I, Paragraph [0034]), wherein the conductive components (138) are disposed on the second side of the redistribution structure (bottom side of (132)). -wherein a distance from the bottom surface (of 110) to the second side (of (132)) along a direction perpendicular to the bottom surface (i.e. the vertical direction) is greater than the thickness of the redistribution structure (132) along the direction (See Fig. 1l). Huang does not explicitly recite: -an underfill material disposed between the top surface and the redistribution structure and extending along the side wall toward the bottom surface, wherein the underfill material has an end surface corresponding to the bottom surface, and the end surface is a flat surface Lee teaches a method of forming underfill material around an electrical device within the context of a stacked package, wherein: -an underfill material ((28); Fig. 2, Paragraph [0047]) disposed between the top surface (surface of (20) facing (11b); Fig. 2, Paragraphs [0047] and [0050]) and the redistribution structure ((115) formed on (11b), See Paragraphs [0050] and [0056], and Fig. 4) and extending along the side wall (side surface of (20)) toward the bottom surface (surface (21a); Fig. 2, Paragraph [0069]), wherein the underfill material (28) has an end surface (e.g. (28a) or (28b); Fig. 2, Paragraph [0069]) corresponding to the bottom surface (being coplanar with (21a)), and the end surface is a flat surface (e.g. (28a) or (28b), See Fig. 2) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Lee into the device of Huang such that an underfill material is disposed between the top surface and the redistribution structure and extending along the side wall toward the bottom surface, wherein the underfill material has an end surface corresponding to the bottom surface, and the end surface is a flat surface. This would be due to the fact that doing so would protect the electrical device from external moisture and more rigidly fix it to the redistribution structure (Lee, Paragraph [0058]). For clarity, a simple interpretation of Fig. 1l of Huang following the incorporation of the teachings of Lee is annotated and provided below, hereinafter “Fig. A”. PNG media_image1.png 602 631 media_image1.png Greyscale Neither Huang nor Lee explicitly disclose: -a substrate -the plurality of conductive components located between the redistribution structure and the substrate connects the package and the substrate - the electrical device is located between the substrate and the redistribution structure without contacting the substrate, and -a thickness of the electrical device along the direction is greater than a distance between the bottom surface of the electrical device and the substrate along the direction. Chen teaches a semiconductor structure comprising a package ((200); Fig. 1, Paragraph [0011]) with an electrical device ((250); Fig. 1, Paragraph [0034]) on one side of a redistribution structure ((212); Fig. 1, Paragraph [0025]) above a substrate ((102); Fig. 1, Paragraph [0011], wherein: -the plurality of conductive components ((230); Fig. 1, Paragraph [0041]) located between the redistribution structure (212) and the substrate (102) connects the package (200) and the substrate (102) - the electrical device (250) is located between the substrate (102) and the redistribution structure (212) without contacting the substrate (102), and -a thickness of the electrical device (20) along the direction (i.e. vertical) is greater than a distance between the bottom surface of the electrical device (bottom of (250)) and the substrate (102) along the direction (in the case where (250) is connected to lines (270) and passivation layer (PN) is not removed above them, e.g. Fig. 1, Paragraph [0039]) . It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Chen into the device of Huang as modified by Lee such that it further comprised a substrate and wherein the plurality of conductive components located between the redistribution structure and the substrate connects the package and the substrate; the electrical device is located between the substrate and the redistribution structure without contacting the substrate, and a thickness of the electrical device along the direction is greater than a distance between the bottom surface of the electrical device and the substrate along the direction. This would be due to the fact that doing so would produce the predictable results of integrating the package into a desired substrate structure while ensuring a low / reducing the form factor of the package (Chen, Paragraph [0053]). Regarding, Claim 2, Huang as modified by Lee and Chen teaches a semiconductor structure (‘package structure’ (10); Fig. 1I, Paragraph [0043]) of Claim 1, wherein: - the underfill material (Lee, (28)) extends (Huang, e.g. downwards, towards the bottom surface of (110); Fig. A) without creeping onto the bottom surface (of (110)). Regarding, Claim 3, Huang as modified by Lee and Chen teaches a semiconductor structure (‘package structure’ (10); Fig. 1I, Paragraph [0043]) of Claim 1, wherein: - the end surface (Lee, of (28), e.g. (28a) or (28b)) and the bottom surface (of (110)) are coplanar (Lee, Paragraph [0069] and Fig. 2, also see Fig. A). Regarding, Claim 4, Huang as modified by Lee and Chen teaches a semiconductor structure (‘package structure’ (10); Fig. 1I, Paragraph [0043]) of Claim 1, wherein: - the electrical device (110) is an integrated passive device (IPD) (Huang, Paragraph [0034]. Also Chen, Paragraph [0034]). Regarding, Claim 5, Huang as modified by Lee and Chen teaches a semiconductor structure (‘package structure’ (10); Fig. 1I, Paragraph [0043]) of Claim 1, wherein: -the conductive components (Huang, (138)) comprises a ball grid array (BGA) or a plurality of controlled collapse chip connection (C4) bumps (Huang, Paragraph [0035]). Regarding, Claim 6, Huang as modified by Lee and Chen teaches a semiconductor structure (‘package structure’ (10); Fig. 1I, Paragraph [0043]) of Claim 1, further comprising: - another package (Huang, (10c); Fig. 1I, Paragraph [0042]) stacking on the package (10b) to form a package-on-package (POP) structure (i.e. package (10) as a whole). Regarding, Claim 7, Huang as modified by Lee and Chen teaches a semiconductor structure (‘package structure’ (10); Fig. 1I, Paragraph [0043]) of Claim 1, wherein: - the package (Huang, 10b) comprises a multi-die package (Huang, See Paragraph [0026] ‘one or more die are placed’, see also Fig. 5J as an example). Regarding, Claim 8, Huang teaches a semiconductor structure (‘package structure’ (10); Fig. 1I, Paragraph [0043]), comprising: -a package ((10b); Fig. 1I, Paragraph [0043]) comprising a redistribution structure ((132); Fig. 1I, Paragraph [0031]) and at least one die (die (100); Fig. 1I, Paragraph [0027]), wherein the at least one die (100) is disposed on a first side (e.g. the top side, relative to the vertical) of the redistribution structure (148); -an electrical device (passive device (110); Fig. 1I, Paragraph [0034]) disposed on a second side (e.g. the bottom side, relative to the vertical) of the redistribution structure (132), wherein the electrical device (110) has a top surface (e.g. relative to the vertical) and a bottom surface (e.g. relative to the vertical) opposite to each other, and the top surface faces the redistribution structure (132); and -a plurality of conductive components (‘conductive connectors’ (138); Fig. 1I, Paragraph [0034]), wherein the conductive components (138) are disposed on the second side of the redistribution structure (bottom side of (132)). -wherein a distance from the bottom surface (of 110) to the second side (of (132)) along the direction (perpendicular to the bottom surface (i.e. the vertical direction)) is greater than the thickness of the redistribution structure (132) along the direction (See Fig. 1l). Huang does not explicitly recite: - an underfill material disposed between the top surface and the redistribution structure and extending toward the bottom surface, wherein the underfill material has an end surface corresponding to the bottom surface, and a distance between the end surface and the bottom surface along a direction perpendicular to the bottom surface is less than 5 micrometers, Lee teaches a method of forming underfill material around an electrical device within the context of a stacked package, wherein: -an underfill material ((28); Fig. 2, Paragraph [0047]) disposed between the top surface (surface of (20) facing (11b); Fig. 2, Paragraphs [0047] and [0050]) and the redistribution structure ((115) formed on (11b), See Paragraphs [0050] and [0056], and Fig. 4) and extending toward the bottom surface (surface (21a); Fig. 2, Paragraph [0069]), wherein the underfill material (28) has an end surface (e.g. ‘first upper surface’ (28a); Fig. 2, Paragraph [0069]) corresponding to the bottom surface (being coplanar with (21a)), and a distance between the end surface (28a) and the bottom surface (21a) along a direction perpendicular (the vertical direction) to the bottom surface (21a) is less than 5 micrometers (In this case the distance would be zero, as the two surfaces are coplanar (Fig. 2). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Lee into the device of Huang such that an underfill material is disposed between the top surface and the redistribution structure and extending toward the bottom surface, wherein the underfill material has an end surface corresponding to the bottom surface, and a distance between the end surface and the bottom surface along a direction perpendicular to the bottom surface is less than 5 micrometers. This would be due to the fact that doing so would protect the electrical device from external moisture and more rigidly fix it to the redistribution structure (Lee, Paragraph [0058]). Examiner again references the simple interpretation of the incorporation as shown in Fig. A above. Neither Huang nor Lee explicitly disclose: -a substrate -the plurality of conductive components located between the redistribution structure and the substrate connects the package and the substrate - the electrical device is located between the substrate and the redistribution structure without contacting the substrate, and -a thickness of the electrical device along the direction is greater than a distance between the bottom surface of the electrical device and the substrate along the direction. Chen teaches a semiconductor structure comprising a package ((200); Fig. 1, Paragraph [0011]) with an electrical device ((250); Fig. 1, Paragraph [0034]) on one side of a redistribution structure ((212); Fig. 1, Paragraph [0025]) above a substrate ((102); Fig. 1, Paragraph [0011], wherein: -the plurality of conductive components ((230); Fig. 1, Paragraph [0041]) located between the redistribution structure (212) and the substrate (102) connects the package (200) and the substrate (102) - the electrical device (250) is located between the substrate (102) and the redistribution structure (212) without contacting the substrate (102), and -a thickness of the electrical device (20) along the direction (i.e. vertical) is greater than a distance between the bottom surface of the electrical device (bottom of (250)) and the substrate (102) along the direction (in the case where (250) is connected to lines (270) and passivation layer (PN) is not removed above them, e.g. Fig. 1, Paragraph [0039]) . It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Chen into the device of Huang as modified by Lee such that it further comprised a substrate and wherein the plurality of conductive components located between the redistribution structure and the substrate connects the package and the substrate; the electrical device is located between the substrate and the redistribution structure without contacting the substrate, and a thickness of the electrical device along the direction is greater than a distance between the bottom surface of the electrical device and the substrate along the direction. This would be due to the fact that doing so would produce the predictable results of integrating the package into a desired substrate structure while ensuring a low / reducing the form factor of the package (Chen, Paragraph [0053]). Regarding, Claim 9, Huang as modified by Lee and Chen teaches a semiconductor structure (‘package structure’ (10); Fig. 1I, Paragraph [0043]) of Claim 8, wherein: - the underfill material (Lee, (28)) extends (Huang, e.g. downwards, towards the bottom surface of (110); Fig. A) without creeping onto the bottom surface (of (110)). Regarding, Claim 10, Huang as modified by Lee and Chen teaches a semiconductor structure (‘package structure’ (10); Fig. 1I, Paragraph [0043]) of Claim 8, wherein: - the end surface (Lee, of (28), e.g. (28a) or (28b)) and the bottom surface (of (110)) are coplanar (Lee, Paragraph [0069] and Fig. 2, also see Fig. A). Regarding, Claim 11, Huang as modified by Lee and Chen teaches a semiconductor structure (‘package structure’ (10); Fig. 1I, Paragraph [0043]) of Claim 8, wherein: - the electrical device (110) is an integrated passive device (IPD) (Huang, Paragraph [0034] Also Chen, Paragraph [0034]). Regarding, Claim 12, Huang as modified by Lee and Chen teaches a semiconductor structure (‘package structure’ (10); Fig. 1I, Paragraph [0043]) of Claim 8, wherein: -the conductive components (Huang, (138)) comprises a ball grid array (BGA) or a plurality of controlled collapse chip connection (C4) bumps (Huang, Paragraph [0035]). Regarding, Claim 13, Huang as modified by Lee and Chen teaches a semiconductor structure (‘package structure’ (10); Fig. 1I, Paragraph [0043]) of Claim 8, further comprising: - another package (Huang, (10c); Fig. 1l, Paragraph [0042]) stacking on the package (10b) to form a package-on-package (POP) structure (i.e. package (10) as a whole). Regarding, Claim 14, Huang as modified by Lee and Chen teaches a semiconductor structure (‘package structure’ (10); Fig. 1I, Paragraph [0043]) of Claim 8, wherein: - the package (Huang, 10b) comprises a multi-die package (Huang, See Paragraph [0026] ‘one or more die are placed’, see also Fig. 5J as an example). Regarding, Claim 21, Huang teaches a semiconductor structure (‘package structure’ (10); Fig. 1l, Paragraph [0043]), comprising: -a package ((10b); Fig. 1l, Paragraph [0043]) comprising a redistribution structure ((132); Fig. 1l, Paragraph [0031]) and at least one die (die (100); Fig. 1l, Paragraph [0027]), wherein the at least one die (100) is disposed on a first side (e.g. the top side, relative to the vertical) of the redistribution structure (148); -an electrical device (passive device (110); Fig. 1l, Paragraph [0034]) disposed on a second side (e.g. the bottom side, relative to the vertical) of the redistribution structure (132), wherein the electrical device (110) has a top surface (e.g. relative to the vertical) and a bottom surface (e.g. relative to the vertical) opposite to each other, and the top surface faces the redistribution structure (132); and -a plurality of conductive components (‘conductive connectors’ (138); Fig. 1I, Paragraph [0034]), wherein the conductive components (138) are disposed on the second side of the redistribution structure (bottom side of (132)). -wherein a distance from the bottom surface (of 110) to the second side (of (132)) along the direction (perpendicular to the bottom surface (i.e. the vertical direction)) is greater than the thickness of the redistribution structure (132) along the direction (See Fig. 1l). Huang does not explicitly recite: -an underfill material comprises a main part and an extending part, wherein the main part is disposed between the top surface and the redistribution structure, the extending part extends toward the bottom surface and has an end surface corresponding to the bottom surface, and the extending part does not overlap the bottom surface along a direction perpendicular to the bottom surface, Lee teaches a method of forming underfill material around an electrical device within the context of a stacked package, wherein: -an underfill material ((28); Fig. 2, Paragraph [0047]) comprises a main part (portion of (28) within the area of between (d2) and (d4); Fig. 2, Paragraphs [0058] and [0072]) and an extending part (portion of (28) within the area of (d2); Fig. 2, Paragraph [0058] and [0072]), wherein the main part ((28) between (d2) and (d4) is disposed between the top surface (surface of (20) facing (11b); Fig. 2, Paragraphs [0047] and [0050]) and the redistribution structure ((115) formed on (11b), See Paragraphs [0050] and [0056], and Fig. 4), the extending part ((28) within (d2)) extends towards the bottom surface (surface (21a); Fig. 2, Paragraph [0058]) and has an end surface ((28a); Fig. 2, Paragraph [0069]) corresponding to the bottom surface (being coplanar with (21a)), and the extending part ((28) within (d2)) does not overlap (being instead adjacent to) the bottom surface (21a) along a direction perpendicular (the vertical direction) to the bottom surface (21a). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Lee into the device of Huang such that it includes an underfill material comprises a main part and an extending part, wherein the main part is disposed between the top surface and the redistribution structure, the extending part extends toward the bottom surface and has an end surface corresponding to the bottom surface, and the extending part does not overlap the bottom surface along a direction perpendicular to the bottom surface. This would be due to the fact that doing so would protect the electrical device from external moisture and more rigidly fix it to the redistribution structure (Lee, Paragraph [0058]). Examiner again references the simple interpretation of the incorporation as shown in Fig. A above. Neither Huang nor Lee explicitly disclose: -a substrate -the plurality of conductive components located between the redistribution structure and the substrate connects the package and the substrate - the electrical device is located between the substrate and the redistribution structure without contacting the substrate, and -a thickness of the electrical device along the direction is greater than a distance between the bottom surface of the electrical device and the substrate along the direction. Chen teaches a semiconductor structure comprising a package ((200); Fig. 1, Paragraph [0011]) with an electrical device ((250); Fig. 1, Paragraph [0034]) on one side of a redistribution structure ((212); Fig. 1, Paragraph [0025]) above a substrate ((102); Fig. 1, Paragraph [0011], wherein: -the plurality of conductive components ((230); Fig. 1, Paragraph [0041]) located between the redistribution structure (212) and the substrate (102) connects the package (200) and the substrate (102) - the electrical device (250) is located between the substrate (102) and the redistribution structure (212) without contacting the substrate (102), and -a thickness of the electrical device (20) along the direction (i.e. vertical) is greater than a distance between the bottom surface of the electrical device (bottom of (250)) and the substrate (102) along the direction (in the case where (250) is connected to lines (270) and passivation layer (PN) is not removed above them, e.g. Fig. 1, Paragraph [0039]) . It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Chen into the device of Huang as modified by Lee such that it further comprised a substrate and wherein the plurality of conductive components located between the redistribution structure and the substrate connects the package and the substrate; the electrical device is located between the substrate and the redistribution structure without contacting the substrate, and a thickness of the electrical device along the direction is greater than a distance between the bottom surface of the electrical device and the substrate along the direction. This would be due to the fact that doing so would produce the predictable results of integrating the package into a desired substrate structure while ensuring a low / reducing the form factor of the package (Chen, Paragraph [0053]). Regarding, Claim 22, Huang as modified by Lee and Chen teaches a semiconductor structure (‘package structure’ (10); Fig. 1I, Paragraph [0043]) of Claim 21, wherein: - the underfill material (Lee, (28)) extends (Huang, e.g. downwards, towards the bottom surface of (110); Fig. A) without creeping onto the bottom surface (of (110)). Regarding, Claim 23, Huang as modified by Lee and Chen teaches a semiconductor structure (‘package structure’ (10); Fig. 1I, Paragraph [0043]) of Claim 21, wherein: - the end surface (Lee, of (28), e.g. (28a) or (28b)) and the bottom surface (of (110)) are coplanar (Lee, Paragraph [0069] and Fig. 2, also see Fig. A). Regarding, Claim 24, Huang as modified by Lee and Zhang teaches a semiconductor structure (‘package structure’ (10); Fig. 1I, Paragraph [0043]) of Claim 21, wherein: - the electrical device (110) is an integrated passive device (IPD) (Huang, Paragraph [0034] Also Chen, Paragraph [0034]). Regarding, Claim 25, Huang as modified by Lee and Zhang teaches a semiconductor structure (‘package structure’ (10); Fig. 1I, Paragraph [0043]) of Claim 21, wherein: -the conductive components (Huang, (138)) comprises a ball grid array (BGA) or a plurality of controlled collapse chip connection (C4) bumps (Huang, Paragraph [0035]). Regarding, Claim 26, Huang as modified by Lee and Zhang teaches a semiconductor structure (‘package structure’ (10); Fig. 1l, Paragraph [0043]) of Claim 21, further comprising: - another package (Huang, (10c); Fig. 1l, Paragraph [0042]) stacking on the package (10b) to form a package-on-package (POP) structure (i.e. package (10) as a whole). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DMITRI MIHALIOV whose telephone number is (571)270-5220. The examiner can normally be reached weekdays 7:30 - 17:30 US Eastern Time. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at (571) 272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /D.M./Examiner, Art Unit 2812 /DAVIENNE N MONBLEAU/Supervisory Patent Examiner, Art Unit 2812
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Prosecution Timeline

Show 2 earlier events
Aug 14, 2025
Response Filed
Sep 03, 2025
Final Rejection mailed — §103
Dec 03, 2025
Request for Continued Examination
Dec 10, 2025
Response after Non-Final Action
Feb 03, 2026
Non-Final Rejection mailed — §103
May 04, 2026
Response Filed
Jun 01, 2026
Final Rejection mailed — §103
Jul 06, 2026
Interview Requested

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