Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Detailed Action
Claim Rejections – 35 U.S.C. 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 12 and 18 rejected under 35 U.S.C. 103 as being unpatentable over Aozasa (U.S. Patent No. 6,054,734) of record, in view of Lee (U.S. Patent Pub. No. 2012/0012913) of record, in view of Bae1 (U.S. Patent Pub. No. 2007/0158731).
Regarding Claim 1
FIG. 22 of Aozasa discloses a semiconductor device, comprising: a first word line (WL) structure (216) extending along a first lateral direction over a top surface of a substrate (204); a ferroelectric layer (282) disposed above the first WL structure; a plurality of first channel films (210) disposed above the ferroelectric layer and separated (by 220) from one another along the first lateral direction, the first WL structure interposed between the substrate and the plurality of first channel films along a vertical direction perpendicular to the first and the second lateral directions.
Aozasa is silent with respect to “a plurality of first source line (SL) structures separated from one another along the first lateral direction”; “each of the first SL structures is disposed above a corresponding one of the first channel films; and a plurality of first bit line structures separated from one another along the first lateral direction”; “each of the first BL structures is disposed above a corresponding one of the first channel films” and “the first WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction”.
However, the first WL structure of Aozasa has a rectangular shape; and FIG. 4 of Lee discloses a similar semiconductor device, wherein the first WL structure (40) has a rectangular shape or an oval shape.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Aozasa, such that the rectangular first WL structure of Aozasa is replaced by an oval first WL structure, as taught by Lee. The ordinary artisan would have been motivated to modify Aozasa in the above manner because it is easier to form the first word line structure in an oval shape rather than in a rectangular shape ([0052] of Lee).
Aozasa as taught by Lee is silent with respect to “a plurality of first source line (SL) structures separated from one another along the first lateral direction”; “each of the first SL structures is disposed above a corresponding one of the first channel films; and a plurality of first bit line structures separated from one another along the first lateral direction”; “each of the first BL structures is disposed above a corresponding one of the first channel films”.
FIG. 12 of Bae1 discloses a similar semiconductor device, comprising a plurality of first source line (SL) structures (220) separated from one another along the first lateral direction (FIG. 10), wherein each of the first SL structures is disposed above a corresponding one (216s) of the first channel films; and a plurality of first bit line structures (230) separated from one another along the first lateral direction (FIG. 10); each of the first BL structures is disposed above a corresponding one (216d) of the first channel films.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Aozasa, such that the rectangular first WL structure of Aozasa is replaced by has oval first WL structure, as taught by Bae1. The ordinary artisan would have been motivated to modify Aozasa in the above manner for purpose of providing conductive paths used to read and write data.
Regarding Claim 12
FIG. 22 of Aozasa discloses a semiconductor device, comprising: a plurality of ferroelectric memory cells arranged over a substrate (204); wherein each of the plurality of ferroelectric memory cells includes: a first conductive structure (216) extending along a first lateral direction and having a central portion and a pair of side portions; a ferroelectric layer (282) disposed above the first conductive structure and in contact with the central portion of the first conductive structure; a channel film (210) disposed above a portion of the ferroelectric layer; a second conductive structure (66, FIG. 10) disposed above and in contact with a first end portion (40) of the channel film; and a third conductive structure (68) disposed above and in contact with a second end portion (42) of the channel film opposite to the first end portion along the second lateral direction.
Aozasa is silent with respect to “the side portions respectively extending away from the central portion along a second lateral direction perpendicular to the first lateral direction”.
However, the first WL structure of Aozasa has a rectangular shape; and FIG. 4 of Lee discloses a similar semiconductor device, wherein the first WL structure (40) has a rectangular shape or an oval shape.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Aozasa, such that the rectangular first WL structure of Aozasa is replaced by an oval first WL structure, as taught by Lee. The ordinary artisan would have been motivated to modify Aozasa in the above manner because it is easier to form the first word line structure in an oval shape rather than in a rectangular shape ([0052] of Lee).
Regarding Claim 18
FIG. 25 of Aozasa discloses a method for manufacturing a memory device, comprising: forming a first word line (WL) structure (216) extending along a first lateral direction over a top surface of a substrate (204), wherein the WL structure has a central portion and a pair of side portion; forming a ferroelectric layer (212) over the WL structure; forming, over the ferroelectric layer, a plurality of first channel films (210) separated from one another, the WL structure interposed between the substrate and the plurality of first channel films along a vertical direction perpendicular to the first and the second lateral directions.
Aozasa is silent with respect to “the first WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction, respectively” and “forming a plurality of source line (SL) structures and a plurality of bit line (BL) structures over the plurality of first channel films, wherein each of the plurality of first channel films is in contact with a corresponding one of the SL structures and a corresponding one of the BL structures”.
However, the first WL structure of Aozasa has a rectangular shape; and FIG. 4 of Lee discloses a similar semiconductor device, wherein the first WL structure (40) has a rectangular shape or an oval shape.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Aozasa, such that the rectangular first WL structure of Aozasa is replaced by an oval first WL structure, as taught by Lee. The ordinary artisan would have been motivated to modify Aozasa in the above manner because it is easier to form the first word line structure in an oval shape rather than in a rectangular shape ([0052] of Lee).
Aozasa as taught by Lee is silent with respect to “each of the first SL structures is disposed above a corresponding one of the first channel films; and a plurality of first bit line structures separated from one another along the first lateral direction”; “each of the first BL structures is disposed above a corresponding one of the first channel films”.
FIG. 12 of Bae1 discloses a similar semiconductor device, comprising a plurality of first source line (SL) structures (220) separated from one another along the first lateral direction (FIG. 10), wherein each of the first SL structures is disposed above a corresponding one of the first channel films; and a plurality of first bit line structures (230) separated from one another along the first lateral direction (FIG. 10); each of the first BL structures is disposed above a corresponding one of the first channel films.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Aozasa, such that the rectangular first WL structure of Aozasa is replaced by has oval first WL structure, as taught by Bae1. The ordinary artisan would have been motivated to modify Aozasa in the above manner for purpose of providing conductive paths used to read and write data.
Claims 1, 12 and 18 rejected under 35 U.S.C. 103 as being unpatentable over Kaneko (U.S. Patent Pub. No. 2013/0094274), in view of Ratnam (U.S. Patent No. 8,885,407), in view of Lu (U.S. Patent Pub. No. 2023/0262958).
Regarding Claim 1
FIG. 1 of Kaneko discloses a semiconductor device, comprising: a first word line (WL) structure (12) extending along a first lateral direction over a top surface of a substrate (11); a ferroelectric [0083] layer (13) disposed above the first WL structure; a plurality of first channel films (14) disposed above the ferroelectric layer and separated from one another along the first lateral direction (FIG. 2), the first WL structure interposed between the substrate and the plurality of first channel films along a vertical direction perpendicular to the first and the second lateral directions; a plurality of first source line (SL) structures (FIG. 2, connected to drain of 32) separated from one another along the first lateral direction; and a plurality of first bit line (BL) structures separated from one another along the first lateral direction (FIG. 2).
Kaneko is silent with respect to “each of the first SL structures is disposed above a corresponding one of the first channel films”; “each of the first BL structures is disposed above a corresponding one of the first channel films” and “the first WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction”.
FIG. 2 of Ratnam discloses a similar semiconductor device, comprising a plurality of first source line (SL) structures (1024) separated from one another along the first lateral direction (FIG. 7); and a plurality of first bit line (BL) structures (1031) separated from one another along the first lateral direction (FIG. 7), wherein each of the first SL structures is disposed above a corresponding one (1051) of the first channel films; each of the first BL structures is disposed above a corresponding one (1052) of the first channel films.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Kaneko, as taught by Ratnam. The ordinary artisan would have been motivated to modify Kaneko in the above manner for purpose of organizing an array of memory cells (Col. 31-46 of Ratnam).
Kaneko as modified by Ratnam is silent with respect to “the first WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction”.
FIG. 1 of Lu discloses a similar semiconductor device, wherein the first WL structure (111) has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction [0050].
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Kaneko, as taught by Lu. The ordinary artisan would have been motivated to modify Kaneko in the above manner for purpose of increasing areas used for other structures and improving gate induced drain leakage effect ([0050, 0057] of Lu).
Regarding Claim 12
FIG. 1 of Kaneko discloses a semiconductor device, comprising: a plurality of ferroelectric memory cells arranged over a substrate (12); wherein each of the plurality of ferroelectric memory cells includes: a first conductive structure (12) extending along a first lateral direction and having a central portion and a pair of side portions; a ferroelectric layer (13) disposed above the first conductive structure and in contact with the central portion of the first conductive structure; a channel film (14) disposed above a portion of the ferroelectric layer; a second conductive structure (15s) disposed above and in contact with a first end portion (source) of the channel film; and a third conductive structure (15d) disposed above and in contact with a second end portion (drain) of the channel film opposite to the first end portion along the second lateral direction.
Kaneko is silent with respect to “the side portions respectively extending away from the central portion along a second lateral direction perpendicular to the first lateral direction”.
FIG. 1 of Lu discloses a similar semiconductor device, wherein the first WL structure (111) has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction [0050].
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Kaneko, as taught by Lu. The ordinary artisan would have been motivated to modify Kaneko in the above manner for purpose of increasing areas used for other structures and improving gate induced drain leakage effect ([0050, 0057] of Lu).
Regarding Claim 18
FIG. 1 of Kaneko discloses a method for manufacturing a memory device, comprising: forming a first word line (WL) structure (12) extending along a first lateral direction over a top surface of a substrate (11), wherein the WL structure has a central portion and a pair of side portion; forming a ferroelectric layer (13) over the WL structure; forming, over the ferroelectric layer, a plurality of first channel films (14) separated from one another, the WL structure interposed between the substrate and the plurality of first channel films along a vertical direction perpendicular to the first and the second lateral directions; and forming a plurality of source line (SL) structures (FIG. 2, connected to drain of 32) and a plurality of bit line (BL) structures over the plurality of first channel films, wherein each of the plurality of first channel films is in contact with a corresponding one of the SL structures and a corresponding one of the BL structure.
Kaneko is silent with respect to “the first WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction, respectively” and “forming a plurality of source line (SL) structures and a plurality of bit line (BL) structures over the plurality of first channel films, wherein each of the plurality of first channel films is in contact with a corresponding one of the SL structures and a corresponding one of the BL structure”.
FIG. 2 of Ratnam discloses a similar semiconductor device, comprising a plurality of first source line (SL) structures (1024) separated from one another along the first lateral direction (FIG. 7); and a plurality of first bit line (BL) structures (1031) separated from one another along the first lateral direction (FIG. 7), wherein each of the first SL structures is disposed above a corresponding one of the first channel films; each of the first BL structures is disposed above a corresponding one of the first channel films.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Kaneko, as taught by Ratnam. The ordinary artisan would have been motivated to modify Kaneko in the above manner for purpose of organizing an array of memory cells (Col. 31-46 of Ratnam).
Kaneko as modified by Ratnam is silent with respect to “the first WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction”.
FIG. 1 of Lu discloses a similar semiconductor device, wherein the first WL structure (111) has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction [0050].
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Kaneko, as taught by Lu. The ordinary artisan would have been motivated to modify Kaneko in the above manner for purpose of increasing areas used for other structures and improving gate induced drain leakage effect ([0050, 0057] of Lu).
Claims 1, 12 and 18 rejected under 35 U.S.C. 103 as being unpatentable over Teo (U.S. Patent Pub. No. 2020/0303417) of record, in view of Takahashi (U.S. Patent No. 6,423,584), in view of CX (CN 108899309, machine-translation provided).
Regarding Claim 1
FIG. 1 of Teo discloses a semiconductor device, comprising: a first word line (WL) structure (161-171) extending along a first lateral direction over a top surface of a substrate (181); a ferroelectric [0083] layer (151) disposed above the first WL structure; a plurality of first channel films (MoS2) disposed above the ferroelectric layer and separated from one another along the first lateral direction, the first WL structure interposed between the substrate and the plurality of first channel films along a vertical direction perpendicular to the first and the second lateral directions; a plurality of first source electrodes (111) separated from one another along the first lateral direction; and a plurality of first drain electrodes (131) separated from one another along the first lateral direction.
Teo is silent with respect to “each of the first SL structures is disposed above a corresponding one of the first channel films”; “each of the first BL structures is disposed above a corresponding one of the first channel films” and “the first WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction”.
FIG. 7 of Takahashi discloses a similar semiconductor device, comprising a plurality of first source line (SL) structures (SS) separated from one another along the first lateral direction; and a plurality of first bit line (BL) structures (SB) separated from one another along the first lateral direction, wherein each of the first SL structures is disposed above a corresponding one (2S) of the first channel films; each of the first BL structures is disposed above a corresponding one (2D) of the first channel films.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Teo, as taught by Takahashi. The ordinary artisan would have been motivated to modify Teo in the above manner for purpose of proving conductive paths used to read and write data.
Teo as modified by Takahashi is silent with respect to “the first WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction”.
FIG. 16 of CX discloses a similar semiconductor device, wherein the first WL structure (30) has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Teo, as taught by CX. The ordinary artisan would have been motivated to modify Teo in the above manner for purpose of reducing parasitic capacitances (text of CX).
Regarding Claim 12
FIG. 1 of Teo discloses a semiconductor device, comprising: a plurality of ferroelectric memory cells arranged over a substrate (181); wherein each of the plurality of ferroelectric memory cells includes: a first conductive structure (161-171) extending along a first lateral direction and having a central portion and a pair of side portions; a ferroelectric layer (151) disposed above the first conductive structure and in contact with the central portion of the first conductive structure; a channel film (MoS2) disposed above a portion of the ferroelectric layer; a second conductive structure (111) disposed above and in contact with a first end portion (source) of the channel film; and a third conductive structure (131) disposed above and in contact with a second end portion (drain) of the channel film opposite to the first end portion along the second lateral direction.
Teo is silent with respect to “the side portions respectively extending away from the central portion along a second lateral direction perpendicular to the first lateral direction”.
FIG. 16 of CX discloses a similar semiconductor device, wherein the first WL structure (30) has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Teo, as taught by CX. The ordinary artisan would have been motivated to modify Teo in the above manner for purpose of reducing parasitic capacitances (text of CX).
Regarding Claim 18
FIG. 1 of Teo discloses a method for manufacturing a memory device, comprising: forming a first word line (WL) structure (161-171) extending along a first lateral direction over a top surface of a substrate (181), wherein the WL structure has a central portion and a pair of side portion; forming a ferroelectric layer (151) over the WL structure; forming, over the ferroelectric layer, a plurality of first channel films (MoS2) separated from one another, the WL structure interposed between the substrate and the plurality of first channel films along a vertical direction perpendicular to the first and the second lateral directions; and forming a plurality of first source electrodes (111) separated from one another along the first lateral direction; and a plurality of first drain electrodes (131) separated from one another along the first lateral direction.
Teo is silent with respect to “the first WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction, respectively” and “forming a plurality of source line (SL) structures and a plurality of bit line (BL) structures over the plurality of first channel films, wherein each of the plurality of first channel films is in contact with a corresponding one of the SL structures and a corresponding one of the BL structure”.
FIG. 7 of Takahashi discloses a similar semiconductor device, comprising a plurality of first source line (SL) structures (SS) separated from one another along the first lateral direction; and a plurality of first bit line (BL) structures (SB) separated from one another along the first lateral direction, wherein each of the first SL structures is disposed above a corresponding one (2S) of the first channel films; each of the first BL structures is disposed above a corresponding one (2D) of the first channel films.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Teo, as taught by Takahashi. The ordinary artisan would have been motivated to modify Teo in the above manner for purpose of proving conductive paths used to read and write data.
Teo as modified by Takahashi is silent with respect to “the first WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction”.
FIG. 16 of CX discloses a similar semiconductor device, wherein the first WL structure (30) has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Teo, as taught by CX. The ordinary artisan would have been motivated to modify Teo in the above manner for purpose of reducing parasitic capacitances (text of CX).
Claims 1, 12 and 18 rejected under 35 U.S.C. 103 as being unpatentable over Dewey (U.S. Patent Pub. No. 2020/0411692), in view of Chang (U.S. Patent Pub. No. 2020/0343265), in view of Seo (KR 100723527) of record
Regarding Claim 1
FIG. 3 of Dewey discloses a semiconductor device, comprising: a first word line (WL) structure (220) extending along a first lateral direction over a top surface of a substrate (205); a ferroelectric layer (315) disposed above the first WL structure [0044]; a plurality [0039] of first channel films (210) disposed above the ferroelectric layer and separated from one another along the first lateral direction [0040], the first WL structure interposed between the substrate and the plurality of first channel films along a vertical direction perpendicular to the first and the second lateral directions
Dewey is silent with respect to “each of the first SL structures is disposed above a corresponding one of the first channel films; and a plurality of first bit line structures separated from one another along the first lateral direction”; “each of the first BL structures is disposed above a corresponding one of the first channel films”.
FIG. 5 of Chang discloses a similar semiconductor device, comprising a plurality of first source line (SL) structures separated from one another along the first lateral direction; and a plurality of first bit line (BL) structures separated from one another along the first lateral direction, wherein each of the first SL structures is disposed above a corresponding one of the first channel films (between 104a and 104b); each of the first BL structures is disposed above a corresponding one of the first channel films.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Dewey, as taught by Chang. The ordinary artisan would have been motivated to modify Dewey in the above manner for purpose of providing conductive paths used to read and write data.
Dewey as modified by Chang is silent with respect to “the first WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction”.
FIG. 3 of Seo discloses a similar semiconductor device, wherein the first WL structure (231) has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Dewey, as taught by Seo. The ordinary artisan would have been motivated to modify Dewey in the above manner for purpose of preventing short channel effects (BACKGROUND-ART of Seo).
Regarding Claim 12
FIG. 3 of Dewey discloses a semiconductor device, comprising: a plurality of ferroelectric memory cells arranged over a substrate (205); wherein each of the plurality of ferroelectric memory cells includes: a first conductive structure (220) extending along a first lateral direction and having a central portion and a pair of side portions; a ferroelectric layer (315) disposed above the first conductive structure and in contact with the central portion of the first conductive structure; a channel film (210) disposed above a portion of the ferroelectric layer; a second conductive structure (250) disposed above and in contact with a first end portion (source) of the channel film; and a third conductive structure (250) disposed above and in contact with a second end portion (drain) of the channel film opposite to the first end portion along the second lateral direction.
Dewey is silent with respect to “the side portions respectively extending away from the central portion along a second lateral direction perpendicular to the first lateral direction”.
FIG. 3 of Seo discloses a similar semiconductor device, wherein the first WL structure (231) has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Dewey, as taught by Seo. The ordinary artisan would have been motivated to modify Dewey in the above manner for purpose of preventing short channel effects (BACKGROUND-ART of Seo).
Regarding Claim 18
FIG. 3 of Dewey discloses a method for manufacturing a memory device, comprising: forming a first word line (WL) structure (220) extending along a first lateral direction over a top surface of a substrate (205), wherein the WL structure has a central portion and a pair of side portion; forming a ferroelectric layer (315) over the WL structure; forming, over the ferroelectric layer, a plurality of first channel films (210) separated from one another, the WL structure interposed between the substrate and the plurality of first channel films along a vertical direction perpendicular to the first and the second lateral directions.
Dewey is silent with respect to “the first WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction, respectively” and “forming a plurality of source line (SL) structures and a plurality of bit line (BL) structures over the plurality of first channel films, wherein each of the plurality of first channel films is in contact with a corresponding one of the SL structures and a corresponding one of the BL structure”.
FIG. 5 of Chang discloses a similar semiconductor device, comprising a plurality of first source line (SL) structures separated from one another along the first lateral direction; and a plurality of first bit line (BL) structures separated from one another along the first lateral direction, wherein each of the first SL structures is disposed above a corresponding one of the first channel films (between 104a and 104b); each of the first BL structures is disposed above a corresponding one of the first channel films.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Dewey, as taught by Chang. The ordinary artisan would have been motivated to modify Dewey in the above manner for purpose of providing conductive paths used to read and write data.
Dewey as modified by Chang is silent with respect to “the first WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction”.
FIG. 3 of Seo discloses a similar semiconductor device, wherein the first WL structure (231) has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Dewey, as taught by Seo. The ordinary artisan would have been motivated to modify Dewey in the above manner for purpose of preventing short channel effects (BACKGROUND-ART of Seo).
Claims 1, 12, 13 and 18 rejected under 35 U.S.C. 103 as being unpatentable over Li (U.S. Patent Pub. No. 2018/0190338) of record, in view of Bae (U.S. Patent Pub. No. 2016/0351711) of record
Regarding Claim 1
FIG. 5 of Li discloses a semiconductor device, comprising: a first word line (WL) structure (502+508) extending along a first lateral direction over a top surface of a substrate (500); a ferroelectric [0032] layer (510) disposed above the first WL structure; a plurality (FIG. 9) of first channel films (512) disposed above the ferroelectric layer and separated from one another along the first lateral direction, the first WL structure interposed between the substrate and the plurality of first channel films along a vertical direction perpendicular to the first and the second lateral directions; a plurality of first source line (SL) structures separated from one another along the first lateral direction [0027], wherein each of the first SL structures is disposed above a corresponding one of the first channel films; and a plurality of first bit line (BL) structures [0033] separated from one another along the first lateral direction, wherein each of the first BL structures is disposed above a corresponding one of the first channel films, wherein the first WL structure has a first portion (502) and a second portion (508), and wherein the second portion of the first WL structure extend away from the first portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction
Li is silent with respect to “the first WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction”.
FIG. 8 of Bae discloses a similar semiconductor device, wherein the first WL structure (830) has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Li, as taught by Bae, such that the first WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction, because the claimed shape was a matter of choice (compare FIGS. 7 and 8 of Bae).
The ordinary artisan would have been motivated to modify Li in the above manner for purpose of increasing effective channel length, reducing short channel effect, preventing degradation of electrical characteristics, and improving reliability ([0004, 0153] of Bae). Furthermore, it has been held by the courts that a change in shape or configuration, without any criticality, is nothing more than one of numerous shapes that one of ordinary skill in the art will find obvious to provide based on the suitability for the intended final application. See MPEP 2144.04 (IV) (B)).
Regarding Claim 12
FIG. 5 of Li discloses a semiconductor device, comprising: a plurality of ferroelectric memory cells arranged over a substrate (500); wherein each of the plurality of ferroelectric memory cells includes: a first conductive structure (502+508) extending along a first lateral direction and having a central portion and a pair of side portions; a ferroelectric layer (510) disposed above the first conductive structure and in contact with the central portion of the first conductive structure [0032]; a channel film (512) disposed above a portion of the ferroelectric layer; a second conductive structure (SL) disposed above and in contact with a first end portion of the channel film; and a third conductive structure (BL) disposed above and in contact with a second end portion of the channel film opposite to the first end portion along the second lateral direction.
Li is silent with respect to “the side portions respectively extending away from the central portion along a second lateral direction perpendicular to the first lateral direction”.
FIG. 8 of Bae discloses a similar semiconductor device, wherein the first WL structure (830) has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Li, as taught by Bae, such that the side portions respectively extending away from the central portion along a second lateral direction perpendicular to the first lateral direction, because the claimed shape was a matter of choice (compare FIGS. 7 and 8 of Bae).
The ordinary artisan would have been motivated to modify Li in the above manner for of increasing effective channel length, reducing short channel effect, preventing degradation of electrical characteristics and improving reliability ([0004, 0153] of Bae). Furthermore, it has been held by the courts that a change in shape or configuration, without any criticality, is nothing more than one of numerous shapes that one of ordinary skill in the art will find obvious to provide based on the suitability for the intended final application. See MPEP 2144.04 (IV) (B)).
Regarding Claim 13
FIG. 4 of Li discloses the second (SL) and third (BL) conductive structures, in parallel with each other, extend along the first lateral direction.
Regarding Claim 18
FIG. 5 of Li discloses a method for manufacturing a memory device, comprising: forming a first word line (WL) structure (502+508) extending along a first lateral direction over a top surface of a substrate (500), wherein the WL structure has a central portion and a pair of side portion; forming a ferroelectric layer (510) over the WL structure; forming, over the ferroelectric layer, a plurality of first channel films (512) separated from one another, the WL structure interposed between the substrate and the plurality of first channel films along a vertical direction perpendicular to the first and the second lateral directions; and forming a plurality of source line (SL) structures [0027] and a plurality of bit line (BL) structures over the plurality of first channel films [0033], wherein each of the plurality of first channel films is in contact with a corresponding one of the SL structures and a corresponding one of the BL structure.
Li is silent with respect to “the first WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction, respectively”.
FIG. 8 of Bae discloses a similar semiconductor device, wherein the first WL structure (830) has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Li, as taught by Bae, such that the first WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction, respectively, because the claimed shape was a matter of choice (compare FIGS. 7 and 8 of Bae).
The ordinary artisan would have been motivated to modify Li in the above manner for purpose of increasing effective channel length, reducing short channel effect, preventing degradation of electrical characteristics, and improving reliability ([0004, 0153] of Bae). Furthermore, it has been held by the courts that a change in shape or configuration, without any criticality, is nothing more than one of numerous shapes that one of ordinary skill in the art will find obvious to provide based on the suitability for the intended final application. See MPEP 2144.04 (IV) (B)).
Claims 2-8, 11, 19 and 20 rejected under 35 U.S.C. 103 as being unpatentable over Li and Bae, in view of Radosavljevic (U.S. Patent Pub. No. 2019/0393319) of record
Regarding Claim 2
Li as modified by Bae discloses Claim 1, comprising a first dielectric structure (left 706) extending along the first lateral direction and disposed between a first one of the side portions (of 704) and the ferroelectric layer (714) along the vertical direction; a second dielectric structure (right 706) extending along the first lateral direction and disposed between a second one of the side portions and the ferroelectric layer along the vertical direction (FIG. 7 of Li); and an insulation layer disposed below the word line along the vertical direction (FIG. 8 of Bae).
Li as modified by Bae is silent with respect to “a third dielectric structure extending along the first lateral direction and disposed below the first side portion along the vertical direction; and a fourth dielectric structure extending along the first lateral direction and disposed below the second side portion along the vertical direction”.
FIG. 2 of Radosavljevic discloses a similar semiconductor device, comprising: a first dielectric structure (left 213) extending along the first lateral direction and vertically disposed between a first one of the side portions and the ferroelectric layer; a second dielectric structure (right 213) extending along the first lateral direction and vertically disposed between a second one of the side portions and the ferroelectric layer; a third dielectric structure (left 215) extending along the first lateral direction and vertically disposed below the first side portion; and a fourth dielectric structure (right 215) extending along the first lateral direction and vertically disposed below the second side portion.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Li, as taught by Radosavljevic. The ordinary artisan would have been motivated to modify Li in the above manner for purpose of reducing gate and channel resistances ([0023] of Radosavljevic).
Regarding Claim 3
FIG. 2 of Radosavljevic discloses the first dielectric structure and second dielectric structure are in contact with first portions of sidewalls of the central portion, respectively, and the third dielectric structure and fourth dielectric structure are in contact with second portions of the sidewalls of the central portion, respectively.
Regarding Claim 4
FIG. 2 of Radosavljevic. discloses the first portion and the second portion of each sidewall of the central portion are spaced apart from each other by either the first or second side portion.
Regarding Claim 5
Modified Li discloses a second WL structure extending along the first lateral direction, wherein the second WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the second WL structure extend away from the central portion of the second WL structure along the second lateral direction, respectively; a plurality of second channel films disposed above the ferroelectric layer and separated from one another along the first lateral direction; a plurality of second SL structures separated from one another along the first lateral direction, wherein each of the second SL structures is disposed above a corresponding one of the second channel films; and a plurality of second BL structures separated from one another along the first lateral direction, wherein each of the second BL structures is disposed above a corresponding one of the second channel films, because mere duplication of parts has no patentable significance unless a new and unexpected result is produced. In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960). See MPEP 2144.04.
Regarding Claim 6
FIG. 5 of Li discloses the ferroelectric layer is also disposed between the plurality of second channel films and the second WL structure.
Regarding Claim 7
Modified Li discloses a first dielectric structure extending along the first lateral direction and disposed between the central portion of the first WL structure and the central portion of the second WL structure; and a second dielectric structure extending along the first lateral direction and disposed between the central portion of the first WL structure and the central portion of the second WL structure; wherein the first dielectric structure and second dielectric structure are vertically spaced from each other along the vertical direction a first one of the side portions of the first WL structure and a first one of the side portions of the second WL structure.
Regarding Claim 8
Modified Li discloses a third dielectric structure extending along the first lateral direction, wherein the third dielectric structure is interposed between the first side portion of the first WL structure and the first side portion of the second WL structure.
Regarding Claim 11
Modified Li discloses the first WL structure, the ferroelectric layer, one of the first channel films, one of the first SL structures, and one of the first BL structures operatively function as a memory cell.
Regarding Claim 19
Li as modified by Bae discloses Claim 18, comprising forming a first dielectric structure (left 706) extending along the first lateral direction and disposed between a first one of the side portions (of 704) and the ferroelectric layer (714) along the vertical direction; forming a second dielectric structure (right 706) extending along the first lateral direction and disposed between a second one of the side portions and the ferroelectric layer along the vertical direction(FIG. 7 of Li); and an insulation layer disposed below the word line along the vertical direction (FIG. 8 of Bae).
Li as modified by Bae is silent with respect to forming a third dielectric structure extending along the first lateral direction and disposed below the first side portion along the vertical direction.
FIG. 2 of Radosavljevic discloses a similar semiconductor device, comprising: forming a first dielectric structure (left 213), a second dielectric structure (right 213), and forming a third dielectric structure (left 215); wherein the first to third dielectric structures all extend along the first lateral direction, and the second dielectric structure is disposed between the first and second dielectric structures a first dielectric structure (left 213) extending along the first lateral direction and vertically disposed between a first one of the side portions and the ferroelectric layer; a second dielectric structure (right 213) extending along the first lateral direction and vertically disposed between a second one of the side portions and the ferroelectric layer; a third dielectric structure (left 215) extending along the first lateral direction and vertically disposed below the first side portion; and a fourth dielectric structure (right 215) extending along the first lateral direction and vertically disposed below the second side portion.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Li, as taught by Radosavljevic. The ordinary artisan would have been motivated to modify Li in the above manner for purpose of reducing gate and channel resistances ([0023] of Radosavljevic).
FIG. 11 of Yin discloses.
Regarding Claim 20
FIG. 2 of Radosavljevic discloses the first dielectric structure is disposed between one of the side portions and the ferroelectric layer along the vertical direction, the second dielectric structure is in contact with a sidewall of the side portion, and third dielectric structure is disposed below the side portion along the vertical direction.
Claim 9 rejected under 35 U.S.C. 103 as being unpatentable over Li and Radosavljevic, in view of Jeong (U.S. Patent Pub. No. 2010/0195395) of record.
Regarding Claim 9
Li as modified by Radosavljevic discloses Claim 8.
Li as modified by Radosavljevic is silent with respect to “an interface between the third dielectric structure and at least one of the first portion of the first WL structure or the first portion of the second WL structure is tilted from a direction perpendicular to the first and second lateral directions”.
FIG. 3 of Jeong discloses a similar semiconductor device, comprising an interface between the third dielectric structure and at least one of the first portion of the first WL structure or the first portion of the second WL structure is tilted from a direction perpendicular to the first and second lateral directions.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Li, as taught by Jeong. The ordinary artisan would have been motivated to modify Li in the above manner for purpose of increasing reliability ([0004] of Jeong).
Claim 10 rejected under 35 U.S.C. 103 as being unpatentable over Li and Radosavljevic, in view of Wu (U.S. Patent No. 9,324,789) of record.
Regarding Claim 10
Li as modified by Radosavljevic discloses Claim 8.
Li as modified by Radosavljevic is silent with respect to “an interface between the third dielectric structure and at least one of the first portion of the first WL structure or the first portion of the second WL structure has a curvature-based profile”.
FIG. 3 of Wu discloses a similar semiconductor device, comprising an interface between the third dielectric structure and at least one of the first portion of the first WL structure or the first portion of the second WL structure has a curvature-based profile.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Li, as taught by Wu. The ordinary artisan would have been motivated to modify Li in the above manner, because the claimed configuration was a matter of choice, which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration was significant. In re Dailey 149 USPQ 47, 50 (CCPA 1966). See also Glue Co. v. Upton 97 US 3,24 (USSC 1878). MPEP 2144.04.
Claims 14 and 15 rejected under 35 U.S.C. 103 as being unpatentable over Li and Bae, in view of Wilson (U.S. Patent Pub. No. 2008/0203443) of record.
Regarding Claim 14
Li as modified by Bae discloses Claim 12.
Li as modified by Bae is silent with respect to “in the first lateral direction, the second and third conductive structures each have its ends aligned with the channel film”.
FIG. 13 of Wilson discloses a similar semiconductor device, wherein in the first lateral direction, the second (142) and third (152) conductive structures each have its ends aligned with the channel film.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Li, as taught by Wilson. The ordinary artisan would have been motivated to modify Li in the above manner for purpose of improving density, superior gate control, and non-volatile storage ([0012] of Wilson).
Regarding Claim 15
FIG. 13 of Wilson discloses the first conductive structure is shared by a plural number of the ferroelectric memory cells arranged along the first lateral direction.
Claim 16 rejected under 35 U.S.C. 103 as being unpatentable over Li and Bae, in view of Jeong (U.S. Patent Pub. No. 2010/0195395) of record.
Regarding Claim 16
Li as modified by Bae discloses Claim 12.
Li as modified by Bae is silent with respect to “an interface between the third dielectric structure and at least one of the first portion of the first WL structure or the first portion of the second WL structure is tilted from a direction perpendicular to the first and second lateral directions”.
FIG. 3 of Jeong discloses a similar semiconductor device, comprising an interface between the third dielectric structure and at least one of the first portion of the first WL structure or the first portion of the second WL structure is tilted from a direction perpendicular to the first and second lateral directions.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Li, as taught by Jeong. The ordinary artisan would have been motivated to modify Li in the above manner for purpose of increasing reliability ([0004] of Jeong).
Claim 17 rejected under 35 U.S.C. 103 as being unpatentable over Li and Bae, in view of Wu (U.S. Patent No. 9,324,789) of record.
Regarding Claim 17
Li as modified by Bae as modified by Bae discloses Claim 12.
Li as modified by Bae is silent with respect to “an interface between the third dielectric structure and at least one of the first portion of the first WL structure or the first portion of the second WL structure has a curvature-based profile”.
FIG. 3 of Wu discloses a similar semiconductor device, comprising an interface between the third dielectric structure and at least one of the first portion of the first WL structure or the first portion of the second WL structure has a curvature-based profile.
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to modify the device of Li, as taught by Wu. The ordinary artisan would have been motivated to modify Li in the above manner, because the claimed configuration was a matter of choice, which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration was significant. In re Dailey 149 USPQ 47, 50 (CCPA 1966). See also Glue Co. v. Upton 97 US 3,24 (USSC 1878). MPEP 2144.04.
Pertinent Art
FIG. 1 of Taketani (U.S. Patent Pub. No. 2009/0224312) discloses the first WL structure (100) has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction. Eun (KR 20100036099) discloses the first WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction. Pertinent art also includes Lin (U.S. Patent Pub. No. 2012/0039104), Lee (U.S. Patent Pub. No. 2023/0055147), US 5405787 and 5545578.
Response to Arguments
Applicant’s arguments with respect to Claims 1, 12 and 18 have been considered but are moot because the arguments do not apply to any of the references being used in the current rejection. Applicant’s arguments with respect to Lee is not persuasive. Lee teaches the rectangular first WL structure of Aozasa can be replaced by an oval first WL structure. One of ordinary skill in the art would recognize from Lee it is easier to form the first word line structure in an oval shape rather than in a rectangular shape. It is not necessary that the prior art suggest the combina-tion to achieve the same advantage or result discov-ered by applicant. See, e.g., In re Kahn, 441 F.3d 977, 987, 78 USPQ2d 1329, 1336 (Fed. Cir. 2006) (moti-vation question arises in the context of the general problem confronting the inventor rather than the spe-cific problem solved by the invention); Cross Med. Prods., Inc. v. Medtronic Sofamor Danek, Inc., 424 F.3d 1293, 1323, 76 USPQ2d 1662, 1685 (Fed. Cir. 2005) (“One of ordinary skill in the art need not see the identical problem addressed in a prior art refer-ence to be motivated to apply its teachings.”); In re Linter, 458 F.2d 1013, 173 USPQ 560 (CCPA 1972) (discussed below); In re Dillon, 919 F.2d 688, 16 USPQ2d 1897 (Fed. Cir. 1990), cert. denied, 500 U.S. 904 (1991). See MPEP § 2144 (IV). Pertinent art Taketani (U.S. Patent Pub. No. 2009/0224312) and Eun (KR 20100036099) also disclose the first WL structure has a central portion and a pair of side portions, and wherein the pair of side portions of the first WL structure extend away from the central portion of the first WL structure along a second lateral direction perpendicular to the first lateral direction.
Conclusion
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/SHENG-BAI ZHU/Primary Examiner, Art Unit 2897