DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The Amendment filed June 09, 2026 has been entered. Claims 1-3, 5-14, and 16-22 remain pending in the application.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 8-10, 12, 19-20, and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Moon et. al. (US 20200295310 A1), hereinafter Moon, in view of Chun et. al. (US 20190115559 A1), hereinafter Chun, in further view of Jung (US 20150102320 A1).
Regarding claim 1, Moon teaches a display device (Fig 1 display device, [0050]) comprising: a substrate (Fig 1 first substrate 100, [0050]) including a display area (Fig 1 display area DA, [0051]) and a peripheral area (Fig 1 peripheral area PA. [0051]); a driving element (Fig 4 driving thin film transistor T1, [0088]) disposed in the display area (Fig 4 display area DA, [0088]) on the substrate (Fig 4 first substrate 100, [0089]); a pixel electrode (Fig 4 pixel electrode 310, [0104]) disposed on (Fig 4) the driving element (Fig 4 driving thin film transistor T1, [0088]) and connected to (Fig 4) the driving element(Fig 4 driving thin film transistor T1, [0088]); and a pixel defining layer (Fig 4 pixel defining layer 119, [0105]) disposed on (Fig 4) the planarization layer (Fig 4 planarization layer 118, [0105]), wherein the pixel defining layer (Fig 4 pixel defining layer 119, [0105]) includes: a bank portion (Fig 4 portion of pixel defining layer 119 containing OP3), in which an opening (Fig 4 as an example OP3, [0105]) is defined to expose a portion of the pixel electrode (Fig 4 pixel electrode 310, [0104]).
Moon fails to teach a planarization layer including a first flat portion covering the driving element and a first protrusion portion protruding in a thickness direction from an upper surface of the first flat portion adjacent to the pixel electrode; and a spacer portion protruding in the thickness direction from an upper surface of the bank portion and spaced apart from the first protrusion portion when viewed in the thickness direction, wherein the bank portion includes: a second flat portion disposed on the planarization layer; and a second protrusion portion protruding in the thickness direction from an upper surface of the second flat portion overlapping the first protruding portion, wherein the second protrusion portion is disposed along a profile of the first protrusion, and the opening of the bank portion is defined by a side surface of the second protrusion portion corresponding to a side surface of the first protrusion portion.
However, Chun teaches a planarization layer (Fig 1 insulating layer 180, [0023] corresponds to Moon: Fig 4 planarization layer 118, [0105]) including a first flat portion (Fig 1 first part 181, [0023]) covering the driving element (Fig 1 thin film transistor TFT, [0022] corresponds to Moon: Fig 4 driving thin film transistor T1, [0088]) and a first protrusion portion (Fig 1 second part 182, [0022]) protruding in a thickness direction (Fig 1) from an upper surface of the first flat portion (Fig 1 first part 181, [0023]) adjacent to the pixel electrode (Fig 1 first electrode 191, [0022] corresponds to Moon: Fig 4 pixel electrode 310, [0104]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified Moon to incorporate the teachings of Chun by having a protrusion portion of the planarization layer protruding in a thickness direction from an upper surface of the first flat portion adjacent to a pixel electrode. This could be done to prevent damage to an emission layer of the light emitting device due to output gas released from other areas of the planarization area ([0024]).
Once Moon has been modified by Chun, Moon teaches a spacer portion (Fig 4 spacer 119s, [0109]) protruding in the thickness direction (Fig 4) from an upper surface of the bank portion (Fig 4 portion of pixel defining layer 119 containing OP3) and spaced apart (the spacer is located between pixel electrodes 310) from the first protrusion portion (the first protrusions would be located near opening OP3) when viewed in the thickness direction.
Moon and Chun fail to teach the bank portion includes: a second flat portion disposed on the planarization layer; and a second protrusion portion protruding in the thickness direction from an upper surface of the second flat portion overlapping the first protruding portion, wherein the second protrusion portion is disposed along a profile of the first protrusion, and the opening of the bank portion is defined by a side surface of the second protrusion portion corresponding to a side surface of the first protrusion portion.
However, Jung teaches a second flat portion (Fig 2 valley between sub spacer 275 and main spacer 277 corresponds to Moon: Fig 4 flat portion between spacer 119s and openings such as OP3); and a second protrusion portion (Fig 2 portions on either side of main spacer 277) protruding in the thickness direction from an upper surface of the second flat portion (Fig 2 valley between sub spacer 275 and main spacer 277 corresponds to Moon: Fig 4 flat portion between spacer 119s and openings such as OP3) overlapping the first protruding portion (Fig 2 second passivation layer 181 protrusion, [0035] corresponds to Chun: Fig 1 second part 182, [0022]). One having ordinary skill in the art before the effective filing date of the claimed invention would modify Moon and Chun to using the teachings of Jung by having a second flat portion disposed on the planarization layer; and a second protrusion portion protruding in the thickness direction from an upper surface of the second flat portion overlapping the first protruding portion. This would allow for the display device to have better tolerance of external impacts by having two different kinds of spacers ([0026]). MPEP 2143(I)(G)
Once Moon and Chun have been modified by Jung, Moon and Chun teach the bank portion (Moon: Fig 4 portion of pixel defining layer 119 containing OP3) includes: a second flat portion (Moon: Fig 4 flat portion of pixel defining layer 119 between spacer 119s and openings such as OP3) disposed on the planarization layer Moon: Fig 4 planarization layer 118, [0105]; and a second protrusion portion (Jung: Fig 2 portions on either side of main spacer 277) protruding in the thickness direction from an upper surface of the second flat portion (Moon: Fig 4 flat portion of pixel defining layer 119 between spacer 119s and openings such as OP3) overlapping the first protruding portion (Chun: Fig 1 second part 182, [0022]), wherein the second protrusion portion (Jung: Fig 2 portions on either side of main spacer 277) is disposed along a profile (Jung teaches the height of an end of spacer 277 may be higher due to the protruding portion of layer 181, [0035]; that is the second protrusion portion is disposed along the profile of the first protrusion portion) of the first protrusion (Chun: Fig 1 second part 182, [0022]), and the opening (Fig 4 as an example OP3, [0105]) of the bank portion (Moon: Fig 4 portion of pixel defining layer 119 containing OP3) is defined by a side surface of the second protrusion portion (Jung: Fig 2 portions on either side of main spacer 277) corresponding to a side surface (Jung: Fig 2 shows a sidewall of the second protrusion portion following the sidewall of the underlying protrusion portion) of the first protrusion portion (Chun: Fig 1 second part 182, [0022]).
Examiner notes the second protrusion portion of the pixel defining layer overlapping with the previous first protruding portion would have a side surface exposing a portion of the pixel electrode. As shown in Fig 2 of Jung, the overlapping area of the second protrusion extends past the first protrusion. This would make the side surface of the second protrusion the same as the side surface of the bank portion (Fig 4 portion of pixel defining layer 119 containing OP3) of Moon that had been modified by Chun and Jung.
Regarding claim 8, Moon as modified by Chun in claim 1 teaches the planarization layer (Moon: Fig 4 planarization layer 118, [0105]) includes an organic insulating material (Moon: [0102]).
Regarding claim 9, Moon as modified by Chun in claim 1 teaches the driving element (Moon: Fig 4 driving thin film transistor T1, [0088]) includes: an active layer (Moon: Fig 4 semiconductor layer A1, [0093]) disposed on the substrate (Moon: Fig 4 first substrate 100, [0089]); a gate electrode (Moon: Fig 4 gate electrode G, [0094]) disposed on the active layer (Moon: Fig 4 semiconductor layer A1, [0093]); and a source electrode (Moon: Fig 4 source electrode S1, [0073]) and a drain electrode (Moon: Fig 4 drain electrode D1, [0073]), which are disposed on (Fig 4) the gate electrode (Moon: Fig 4 gate electrode G, [0094]) and connected to (Fig 4) the active layer (Moon: Fig 4 semiconductor layer A1, [0093]).
Regarding claim 10, Moon as modified by Chun in claim 1 teaches a light emitting layer (Moon: Fig 4 organic emission layer 320, [0103]) disposed on the pixel electrode (Fig 4 pixel electrode 310, [0104]); and a common electrode (Moon: Fig 4 opposite electrode 330, [0103]) disposed on the pixel defining layer (Fig 4 pixel defining layer 119, [0105]) and the light emitting layer (Moon: Fig 4 organic emission layer 320, [0103]).
Regarding claim 12, Moon teaches a display device (Fig 1display device, [0050]) comprising: a substrate (Fig 1 first substrate 100, [0050]) including a display area (Fig 1 display area DA, [0051]) and a peripheral area (Fig 1 peripheral area PA. [0051]); a driving element (Fig 4 driving thin film transistor T1, [0088]) disposed in the display area (Fig 4 display area DA, [0088]) on the substrate (Fig 4 first substrate 100, [0089]); a pixel electrode (Fig 4 pixel electrode 310, [0104]) disposed on (Fig 4) the driving element (Fig 4 driving thin film transistor T1, [0088]) and connected to (Fig 4) the driving element(Fig 4 driving thin film transistor T1, [0088]); and a pixel defining layer (Fig 4 pixel defining layer 119, [0105]) disposed on (Fig 4) the planarization layer (Fig 4 planarization layer 118, [0105]), wherein the pixel defining layer (Fig 4 pixel defining layer 119, [0105]) includes: a bank portion (Fig 4 portion of pixel defining layer 119 containing OP3), in which an opening (Fig 4 as an example OP3, [0105]) is defined to expose a portion of the pixel electrode (Fig 4 pixel electrode 310, [0104]); and a spacer portion (Fig 4 spacer 119s, [0109]) disposed (Fig 4) on the bank portion (Fig 4 portion of pixel defining layer 119 containing OP3), including a same material (a spacer portion can be made at the same time as the bank portion, [0109]) as the bank portion (Fig 4 portion of pixel defining layer 119 containing OP3).
Moon fails to teach a planarization layer including a first flat portion covering the driving element and a first protrusion portion protruding in a thickness direction from an upper surface of the first flat portion adjacent to the pixel electrode; and a spacer portion spaced apart from the first protrusion portion when viewed in the thickness direction, wherein the bank portion includes: a second flat portion disposed on the planarization layer; and a second protrusion portion protruding in the thickness direction from an upper surface of the second flat portion overlapping the first protruding portion, wherein the second protrusion portion is disposed along a profile of the first protrusion, and the opening of the bank portion is defined by a side surface of the second protrusion portion corresponding to a side surface of the first protrusion portion..
However, Chun teaches a planarization layer (Fig 1 insulating layer 180, [0023] corresponds to Moon: Fig 4 planarization layer 118, [0105]) including a first flat portion (Fig 1 first part 181, [0023]) covering the driving element (Fig 1 thin film transistor TFT, [0022] corresponds to Moon: Fig 4 driving thin film transistor T1, [0088]) and a first protrusion portion (Fig 1 second part 182, [0022]) protruding in a thickness direction (Fig 1) from an upper surface of the first flat portion (Fig 1 first part 181, [0023]) adjacent to the pixel electrode (Fig 1 first electrode 191, [0022] corresponds to Moon: Fig 4 pixel electrode 310, [0104]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified Moon to incorporate the teachings of Chun by having a protrusion portion of the planarization layer protruding in a thickness direction from an upper surface of the first flat portion adjacent to a pixel electrode. This could be done to prevent damage to an emission layer of the light emitting device due to output gas released from other areas of the planarization area ([0024]).
Once Moon has been modified by Chun, Moon teaches a spacer portion (Fig 4 spacer 119s, [0109]) spaced apart (the spacer is located between pixel electrodes 310) from the first protrusion portion (the first protrusions would be located near opening OP3) when viewed in the thickness direction.
Moon and Chun fail to teach the bank portion includes: a second flat portion disposed on the planarization layer; and a second protrusion portion protruding in the thickness direction from an upper surface of the second flat portion overlapping the first protruding portion, wherein the second protrusion portion is disposed along a profile of the first protrusion, and the opening of the bank portion is defined by a side surface of the second protrusion portion corresponding to a side surface of the first protrusion portion..
However, Jung teaches a second flat portion (Fig 2 valley between sub spacer 275 and main spacer 277 corresponds to Moon: Fig 4 flat portion between spacer 119s and openings such as OP3); and a second protrusion portion (Fig 2 portions on either side of main spacer 277) protruding in the thickness direction from an upper surface of the second flat portion (Fig 2 valley between sub spacer 275 and main spacer 277 corresponds to Moon: Fig 4 flat portion between spacer 119s and openings such as OP3) overlapping the first protruding portion (Fig 2 second passivation layer 181 protrusion, [0035] corresponds to Chun: Fig 1 second part 182, [0022]). One having ordinary skill in the art before the effective filing date of the claimed invention would modify Moon and Chun to using the teachings of Jung by having a second flat portion disposed on the planarization layer; and a second protrusion portion protruding in the thickness direction from an upper surface of the second flat portion overlapping the first protruding portion. This would allow for the display device to have better tolerance of external impacts by having two different kinds of spacers ([0026]). MPEP 2143(I)(G)
Once Moon and Chun have been modified by Jung, Moon and Chun teach the bank portion (Moon: Fig 4 portion of pixel defining layer 119 containing OP3)includes: a second flat portion (Moon: Fig 4 flat portion of pixel defining layer 119 between spacer 119s and openings such as OP3) disposed on the planarization layer Moon: Fig 4 planarization layer 118, [0105]; and a second protrusion portion(Jung: Fig 2 portions on either side of main spacer 277) protruding in the thickness direction from an upper surface of the second flat portion (Moon: Fig 4 flat portion of pixel defining layer 119 between spacer 119s and openings such as OP3) overlapping the first protruding portion (Chun: Fig 1 second part 182, [0022]), wherein the second protrusion portion (Jung: Fig 2 portions on either side of main spacer 277) is disposed along a profile (Jung teaches the height of an end of spacer 277 may be higher due to the protruding portion of layer 181, [0035]; that is the second protrusion portion is disposed along the profile of the first protrusion portion) of the first protrusion (Chun: Fig 1 second part 182, [0022]), and the opening (Fig 4 as an example OP3, [0105]) of the bank portion (Moon: Fig 4 portion of pixel defining layer 119 containing OP3) is defined by a side surface of the second protrusion portion (Jung: Fig 2 portions on either side of main spacer 277) corresponding to a side surface (Jung: Fig 2 shows a sidewall of the second protrusion portion following the sidewall of the underlying protrusion portion) of the first protrusion portion (Chun: Fig 1 second part 182, [0022]).
Examiner notes the second protrusion portion of the pixel defining layer overlapping with the previous first protruding portion would have a side surface exposing a portion of the pixel electrode. As shown in Fig 2 of Jung, the overlapping area of the second protrusion extends past the first protrusion. This would make the side surface of the second protrusion the same as the side surface of the bank portion (Fig 4 portion of pixel defining layer 119 containing OP3) of Moon that had been modified by Chun and Jung.
Regarding claim 19, Moon as modified by Chun in claim 12 teaches the planarization layer (Moon: Fig 4 planarization layer 118, [0105]) includes an organic insulating material (Moon: [0102]).
Regarding claim 20, Moon as modified by Chun in claim 12 teaches a light emitting layer (Moon: Fig 4 organic emission layer 320, [0103]) disposed on the pixel electrode (Fig 4 pixel electrode 310, [0104]); and a common electrode (Moon: Fig 4 opposite electrode 330, [0103]) disposed on the pixel defining layer (Fig 4 pixel defining layer 119, [0105]) and the light emitting layer (Moon: Fig 4 organic emission layer 320, [0103]).
Regarding claim 22, Moon teaches an electronic device comprising a display device (Fig 1 display device, [0050]), wherein the display device comprises: a substrate (Fig 1 first substrate 100, [0050]) including a display area (Fig 1 display area DA, [0051]) and a peripheral area (Fig 1 peripheral area PA. [0051]); a driving element (Fig 4 driving thin film transistor T1, [0088]) disposed in the display area (Fig 4 display area DA, [0088]) on the substrate (Fig 4 first substrate 100, [0089]); a pixel electrode (Fig 4 pixel electrode 310, [0104]) disposed on (Fig 4) the driving element (Fig 4 driving thin film transistor T1, [0088]) and connected to (Fig 4) the driving element(Fig 4 driving thin film transistor T1, [0088]); and a pixel defining layer (Fig 4 pixel defining layer 119, [0105]) disposed on (Fig 4) the planarization layer (Fig 4 planarization layer 118, [0105]), wherein the pixel defining layer (Fig 4 pixel defining layer 119, [0105]) includes: a bank portion (Fig 4 portion of pixel defining layer 119 containing OP3), in which an opening (Fig 4 as an example OP3, [0105]) is defined to expose a portion of the pixel electrode (Fig 4 pixel electrode 310, [0104]).
Moon fails to teach a planarization layer including a first flat portion covering the driving element and a first protrusion portion protruding in a thickness direction from an upper surface of the first flat portion adjacent to the pixel electrode; and a spacer portion protruding in the thickness direction from an upper surface of the bank portion and spaced apart from the first protrusion portion when viewed in the thickness direction, wherein the bank portion includes: a second flat portion disposed on the planarization layer; and a second protrusion portion protruding in the thickness direction from an upper surface of the second flat portion overlapping the first protruding portion, wherein the second protrusion portion is disposed along a profile of the first protrusion, and the opening of the bank portion is defined by a side surface of the second protrusion portion corresponding to a side surface of the first protrusion portion.
However, Chun teaches a planarization layer (Fig 1 insulating layer 180, [0023] corresponds to Moon: Fig 4 planarization layer 118, [0105]) including a first flat portion (Fig 1 first part 181, [0023]) covering the driving element (Fig 1 thin film transistor TFT, [0022] corresponds to Moon: Fig 4 driving thin film transistor T1, [0088]) and a first protrusion portion (Fig 1 second part 182, [0022]) protruding in a thickness direction (Fig 1) from an upper surface of the first flat portion (Fig 1 first part 181, [0023]) adjacent to the pixel electrode (Fig 1 first electrode 191, [0022] corresponds to Moon: Fig 4 pixel electrode 310, [0104]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified Moon to incorporate the teachings of Chun by having a protrusion portion of the planarization layer protruding in a thickness direction from an upper surface of the first flat portion adjacent to a pixel electrode. This could be done to prevent damage to an emission layer of the light emitting device due to output gas released from other areas of the planarization area ([0024]).
Once Moon has been modified by Chun, Moon teaches a spacer portion (Fig 4 spacer 119s, [0109]) protruding in the thickness direction (Fig 4) from an upper surface of the bank portion (Fig 4 portion of pixel defining layer 119 containing OP3) and spaced apart (the spacer is located between pixel electrodes 310) from the first protrusion portion (the first protrusions would be located near opening OP3) when viewed in the thickness direction.
Moon and Chun fail to teach the bank portion includes: a second flat portion disposed on the planarization layer; and a second protrusion portion protruding in the thickness direction from an upper surface of the second flat portion overlapping the first protruding portion, wherein the second protrusion portion is disposed along a profile of the first protrusion, and the opening of the bank portion is defined by a side surface of the second protrusion portion corresponding to a side surface of the first protrusion portion.
However, Jung teaches a second flat portion (Fig 2 valley between sub spacer 275 and main spacer 277 corresponds to Moon: Fig 4 flat portion between spacer 119s and openings such as OP3); and a second protrusion portion (Fig 2 portions on either side of main spacer 277) protruding in the thickness direction from an upper surface of the second flat portion (Fig 2 valley between sub spacer 275 and main spacer 277 corresponds to Moon: Fig 4 flat portion between spacer 119s and openings such as OP3) overlapping the first protruding portion (Fig 2 second passivation layer 181 protrusion, [0035] corresponds to Chun: Fig 1 second part 182, [0022]). One having ordinary skill in the art before the effective filing date of the claimed invention would modify Moon and Chun to using the teachings of Jung by having a second flat portion disposed on the planarization layer; and a second protrusion portion protruding in the thickness direction from an upper surface of the second flat portion overlapping the first protruding portion. This would allow for the display device to have better tolerance of external impacts by having two different kinds of spacers ([0026]). MPEP 2143(I)(G)
Once Moon and Chun have been modified by Jung, Moon and Chun teach the bank portion (Moon: Fig 4 portion of pixel defining layer 119 containing OP3)includes: a second flat portion (Moon: Fig 4 flat portion of pixel defining layer 119 between spacer 119s and openings such as OP3) disposed on the planarization layer Moon: Fig 4 planarization layer 118, [0105]; and a second protrusion portion(Jung: Fig 2 portions on either side of main spacer 277) protruding in the thickness direction from an upper surface of the second flat portion (Moon: Fig 4 flat portion of pixel defining layer 119 between spacer 119s and openings such as OP3) overlapping the first protruding portion (Chun: Fig 1 second part 182, [0022]), wherein the second protrusion portion (Jung: Fig 2 portions on either side of main spacer 277) is disposed along a profile (Jung teaches the height of an end of spacer 277 may be higher due to the protruding portion of layer 181, [0035]; that is the second protrusion portion is disposed along the profile of the first protrusion portion) of the first protrusion (Chun: Fig 1 second part 182, [0022]), and the opening (Fig 4 as an example OP3, [0105]) of the bank portion (Moon: Fig 4 portion of pixel defining layer 119 containing OP3) is defined by a side surface of the second protrusion portion (Jung: Fig 2 portions on either side of main spacer 277) corresponding to a side surface (Jung: Fig 2 shows a sidewall of the second protrusion portion following the sidewall of the underlying protrusion portion) of the first protrusion portion (Chun: Fig 1 second part 182, [0022]).
Examiner notes the second protrusion portion of the pixel defining layer overlapping with the previous first protruding portion would have a side surface exposing a portion of the pixel electrode. As shown in Fig 2 of Jung, the overlapping area of the second protrusion extends past the first protrusion. This would make the side surface of the second protrusion the same as the side surface of the bank portion (Fig 4 portion of pixel defining layer 119 containing OP3) of Moon that had been modified by Chun and Jung.
Claims 2 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Moon et. al. (US 20200295310 A1), hereinafter Moon, in view of Chun et. al. (US 20190115559 A1), hereinafter Chun, in further view of Jung (US 20150102320 A1), in further view of Yang et. al. (US 20170373124 A1), hereinafter Yang.
Regarding claim 2, Moon as modified by Chun in claim 1 fails to teach each of the bank portion and the spacer portion includes a black pigment.
However, Yang teaches each of the bank portion (Fig 1 first bank layer, [0123] corresponds to Moon: Fig 4 portion of pixel defining layer 119 containing OP3) and the spacer portion (Fig 1 second bank layer 142, [0123] corresponds to Moon: Fig 4 spacer 119s, [0109]) includes a black pigment ([0123]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified Moon and Chun to incorporate the teachings of Yang by having the bank portion and the spacer portion including a black pigment. This would suppress color mixing from adjacent pixels ([0123]).
Regarding claim 13, Moon and Chun as modified in claim 12 fail to teach each of the bank portion and the spacer portion includes a black pigment.
However, Yang teaches each of the bank portion (Fig 1 first bank layer, [0123] corresponds to Moon: Fig 4 portion of pixel defining layer 119 containing OP3) and the spacer portion (Fig 1 second bank layer 142, [0123] corresponds to Moon: Fig 4 spacer 119s, [0109]) includes a black pigment ([0123]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified Moon and Chun to incorporate the teachings of Yang by having the bank portion and the spacer portion including a black pigment. This would suppress color mixing from adjacent pixels ([0123]).
Claims 3 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Moon et. al. (US 20200295310 A1), hereinafter Moon, in view of Chun et. al. (US 20190115559 A1), hereinafter Chun, in further view of Jung (US 20150102320 A1), with support from Spruell (“Photosensitive Polyimides – Critical for Advanced Semiconductor Packaging,” https://www.halocarbon.com/photosensitive-polyimides-critical-for-advanced-semiconductor-packaging/, 2020).
Regarding claim 3, Moon as modified by Chun in claim 1 fails to teach each of the bank portion and the spacer portion includes a negative photosensitive material.
Regarding the bank portion and the spacer portion including a negative photosensitive material. Moon teaches the bank portion (Fig 4 portion of pixel defining layer 119 containing OP3) and the spacer portion (Fig 4 spacer 119s, [0109]) can be made at the same time ([0109]). Further, Moon teaches the materials that the bank portion can be made from ([0106]). Moon is silent on whether the materials are positive or negative photosensitive. Spruell shows that one having ordinary skill in the art before the effective filing date of the claimed invention would have known that polyimide (from the list of Moon, [0106]) could be a positive or negative photosensitive material. One having ordinary skill in the art before the effective filing date of the claimed invention would recognize the use of either positive or negative photosensitive materials to produce the features of Moon. MPEP 2144.06(II)
Regarding claim 14, Moon as modified by Chun in claim 12 fails to teach each of the bank portion and the spacer portion includes a negative photosensitive material.
Regarding the bank portion and the spacer portion including a negative photosensitive material. Moon teaches the bank portion (Fig 4 portion of pixel defining layer 119 containing OP3) and the spacer portion (Fig 4 spacer 119s, [0109]) can be made at the same time ([0109]). Further, Moon teaches the materials that the bank portion can be made from ([0106]). Moon is silent on whether the materials are positive or negative photosensitive. Spruell shows that one having ordinary skill in the art before the effective filing date of the claimed invention would have known that polyimide (from the list of Moon, [0106]) could be a positive or negative photosensitive material. One having ordinary skill in the art before the effective filing date of the claimed invention would recognize the use of either positive or negative photosensitive materials to produce the features of Moon. MPEP 2144.06(II)
Claims 11 and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Moon et. al. (US 20200295310 A1), hereinafter Moon, in view of Chun et. al. (US 20190115559 A1), hereinafter Chun, in further view of Lee et. al. (US 20200285337 A1), hereinafter Lee.
Regarding claim 11, Moon as modified by Chun in claim 10 teaches an encapsulation structure (Moon: Fig 4 thin film encapsulation layer 400, [0061]) disposed on the common electrode (Moon: Fig 4 opposite electrode 330, [0103]), wherein the encapsulation structure (Moon: Fig 4 thin film encapsulation layer 400, [0061]) includes an organic layer (Moon: Fig 4 organic encapsulation layer 420, [0061]) and an inorganic layer (Moon: Fig 4 first inorganic layer 410, [0111]); a light blocking layer (Moon: Fig 4 light blocking pattern 510, [0086]) disposed on the encapsulation structure (Moon: Fig 4 thin film encapsulation layer 400, [0061]) and overlapping the pixel defining layer (Fig 4 pixel defining layer 119, [0105]).
Moon and Chun fail to teach a reflection control layer disposed on the encapsulation structure and covering the light blocking layer.
However, Lee teaches a reflection control layer (Fig 3 polarization layer POL, [0053]) disposed on the encapsulation structure (Fig 3 encapsulation layer ENL, [0050] corresponds to Moon: Fig 4 thin film encapsulation layer 400, [0061]) and covering the light blocking layer (Fig 3 light blocking pattern BML, [0052] corresponds to Moon: Fig 4 light blocking pattern 510, [0086]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified Moon and Chun to incorporate the teachings of Lee by having a reflection control layer disposed on the encapsulation structure and covering the light blocking layer. This would reduce the reflection of external light ([0053]).
Regarding claim 21, Moon as modified by Chun in claim 20 teaches an encapsulation structure (Moon: Fig 4 thin film encapsulation layer 400, [0061]) disposed on the common electrode (Moon: Fig 4 opposite electrode 330, [0103]), wherein the encapsulation structure (Moon: Fig 4 thin film encapsulation layer 400, [0061]) includes an organic layer (Moon: Fig 4 organic encapsulation layer 420, [0061]) and an inorganic layer (Moon: Fig 4 first inorganic layer 410, [0111]); a light blocking layer (Moon: Fig 4 light blocking pattern 510, [0086]) disposed on the encapsulation structure (Moon: Fig 4 thin film encapsulation layer 400, [0061]) and overlapping the pixel defining layer (Fig 4 pixel defining layer 119, [0105]).
Moon and Chun fail to teach a reflection control layer disposed on the encapsulation structure and covering the light blocking layer.
However, Lee teaches a reflection control layer (Fig 3 polarization layer POL, [0053]) disposed on the encapsulation structure (Fig 3 encapsulation layer ENL, [0050] corresponds to Moon: Fig 4 thin film encapsulation layer 400, [0061]) and covering the light blocking layer (Fig 3 light blocking pattern BML, [0052] corresponds to Moon: Fig 4 light blocking pattern 510, [0086]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified Moon and Chun to incorporate the teachings of Lee by having a reflection control layer disposed on the encapsulation structure and covering the light blocking layer. This would reduce the reflection of external light ([0053]).
Allowable Subject Matter
Claims 5-7 and 16-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claims 5 and 16, Moon, Chun and Jung fail to teach a first thickness of the second protrusion portion, which is a distance from an upper surface of the first protrusion portion to an upper surface of the second protrusion portion, is smaller than a second thickness of the second flat portion, which is a distance from the upper surface of the first flat portion to the upper surface of the second flat portion, in a cross-sectional view.
Regarding claims 6 and 17, Moon, Chun and Jung fail to teach an upper surface of the spacer portion and an upper surface of the second protrusion portion are located at different levels from each other in a cross-sectional view.
Regarding claims 7 and 18, Moon, Chun and Jung fail to teach the upper surface of the spacer portion is located at a higher level than the upper surface of the second protrusion portion in the cross- sectional view.
Response to Arguments
Applicant's arguments, see section beginning at the last paragraph on page 11, filed June 09, 2026, with respect to the 35 USC §103 with the teachings of Jung, have been fully considered but they are not persuasive.
In response to applicant’s argument that Jung does not teach a bank portion that includes a second portion disposed on the planarization layer, the test for obviousness is not whether the features of a secondary reference may be bodily incorporated into the structure of the primary reference; nor is it that the claimed invention must be expressly suggested in any one or all of the references. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981).
In this case, Jung teaches a second portion disposed on a first portion that is part of a bank. Further, Jung teaches, as disclosed above in the rejections, the second portion follows the contours of the underlying first portion. These contours include a protrusion, flat portion, and sidewalls of the protrusion.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Moon et. al. (US 20190115404 A1) teaches a second protrusion portion that follows the contours of a first protrusion portion placed over a bank.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALVIN L LEE whose telephone number is (703)756-1921. The examiner can normally be reached Monday - Friday 8:30 am - 5 pm (ET).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, STEVEN GAUTHIER can be reached at (571)270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ALVIN L LEE/Examiner, Art Unit 2813
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
Prosecution Insights