DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) 9-13, 21-26 and 28-34 have been considered but are moot on grounds of new rejection.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 9-12, 21-24, 26 and 28-33 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim (KR 20220008097 A) in view of ASANO et al. (ASANO) (US 2010/0208442 A1).
In regards to claim 9, Fan (Figs. 1A, 1B, 1C, 2A, 2B, 3B, 4A, 4B, 5 and associated text) discloses a method comprising: attaching a semiconductor device (item 1000, Fig. 5) to a package substrate (item 100); dispensing an underfill (item 250) between the semiconductor device (item 1000 )and the package substrate (item 100); and attaching a package stiffener (items 500 plus 600) to the package substrate (item 100), the package stiffener (items 500 plus 600) comprising: a main body (items 500) having a first coefficient of thermal expansion (CTE of copper, stainless steel, aluminum silicon carbide and/or titanium), the main body (items 500) extending around the semiconductor device (item 1000) and the underfill (item 250) in a top-down view after the semiconductor device (item 1000) and the package stiffener (items 500 plus 600) are attached to the package substrate (item 100); and pillars (item 600) in the main body (item 500), each of the pillars (item 600) extending through the main body (item 500), each of the pillars (item 600) physically contacting the main body (item 500), the pillars (item 600) having a second coefficient of thermal expansion (CTE of silicon-based polymer, or silicon-based rubber along with fillers of silicon oxide or aluminum oxide), but does not specifically disclose the second coefficient of thermal expansion (CTE of silicon-based polymer, or silicon-based rubber along with fillers of silicon oxide or aluminum oxide) being less than the first coefficient of thermal expansion (CTE of copper, stainless steel, aluminum silicon carbide and/or titanium).
However, Kim discloses that the adhesive (item 600) is made up of silicon-base polymer or silicon-base rubber (item 601) with filler particles of silicon oxide or aluminum oxide which have lower CTE’s than copper, stainless steel, aluminum silicon carbide and/or titanium. The Examiner notes that it is well known in the art that the addition of fillers/particles with lower CTEs reduces that overall thermal expansion of a matrix/material as whole.
It would have been obvious to one having ordinary skill in the art at the time the invention was made to have second coefficient of thermal expansion less than the first coefficient of thermal expansion for the purpose of reducing the CTE of the overall structure, since it was known in the art that the addition of lower CTE materials/particles reduces that overall thermal expansion of a structure/matrix.
Kim does not specifically disclose attaching a package stiffener to the package substrate, wherein prior to attaching the package stiffener, the package stiffener comprises: a main body having a first coefficient of thermal expansion, the main body extending around the semiconductor device and the underfill in a top-down view after the semiconductor device and the package stiffener are attached to the package substrate; and pillars in the main body, each of the pillars extending through the main body, each of the pillars physically contacting the main body.
ASANO (Figs. 2, 23-26, 30, 32, 33-37 and associated text) discloses attaching a package stiffener (item 31) to the package substrate (item 40H), wherein prior to attaching the package stiffener (item 31), the package stiffener (item 31) comprising: a main body (item 36H) having a first coefficient of thermal expansion (17 ppm/.degree. C, paragraph 50), the main body (item 36H) extending around the semiconductor device (item 21) in the underfill (item 25) in a top-down view (Figs 2, 23, 32, 34-37) after the semiconductor device (item 21) and the package stiffener (item 31) are attached to the package substrate (item 40H); and pillars (item R1 or 39H plus R1) in the main body (item 36H), each of the pillars (item R1 or 39H plus R1) extending through the main body (item 36H), each of the pillars (item R1 or 39H plus R1) physically contacting the main body (item 36H).
Therefore it would have been obvious to one ordinary skill in the art before the effective filing date to incorporate the teachings of ASANO for the purpose of preventing warpage of a board/substrate so that a chip can be mounted (paragraphs 6, 7, 48, 62, 64, 76, 88, 91).
In regards to claim 10, Kim (Figs. 1A, 1B, 1C, 2A, 2B, 3B, 4A, 4B, 5 and associated text) discloses wherein attaching the package stiffener (items 500 or 500 plus 600) to the package substrate (item 100) comprises: dispensing an adhesive (items 610 plus 620) onto the package substrate (item 100), the adhesive (items 610 plus 620) forming a ring around the underfill (item 250) and the semiconductor device (item 1000) in the top-down view; pressing the package stiffener (items 500 or 500 plus 600) against the adhesive (items 610 plus 620); and heating the adhesive (items 610 plus 620).
In regards to claim 11, Kim (Figs. 1A, 1B, 1C, 2A, 2B, 3B, 4A, 4B, 5 and associated text) discloses wherein the pillars (item 600) and the main body (item 500) of the package stiffener (items 500 or 500 plus 600) physically contacts the adhesive (items 610 plus 620).
In regards to claim 12, Kim (Figs. 1A, 1B, 1C, 2A, 2B, 3B, 4A, 4B, 5 and associated text) discloses forming the main body (item 500); patterning holes (item 590) in the main body (item 500); and securing the pillars (item 600) in the holes (item 590) in the main body (item 500) without using an adhesive, but does not specifically disclose securing the pillars (item 600) in the holes (item 590) in the main body (item 500) without using an adhesive.
ASANO (Figs. 2, 23-26, 30, 32, 33-37 and associated text) discloses securing the pillars (item R1) in the holes (item 39H) in the main body (item 36H) without using an adhesive.
Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to incorporate the teachings of ASANO for the purpose of a reinforcement structure.
In regards to claim 21, Kim (Figs. 1A-5 and associated text) discloses a method comprising: attaching a semiconductor device (item 1000, Fig. 5) to a package substrate (item 100); and attaching a package stiffener (items 500 or 500 plus 600) to the package substrate (item 100), the package stiffener (items 500 plus 600) comprising: a main body (items 500) having a first coefficient of thermal expansion (CTE of copper, stainless steel, aluminum silicon carbide and/or titanium), the main body (items 500) extending around the semiconductor device (item 1000) in a top-down view; and pillars (item 600) in the main body (item 500), each of the pillars (item 600) having a coefficient of thermal expansion (CTE of silicon-based polymer, or silicon-based rubber along with fillers of silicon oxide or aluminum oxide) different than the first coefficient of thermal expansion (CTE of copper, stainless steel, aluminum silicon carbide and/or titanium), but does not specifically disclose wherein the package stiffener has a first surface facing the package substrate and a second surface facing away from the package substrate…, wherein each of the pillars has a first surface facing the package substrate and a second surface facing away from the package substrate, wherein the first surface of the package stiffener is level with the first surface of each of the pillars.
ASANO (Figs. 2, 23-26, 30, 32, 33-37 and associated text) discloses attaching a package stiffener (item 31) to the package substrate (item 40H), the package stiffener (item 31) comprising: a main body (item 36H) having a first coefficient of thermal expansion (17 ppm/.degree. C, paragraph 50), the main body (item 36H) extending around the semiconductor device (item 21) in a top-down view (Figs 2, 23, 32, 34-37), wherein the package stiffener (item 31) has a first surface (bottom surface) facing the package substrate (item 40H) and a second surface (top surface) facing away from the package substrate (item 40H); and pillars (item R1 or 39H plus R1) in the main body (item 36H), each of the pillars (item R1 or 39H plus R1) having a coefficient of thermal expansion (40 ppm/.degree. C, paragraph 79) different than the first coefficient of thermal expansion (17 ppm/.degree. C, paragraph 50), wherein each of the pillars (item R1 or 39H plus R1) has a first surface (bottom surface) facing the package substrate (item 40H) and a second surface (top surface)facing away from the package substrate (item 40H), wherein the first surface (bottom surface) of the package stiffener (item 31) is level with the first surface (bottom surface) of each of the pillars (item R1 or 39H plus R1).
Therefore it would have been obvious to one ordinary skill in the art before the effective filing date to incorporate the teachings of ASANO for the purpose of preventing warpage of a board/substrate so that a chip can be mounted (paragraphs 6, 7, 48, 62, 64, 76, 88, 91).
In regards to claim 22, Kim (Figs. 1A-5 and associated text) discloses wherein a first subset of the pillars (item 600) have a second coefficient of thermal expansion (CTE of silicon-based polymer, or silicon-based rubber along with fillers of silicon oxide or aluminum oxide), wherein a second subset of the pillars (item 600) have a third coefficient of thermal expansion (CTE of silicon-based polymer, or silicon-based rubber along with fillers of silicon oxide or aluminum oxide), wherein the second coefficient of thermal expansion (CTE of silicon-based polymer, or silicon-based rubber along with fillers of silicon oxide or aluminum oxide) is different than the third coefficient of thermal expansion (CTE of silicon-based polymer, or silicon-based rubber along with fillers of silicon oxide or aluminum oxide). Examiner notes that the pillars can be made of different base and filler materials if so desired, and would therefore have a different coefficient of thermal expansion.
It would have been obvious to modify the invention to include first and second subset of pillars with different coefficients of thermal expansion, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use (In re Leshin, 125 USPQ 416).
However, Kim discloses that the adhesive (item 600) is made up of silicon-base polymer or silicon-base rubber (item 601) with filler particles of silicon oxide or aluminum oxide which have lower CTE’s than copper, stainless steel, aluminum silicon carbide and/or titanium. The Examiner notes that it is well known in the art that the addition of fillers/particles with lower CTEs reduces that overall thermal expansion of a matrix/material as whole.
It would have been obvious to one having ordinary skill in the art at the time the invention was made to have second coefficient of thermal expansion less than the first coefficient of thermal expansion for the purpose of reducing the CTE of the overall structure, since it was known in the art that the addition of lower CTE materials/particles reduces that overall thermal expansion of a structure/matrix.
In regards to claim 23, Kim (Figs. 1A-5 and associated text) as modified by ASANO (Figs. 2, 23-26, 30, 32, 33-37 and associated text) does not specifically disclose wherein the first subset of the pillars (item 600) are an alloy 42 material.
In regards to claim 24, Kim (Figs. 1A-5 and associated text) as modified by ASANO (Figs. 2, 23-26, 30, 32, 33-37 and associated text) does not specifically disclose wherein the second subset of the pillars are a stainless steel 430 material.
It would have been obvious to modify the invention to include first subset of pillar of alloy 42 material and a second subset of pillars of stainless steel 430 material, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use (In re Leshin, 125 USPQ 416).
In regards to claim 26, Kim (Figs. 1A-5 and associated text) as modified by ASANO (Figs. 2, 23-26, 30, 32, 33-37 and associated text) discloses wherein the pillars (item 600, Kim, (item R1 or 39H plus R1), ASANO) extend completely through the main body (item 500, Kim, item 36H, ASANO).
In regards to claim 28, Kim (Figs. 1A-5 and associated text) as modified by ASANO (Figs. 2, 23-26, 30, 32, 33-37 and associated text) discloses wherein the main body (item 500, Kim, item 36H, ASANO) is a metal ring (paragraph 50) having an opening (item 590, Kim, item 23, ASANO) extending through the metal ring (paragraph 50).
In regards to claim 29, Kim (Figs. 1A, 1B, 1C, 2A, 2B, 3B, 4A, 4B, 5 and associated text) discloses a method comprising: attaching a semiconductor device (item 1000, Fig. 5) to a package substrate (item 100); and attaching a package stiffener (items 500 plus 600) to the package substrate (item 100), the package stiffener (items 500 plus 600) comprising: a main body (items 500) having a first coefficient of thermal expansion (CTE of copper, stainless steel, aluminum silicon carbide and/or titanium),; and embedded material structures (item 600) embedded in the main body (item 500), each of the embedded material structures (item 600) being laterally surrounded by the main body (item 500), the embedded material structures (item 600) having a second coefficient of thermal expansion (CTE of silicon-based polymer, or silicon-based rubber along with fillers of silicon oxide or aluminum oxide), but does not specifically disclose the second coefficient of thermal expansion (CTE of silicon-based polymer, or silicon-based rubber along with fillers of silicon oxide or aluminum oxide) being less than the first coefficient of thermal expansion (CTE of copper, stainless steel, aluminum silicon carbide and/or titanium).
However, Kim discloses that the adhesive (item 600) is made up of silicon-base polymer or silicon-base rubber (item 601) with filler particles of silicon oxide or aluminum oxide which have lower CTE’s than copper, stainless steel, aluminum silicon carbide and/or titanium. The Examiner notes that it is well known in the art that the addition of fillers/particles with lower CTEs reduces that overall thermal expansion of a matrix/material as whole.
It would have been obvious to one having ordinary skill in the art at the time the invention was made to have second coefficient of thermal expansion less than the first coefficient of thermal expansion for the purpose of reducing the CTE of the overall structure, since it was known in the art that the addition of lower CTE materials/particles reduces that overall thermal expansion of a structure/matrix.
Kim does not specifically disclose wherein prior to attaching the package stiffener, the package stiffener comprises: comprising: a main body having a first coefficient of thermal expansion; and embedded material structures embedded in the main body, each of the embedded material structures being laterally surrounded by the main body…wherein after attaching the package stiffener, a first surface of the embedded material structures is level with a first surface of the main body, wherein the first surface of the embedded material structures and the first surface of the main body faces the package substrate.
ASANO (Figs. 2, 23-26, 30, 32, 33-37 and associated text) discloses attaching a package stiffener (item 31) to the package substrate (item 40H), wherein prior to attaching the package stiffener (item 31), the package stiffener (item 31) comprising: a main body (item 36H) having a first coefficient of thermal expansion (paragraph 50); and embedded material structures (item R1 or 39H plus R1) embedded in the main body, each of the embedded material structures (item R1 or 39H plus R1) being laterally surrounded by the main body, the embedded material structures (item R1 or 39H plus R1) having a second coefficient of thermal expansion (paragraph 79)…wherein after attaching the package stiffener (item 31), a first surface (bottom surface) of the embedded material structures (item R1 or 39H plus R1) is level with a first surface (bottom surface) of the main body (item 36H), wherein the first surface (bottom surface) of the embedded material structures (item R1 or 39H plus R1) and the first surface (bottom surface) of the main body (item 36H) faces the package substrate (item 40H).
Therefore it would have been obvious to one ordinary skill in the art before the effective filing date to incorporate the teachings of ASANO for the purpose of preventing warpage of a board/substrate so that a chip can be mounted (paragraphs 6, 7, 48, 62, 64, 76, 88, 91).
In regards to claim 30, Kim (Figs. 1A- 5 and associated text) discloses dispensing an underfill (item 250) between the semiconductor device (item 1000, Fig. 5) and the package substrate (item 100).
In regards to claim 31, Kim (Figs. 1A- 5 and associated text) discloses wherein the main body (item 500) extends continuously around the semiconductor device (item 1000) in a top-down view.
In regards to claim 32, Kim (Figs. 1A- 5 and associated text) discloses wherein the main body (item 500) comprises a first metal (copper, stainless steel, aluminum silicon carbide and/or titanium) and the embedded material structures (item 600) comprise a second metal (silicon-based polymer, or silicon-based rubber plus fillers of silicon oxide or aluminum oxide [aluminum of the aluminum oxide]), wherein the first metal (copper, stainless steel, aluminum silicon carbide and/or titanium) is different than the second metal (aluminum of aluminum oxide filler).
In regards to claim 33, Kim (Figs. 1A- 5 and associated text) discloses wherein the main body (item 500) comprises a first metal (copper, stainless steel, aluminum silicon carbide and/or titanium), a first subset of the embedded material structures (item 600) comprises a second metal (aluminum of aluminum oxide filler), the first metal (copper, stainless steel, aluminum silicon carbide and/or titanium) is different than the second metal (aluminum of aluminum oxide filler),
Kim as modified by ASANO does not specifically disclose a second subset of the embedded material structures comprises a third metal, and the second metal is different than the third metal.
It would have been obvious to modify the invention to include a second subset of embedded material structures comprised of a third metal that is different from the second metal, since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use (In re Leshin, 125 USPQ 416).
Claim(s) 12, 13, 25 and 34 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim (KR 20220008097 A) in view of ASANO et al. (ASANO) (US 2010/0208442 A1).
as applied to the claims 9-11, 21-24, 26 and 28-33 above, and further in view of Kim et al. (Kim’481) (CN 113921481 A).
In regards to claim 12, Kim (Figs. 1A, 1B, 1C, 2A, 2B, 3B, 4A, 4B, 5 and associated text) as modified by ASANO (Figs. 2, 23-26, 30, 32, 33-37 and associated text) discloses forming the main body (item 500, Kim, item 36H, ASANO); patterning holes (item 590, Kim, item 39H, ASANO) in the main body (item 500, Kim, item 36H, ASANO); and securing the pillars (item 600, Kim, item R1, ASANO) in the holes (item 590, Kim, item 39H, ASANO) in the main body (item 500, Kim, item 36H, ASANO), but does not specifically disclose securing the pillars (item 600) in the holes (item 590) in the main body (item 500) without using an adhesive.
In regards to claim 12, Kim’481 (Figs. 1-4 and associated text) discloses securing the pillars (item 132) in the holes (item 131H) in the main body (item 131) without using an adhesive.
In regards to claim 13, Kim’481 (Figs. 1-4 and associated text) discloses wherein securing the pillars (item 132) in the holes (item 131H) in the main body (item 131) comprises deforming the pillars (item 132) to vertically compress and laterally expand the pillars (item 132).
Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to incorporate the teachings of Kim’481 for the purpose of reinforcement structure.
In regards to claim 25, Kim as modified by ASANO does not specifically disclose wherein the first subset of the pillars and the second subset of the pillars are arranged in an alternating manner.
In regards to claim 34, Kim as modified by ASANO does not specifically disclose wherein the first subset of the embedded material structures and the second subset of the embedded material structures are arranged in an alternating manner.
In regards to claims 25 and 34, Kim’481 (Figs. 4 and associated text) discloses wherein the first subset of the pillars/embedded material structures (item 132, cylindrical or rectangle) and the second subset of the pillars/embedded material structures (item 132, cylindrical or rectangle) are arranged in an alternating manner.
Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to incorporate the teachings of Kim’481 for the purpose of reinforcement structure and to suppress expansion.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TELLY D GREEN whose telephone number is (571)270-3204. The examiner can normally be reached M-F 8am-5pm.
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TELLY D. GREEN
Examiner
Art Unit 2898
/TELLY D GREEN/Primary Examiner, Art Unit 2898 April 24, 2026
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