Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
The response of the applicant has been read and given careful consideration. The rejection of the previous action are withdrawn based upon the amendments to the claims. Responses to the arguments appear after the first rejection. This application has been assigned to a new examiner.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 17-19 are rejected under 35 U.S.C. 10(a)(1) as being fully anticipated by Cho et al., “21.2: Al and Sn doped zinc indium oxide thin film transistors for AMOLED back plane”, SID 09 pp 280-283 (2009)
Cho et al., “21.2: Al and Sn doped zinc indium oxide thin film transistors for AMOLED back plane”, SID 09 pp 280-283 (2009) teaches a glass substrate with a gate electrode, an Al2O3 gate insulator, indium tin oxide (ITO) electrodes and an AT-ZINO (Al and Sn doped zinc indium oxide) layer, which is patterned.
The intermediate product with the two layers is held to meet the claims, noting that the patterning of the AT-ZIO layer would have been performed photolithographically.
The metal oxide layer is the indium tin oxide electrode (oxide of In and Sn) and the dopant is aluminum (k=0.03) and tin (k=0.072) or zinc (k=0.055) or indium (k= ).(see 20240272541, figure 4 as this is an evidentiary reference, the date is not critical.)
In the response of 5/26/2026, the applicant argues that the specific dopants are not taught. The examiner points out that aluminum has a lower extinction coefficient that tin or zinc.
Claim 16 is rejected under 35 U.S.C. 10(a)(1) as being fully anticipated by JP 4230243.
JP 4230243 (machine translation attached) teaches with respect to the formation of a semiconductor device, coating an iridium layer, oxidizing the surface of the iridium layer (to form an iridium oxide layer) and then coating a Pb(ZrxTi1-x)O3 layer, this is then coated with an iridium oxide layer, a TiN film and a SiO hardmask which is patterned photolithographically (photoresist) [0048-0064+]
The Pb(ZrxTi1-x)O3 layer is considered a doped layer.
Zr has a k of 0.004, Pb has a k of 0.05, Ti has a k of 0.042 (see 20240272541, figure 4 as this is an evidentiary reference, the date is not critical.)
In the response of 5/26/2026, the applicant argues that the specific dopants are not taught. The examiner points out that claim 16 does not recite a specific dopant, so the argued position is not commensurate in scope with the coverage sought..
Claims 1-3,5,8,11,13-14 and 17 are rejected under 35 U.S.C. 102(a)(2) as being fully anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Weidman et al. 20220342301.
Weidman et al. 20220342301 describes with respect to figure 1C to 1E, the formation of graded EUV resist films. These can be used in semiconductor processing as discussed at [0003,0029,0054,0110]. In figure 2A, the initial deposition of bismuth and tin precursors which react with water (oxygen source) to form an oxide where the process transitions during the deposition to a purely tin and water. Figure 2B is similar, but initially uses a combination of Te and Sn precursors which react with water which is graded to just the tin precursor and water at the top surface [0060-0066].
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The position of the examine is that one of ordinary skill in the art would immediately envision the formation of the graded metal oxide resists on a semiconductor wafer or other semiconductor substrate, thereby anticipating the claims as (sub)layers of differing compositions (SnO vs SnO + Te or Bi; SnO vs SnO + TerO or BiO) meet the claims. Oxide of tin, bismuth or tellurium can be considered to be the oxide of the high EUV absorbing element as these have an EUV cross section of more than 2 x 106 cm2/mole and the dopant can be trace elements in the layer, Bi, Sn, Te, TeO, SnO or BiO within the scope of the claims as the claims rejected under this heading do not describe the dopant level, dopant material or dopant properties. Bi has a k of 0.055, Sn has a k of 0.72 and Te has a k of 0.74. (see figure 2 of 20190384158)
The claims do not require the metal oxide to be different from the oxide of the element with the high EUV absorption. The claims also do not preclude the metal oxide layer from having the dopant. The (second) dopant can also be carbon, hydrogen or nitrogen entrapped in the layer.
If this position is not upheld, the examiner holds that it would have been obvious to one skilled in the art to form the graded resists using the processes disclosed at [00060-0066] on semiconductor wafers/substrate based upon the disclosures at [0003,0029,0054,0110] with a reasonable expectation of success.
While the specification describes these as underlayers for EUV resists, the claims rejected under this heading do not recite a photoresist and embrace the resists of Weidman et al. 20220342301 coated upon the semiconductor substrate.
In the response of 5/26/2026, the applicant argues that Weidman et al. 20220342301 does not teach two different layers. The examiner holds that the graded layer is composed of multiple (sub)layers having different composition.
Claim 16 is rejected under 35 U.S.C. 103 as obvious over JP 4946214
JP 4946214 teaches in the process of forming a semiconductor device, coating a conductive film (23) of a Pt, PtO, IrOx, SrRuO3 of the like, followed by the formation of a perovskite PbZrTiO3 film (24) [0065-0066].
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It would have been obvious to one skilled in the art to form the conductive layer of PtO or IrOx, where the Pb is the dopant with a reasonable expectation of forming a useful device.
In the reply of 5/26/2026, the applicant did not seem to reply to this rejection.
Claims 1-8,11-14,17 and 19 are rejected under 35 U.S.C. 103 as obvious over Church et al. 20200152460.
Church et al. 20200152460 teaches with respect to figure 2, a substrate (20) having a graded hardmask (210) and a photoresist layer (24), where the hardmask matrix can include a gradient of high EUV absorbing materials, such as Sn, Te, Sb, Te, Cd, Cs and I. in one example the matrix includes silicon. In one embodiment, the graded hardmask matrix 110 includes tin (Sn). The Sn based graded hardmask matrix 110 includes the Sn gradient increasing from bottom to top. At the bottom the Sn is deposited as tin oxide (SnO) or tin nitride (SnN) for good adhesion to the bulk substrate 20 with the concentration of Sn increasing to have high Sn composition on the top surface directly under the photoresist layer 24. In one embodiment, the graded hardmask 22 can include a hardmask matrix 110, as shown in FIG. 3. The hardmask matrix 110 can include on a combination of vacuum co-deposited materials and will be vertically graded. Top materials 115 can include high EUV absorption cross sections, such as high-Z metals, metalloids and halogens, including but not limited to Sn, Sb, Te Cd, Cs, and I and derivatives thereof, with proven EUV absorptivity cross-section of at least 92 eV. Bottom materials 117 can act as seed layers to optimize the top layer closure and avoid a rough top surface or prevent intermixing or delamination with the bulk substrate 20. The selection of the top materials 115 and the bottom materials 117 permits tunable adhesion at both the bulk substrate 20 interface and the photoresist layer 24 interface. In one embodiment, the graded hardmask matrix 110 includes tin (Sn). The Sn based graded hardmask matrix 110 includes the Sn gradient increasing from bottom to top. At the bottom the Sn is deposited as tin oxide (SnO) or tin nitride (SnN) for good adhesion to the bulk substrate 20 with the concentration of Sn increasing to have high Sn composition on the top surface directly under the photoresist layer 24 [0043-0047,0062]. According to aspects of the present invention, a semiconductor device 10 can include a graded hardmask 22 formed thereon. The semiconductor device 10 can include a bulk substrate 20. The bulk substrate 20 can be a single substrate formed of a suitable semiconducting material, such as, e.g., silicon (Si), silicon germanium (SiGe), silicon carbide (SiC), gallium arsenide (GaAs), or any other suitable semiconducting group II, III, IV, V or VI material and combinations thereof. However, the bulk substrate 20 can also include multiple layers. For example, the bulk substrate 20 can include suitable semiconducting material, such as Si, SiGe, GaAs, InAs and other like semiconductors. Layered semiconductors such as Si/Ge and Semiconductor-On-Insulators (SOI) are also contemplated herein. Si-containing materials include, but are not limited to: Si, single crystal Si, polycrystalline Si, SiGe, amorphous Si, silicon-on-insulator substrates (SOI), SiGe-on-insulator (SGOI), annealed poly Si, and poly Si line structures. The Si-containing material can be the substrate of the device, or a Si-containing layer formed atop the substrate, e.g., a polySi gate or a raised source/drain region. The bulk substrate 20 can include any structures formed therein [0041-0042].
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Alternatively with respect to claims 1-5,8,11-14 and 17, it would have been obvious to produce the embodiments taught with respect to figures 2 or 3 by forming the graded or multilayer of TeO or SbO in combination with another element, such as Sn or SnO disclosed at [0043-0047,0062] which is a dopant which forms a matrix with a reasonable expectation of forming a useful structure ready for EUV exposure. The (second) dopant can also be carbon, hydrogen or nitrogen entrapped in the layer.
Alternatively with respect to claims 1-6,8,11-14 and 16-17, it would have been obvious to produce the embodiments taught with respect to figures 2 or 3 by forming the graded or multilayer of CsO in combination with another element, such as Sn or SnO disclosed at [0043-0047,0062] which is a dopant which forms a matrix with a reasonable expectation of forming a useful structure ready for EUV exposure.
Alternatively with respect to claims 1-5,8,11-14 and 17 it would have been obvious to produce the embodiments taught with respect to figures 2 or 3 by forming the graded or multilayer of IO in combination with another element, such as Sn or SnO disclosed at [0043-0047,0062] which is a dopant which forms a matrix with a reasonable expectation of forming a useful structure ready for EUV exposure.
In the response of 5/26/2026, the applicant argues that the dopant and the oxide are different elements/materials. While the anticipation rejection has been overcome, the applicant has not addressed the formation of graded or multilayer resists, where different layers or different thicknesses within the thickness of the graded layers) are considered absorber or doped layer.
Claims 1-6,8 and 11-17 are rejected under 35 U.S.C. 103 as obvious over Church et al. 20200152460, in view of Tan et al. 20220035247.
Tan et al. 20220035247 teaches that hardmask materials can include any of a variety of materials, including amorphous carbon (a-C), tin oxide (e.g., SnO.sub.x), silicon oxide (e.g., SiO.sub.x, including SiO.sub.2), silicon oxynitride (e.g., SiO.sub.xN.sub.y), silicon oxycarbide (e.g., SiO.sub.xC.sub.y), silicon nitride (e.g., Si.sub.3N.sub.4), titanium oxide (e.g., TiO.sub.2), titanium nitride (e.g., TiN), tungsten (e.g., W), doped carbon (e.g., W-doped C), tungsten oxide (e.g., WO.sub.x), hafnium oxide (e.g., HfO.sub.2), zirconium oxide (e.g., ZrO.sub.2), and aluminum oxide (e.g., Al.sub.2O.sub.3). Suitable substrate materials can include various carbon-based films (e.g., ashable hardmask (AHM), silicon-based films (e.g., SiO.sub.x, SiC.sub.x, SiO.sub.xC.sub.y, SiO.sub.xN.sub.y, SiO.sub.xC.sub.yN.sub.z), a-Si:H, poly-Si, or SiN), or any other (generally sacrificial) film applied to facilitate the patterning process) [0198] In other implementations, the underlayer may be vapor deposited on the substrate by PECVD or ALD using a Si-containing precursor that co-reacts with an oxidizer (e.g., an oxocarbon, an O-containing precursor, CO, or CO.sub.2). In variations on this implementation, the Si-containing precursor further co-reacts with a C source dopant (e.g., a hydrocarbon precursor, as described herein). Non-limiting Si-containing precursors are described herein, such as silanes, halosilanes, aminosilanes, alkoxysilanes, organosilanes, etc [0075].
Church et al. 20200152460 does not exemplify the embodiments where the graded hard mask includes a metal oxide other than SnO and arguably SiO
It would have been obvious to produce the embodiments taught with respect to figures 2 or 3 by forming the graded or multilayer of IO in combination with another element, such as Sn, SnO or silicon dioxide based upon the disclosure at [0043-0047,0062] of Church et al. 20200152460 at [0043-0047,0062] and SiOx as a hardmask material in Tan et al. 20220035247 at [0075] where the SiOx forms the matrix with a reasonable expectation of forming a useful structure ready for EUV exposure.
With respect to claims 1-6,8 and 11-17 , it would have been obvious to produce the embodiments taught with respect to figures 2 or 3 by forming the graded or multilayer of TeO, SbO, CdO or CsO in combination with silicon dioxide based upon the disclosure of Si in Church et al. 20200152460 at [0043-0047,0062] and SiO.sub.xC.sub.y as a hardmask material in Tan et al. 20220035247 at [0075] where the SiOx forms the matrix with a reasonable expectation of forming a useful structure ready for EUV exposure.
The examiner relies upon the response above as no further arguments were directed at this rejection
Claims 1-14 and 16-20 are rejected under 35 U.S.C. 103 as obvious over Weidman et al. 20220342301, in view of Kanakasbapahty et al. WO 2021202198
Kanakasbapahty et al. WO 2021202198 teaches with respect to figure 2B, the deposition of the resist (222) on the substrate and treatment of the resist during a post application bake (PAB) with the EUV sensitizer which will (hyper) sensitize the top surface of the photoresist [0095-0103]. Useful EUV sensitizers include Xe and iodide [0107]. EUV resist materials includes tin oxide, tellurium oxide, bismuth oxide, antimony oxide, indium oxide or oxides of these alloys [0111]. These can be formed using atomic layer deposition in the disclosed precursors, which may include Sn, Bi, Te, Cs, Sb, In, Mo, Hf, I, Zr, Fe, Co, Ni, Cu, Zn, Ag, Pt, Pb [0117-0144 , particularly 0121]. These are reacted with counter reactants to form the compounds and the counter reactants include oxygen, ozone, water, peroxides, alcohols, acids hydroxy sources [0145].
In addition to the basis above, it would have been obvious to one skilled in the art to modify the embodiments anticipated or rendered obvious by Weidman et al. 20220342301 by adding any Cs, Sb, In, Hf, I, Fe, Co, Ni, Cu, Zn, Ag, Pt, Pb to the EUV resist compositions based upon the disclosure of Kanakasbapahty et al. WO 2021202198 at [0117-0144 , particularly 0121] with a reasonable expectation of forming a useful graded resist.
The examiner relies upon the response above as no further arguments were directed at this rejection
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Kuo et al. 20220100088 teaches a cyclic deposition of a metal oxide in figure 1B where the different layers have different degrees of oxidation [0024].
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Martin J Angebranndt whose telephone number is (571)272-1378. The examiner can normally be reached 7-3:30 pm EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ching-Yu (Coris) Fung can be reached at 571-270-5713. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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MARTIN J. ANGEBRANNDT
Primary Examiner
Art Unit 1737
/MARTIN J ANGEBRANNDT/Primary Examiner, Art Unit 1737 June 15, 2026
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