DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I (Claims 1-17) in the reply filed on 1/10/2026 is acknowledged.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-3 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Widjaja et al (US 9,905,564) in view of Huo et al (US 2012/0248503).
With respect to Claim 1, Widjaja et al discloses a semiconductor memory cell (Figure 2C) comprising: a floating body region (Figure 2C, 24) configured to be charged to a level indicative of a state of the memory cell; a first region (Figure 2C, 16) in electrical contact with said floating body region (Figure 2C, 24); a second region (Figure 2C, 18) in electrical contact with said floating body region and spaced apart from said first region (Figure 2C, 16) ; a gate (Figure 2C, 60) positioned between said first and second regions; a buried layer (Figure 2C, 30) beneath said floating body region (Figure 2C, 24); an insulated layer (Figure 2C, 26) configured to insulate the memory cell from adjacent memory cells in a first direction. See Figure 2C and corresponding text, especially column 9, line 20 to column 10, line 50.
Widjaja et al differs from the Claims at hand in that Widjaja et al does not disclose “a buried insulating layer configured to insulate the memory cell from adjacent memory cells in a second direction perpendicular to said first direction”.
Huo et al also pertains to memory cells and discloses the formation of an insulation layer between a source/drain region and a substrate and at opposite sides of a buried layer, extending between a channel region and the substrate. See Figure 4 and corresponding text, especially paragraph 34.
It would have been obvious to one of ordinary skill in the art, before the effective date of the invention, to provide buried insulating layers in the device of Widjaja et al, for its known benefit in the art of insulating memory cells from adjacent memory cells. The use of a known component, buried insulating layers, for their known benefit, insulating adjacent memory cells, would have been prima facie to one of ordinary skill in the art.
With respect to Claim 2, the combined references make obvious “wherein said buried insulating layer does not extend to a surface of the memory cell, but is buried beneath the first and second regions”. See Figure 4 and corresponding text, especially paragraph 34 of Huo et al.
With respect to Claim 3, , Widjaja et al discloses wherein said buried layer (Figure 2C, 30) is configured to inject charge into or extract charge out of said floating body region to maintain said state of the memory cell. See column 12, lines 15-27 and Figures 7-8 of Widjaja et al ( a positive back bias applied to the buried layer (30) maintains the state of the memory cell by maintaining a charge stored in the floating body region (24) ).
With respect to Claim 8, the Examiner takes Official Notice that memory cell arrays comprising rows and columns are well known in the art of semiconductor devices.
Allowable Subject Matter
Claims 4-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 9-17 are allowed.
With respect to Claims 9-17, the cited prior art does not anticipate or make obvious inter alia “a third region in contact with said first floating body region and said second body region; a gate positioned between said first region and third region; a buried layer beneath said first floating body region; an insulating layer configured to insulate the memory cell from adjacent memory cells in a first direction; and a buried insulating layer configured to insulate said first floating body region from an adjacent memory cell in a second direction perpendicular to said first direction and to insulate said first floating body region from said second body region”.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALEXANDER G GHYKA whose telephone number is (571)272-1669. The examiner can normally be reached Monday-Friday 9-6.
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AGG
January 21, 2026
/ALEXANDER G GHYKA/Primary Examiner, Art Unit 2812