Prosecution Insights
Prosecution Insights
Technology area: Semiconductors, Circuits & Optics
2 pending office actions • 1 art units • 2 examiners • 0 of 2 (0%) have an AI response strategy ready • 4 patents granted in the last 365 days
Zeno Semiconductor Inc. is currently managing 2 pending office actions in the Semiconductors, Circuits & Optics technology area. These 2 actions are assigned to 2 distinct examiners, meaning each pending matter is being reviewed by a different individual. Despite having 2 distinct examiners, the portfolio is concentrated within 1 distinct art unit. This indicates that both examiners are working within the same technical group at the patent office.
The busiest examiner for this portfolio is HOANG, HUAN, who is handling 1 busiest examiner pending action. Since there are 2 pending office actions and 2 distinct examiners, the workload is split between them. This distribution across 2 distinct examiners within 1 distinct art unit allows the company to receive feedback from different perspectives while remaining within a single technical specialty. The 1 busiest examiner pending action for HOANG, HUAN is a portion of the total pending workload.
In the Semiconductors, Circuits & Optics sector, having 2 pending office actions in 1 distinct art unit suggests a focused development of a specific technology. The 2 distinct examiners provide diversity in the examination process, even though they are in the same art unit. This structure for the 2 pending office actions means that the company must navigate the specific standards of 1 distinct art unit while addressing the individual concerns of 2 distinct examiners, including HOANG, HUAN.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| Double-patenting + other | 1 (50%) |
| Multi-statute (no §101) | 1 (50%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| HOANG, HUAN | 1 | 93.3% | +5.6% |
| CRAWFORD EASON, LATANYA N | 1 | 78.4% | +0.4% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 1 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18938256 | NAND String Utilizing Floating Body Memory Cell | HOANG, HUAN | — |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 1 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18621096 | Memory Cell Comprising First and Second Transistors and Methods of Operating | CRAWFORD EASON, LATANYA N | — |
| Art Unit | Apps |
|---|---|
| 2827 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 18938256 | NAND String Utilizing Floating Body Memory Cell | HOANG, HUAN | 2827 | §112DP | Non-Final OA | — | Pending | Nov 05, 2024 |
| 18621096 | Memory Cell Comprising First and Second Transistors and Methods of Operating | CRAWFORD EASON, LATANYA N | — | §103§112 | Non-Final OA | — | Pending | Mar 29, 2024 |
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