Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 01/15/2026 was filed in a timely manner; thus, the submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Response to Arguments
Applicant’s arguments, see page #1, filed 11/04/25, with respect to the rejection(s) of claim(s) #1-10 under Yao et al. has been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of VATS et al., (U.S. Pat. No, 2019/0385844).
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) #1, 5-10 are rejected under 35 U.S.C. 102(a)(2) as being unpatentable by VATS et al., (U.S. Pat. No, 2019/0385844), hereinafter referred to as "Vats".
Vats shows, with respect to claim #1, semiconductor processing method comprising: providing one or more deposition precursors to a processing region of a semiconductor processing chamber (fig. #1, item 100) (paragraph 0013); contacting a substrate (fig. #1, item 190) (paragraph 0015) housed in the processing region (fig. #1, item 126) with the one or more deposition precursors (paragraph 0020); forming a silicon-containing material on the substrate (fig. #1, item 190) (paragraph 0020); providing a fluorine-containing precursor to the processing region of the semiconductor processing chamber (paragraph 0021-0021); contacting the silicon-containing material on the substrate with the fluorine- containing precursor to form a fluorine-treated silicon-containing material (paragraph 0021-0021, 0034); and contacting the fluorine-treated silicon-containing material with plasma effluents of argon or diatomic nitrogen (paragraph 0021-0021).
Vats shows, with respect to claim #5, a method wherein further comprising: subsequent to forming the silicon-containing material on the substrate (paragraph 0020), halting a flow of the one or more deposition precursors (paragraph 0032); and reducing a pressure within the semiconductor processing chamber prior to providing the fluorine-containing precursor to the processing region of the semiconductor processing chamber (paragraph 0034).
Vats teaches, with respect to claim #6, a method wherein the pressure within the semiconductor processing chamber is maintained at less than or equal to15 Torr while contacting the silicon-containing material on the substrate with the fluorine-containing precursor (paragraph 0020, 0032, 0034).
Vats teaches, with respect to claim #7, a method further comprising: forming plasma effluents of argon or diatomic nitrogen prior to contacting the fluorine-treated silicon-containing material with plasma effluents of argon or diatomic nitrogen, wherein the plasma effluents of argon or diatomic nitrogen are formed at a plasma power of less than or equal to 750 W (paragraph 0016).
Vats shows, with respect to claim #8, a method wherein: contacting the fluorine-treated silicon-containing material with plasma effluents of argon or diatomic nitrogen forms a fluorine-doped silicon-boron-and-nitrogen-containing material; and the fluorine-doped silicon-boron-and-nitrogen-containing material is characterized by a conformality of greater than or equal to 90% (paragraph 0021-0021, 0042).
Vats shows, with respect to claim #9, a method wherein the fluorine-doped silicon-boron-and-nitrogen-containing material is characterized by a thickness of less than or about 750 Å (paragraph 0028).
Vats shows, with respect to claim #10, method wherein the fluorine-doped silicon-boron-and-nitrogen-containing material is characterized by a dielectric constant of less than or equal to 4.6 (paragraph 0021-0021, 0042).
The Examiner notes that the Applicant has not disclosed that the claimed material is for a particular unobvious purpose, produces an unexpected result, or is otherwise critical, which are criteria that have been held to be necessary for material limitations to be prima facie unobvious. The claimed material is considered to be a "preferred" or "optimum" material out of a plurality of well-known materials that a person of ordinary skill in the art at the time the invention was made would have found obvious to provide to the invention of the cited prior art reference, using routine experimentation and optimization of the invention. In re Leshin, 125 USPQ 416 (CCPA 1960). Furthermore, with reference to Applicant stating that listed material has a dielectric constant of less than or about 4.6, the Examiner notes that “Products of identical chemical composition cannot have mutually exclusive properties." In re Spada, 911 F.2d 705, 709, 15 USPQ2d 1655, 1658 (Fed. Cir. 1990). A chemical composition and its properties are inseparable. Therefore, if the prior art teaches the identical chemical structure, the properties applicant discloses and/or claims are necessarily present. Id. (Applicant argued that the claimed composition was a pressure sensitive adhesive containing a tacky polymer while the product of the reference was hard and abrasion resistant. "The Board correctly found that the virtual identity of monomers and procedures sufficed to support a prima facie case of unpatentability of Spada’s polymer latexes for lack of novelty."). Thus, the Examiner takes the position that Yao’s example of employing the collective of materials will yield a product within the preferred range of dielectric constant.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim #2 is/are rejected under 35 U.S.C. 103 as being unpatentable over VATS et al., (U.S. Pat. No, 2019/0385844), hereinafter referred to as "Vats" as shown in the rejection of claim #1 above and in view of Haukka et al., (U.S. Pub. No.20130196502), hereinafter referred to as "Haukka".
Vats substantially shows the claimed invention as shown in the rejection of claim #1 above.
Vats fails to show, with respect to claim #2, a method wherein the one or more deposition precursors comprise a silicon-containing precursor and a boron-containing precursor.
Haukka teaches, with respect to claim #2, a method wherein the one or more deposition precursors comprise a silicon-containing precursor and a boron-containing precursor (paragraph 0028, 0038, 0041).
It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #2, to modified the invention of Vats, with the modifications of the invention of Haukka, which teaches, a method wherein the one or more deposition precursors comprise a silicon-containing precursor and a boron-containing precursor, to incorporate a structural condition with the unique ability to form strong, stable covalent bonds and its high reactivity in tailored, low-temperature, or high-temperature environments, as taught by Haukka.
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Claim #3, 4 are rejected under 35 U.S.C. 103 as being unpatentable over VATS et al., (U.S. Pat. No, 2019/0385844), hereinafter referred to as "Vats" as shown in the rejection of claim #1 above and in view of Bamnolker et al., (U.S. Pub. No.2017/0117155), hereinafter referred to as "Bamnolker".
Vats substantially shows the claimed invention as shown in the rejection of claim #1 above.
Vats fails to explicitly state, with respect to claim #3, a method wherein a temperature within the semiconductor processing chamber is maintained at less than or equal to 550 °C during the semiconductor processing method.
Bamnolker teaches with respect to claim #3, a method wherein a temperature within the semiconductor processing chamber is maintained at less than or equal to 550 °C during the semiconductor processing method (paragraph 0021).
It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #3 to modified the invention of Vats as modified by the invention of Bamnolker, which teaches a method wherein a temperature within the semiconductor processing chamber is maintained at less than or equal to 550 °C during the semiconductor processing method, to incorporate a structural condition that would for provide proper or needed plasma condition that would permit/provide atmospheric conditions for proper layering of material, as taught by Bamnolker.
Vats fails to show, with respect to claim #4, a method wherein the substrate comprises a feature characterized by an aspect ratio of greater than or equal to 3:1.
Bamnolker teaches, with respect to claim #4 a method wherein the substrate comprises a feature characterized by an aspect ratio of greater than or equal to 3:1 (paragraph 0054).
It would have been obvious to one having ordinary skill in the art at the time the invention was made, with respect to claim #4 to modified the invention of Vats as modified by the invention of Bamnolker, which teaches a method wherein the substrate comprises a feature characterized by an aspect ratio of greater than or equal to 3:1, to incorporate a structural condition that would provide needed design characteristics, as taught by Bamnolker.
The Examiner notes that the applicant has not established the critical nature aspect of having a structural ratio of greater than or about 3:1. “The law is replete with cases in which the difference between the claimed invention and the prior art is some range or other variable within the claims. In such a situation, the applicant must show that the particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range.” In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir.1990). To establish unexpected results over a claimed range, applicants should compare a sufficient number of tests inside and outside the claimed range to show criticality of the claimed range. In re Hill, 284 F.2d 955, 128 USPQ 197(CCPA 1960). Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was made to have various ranges.
EXAMINATION NOTE
The rejections above rely on the references for all the teachings expressed in the text of the references and/or one of ordinary skill in the art would have reasonably understood or implied from the texts of the references. To emphasize certain aspects of the prior art, only specific portions of the texts have been pointed out. Each reference as a whole should be reviewed in responding to the rejection, since other sections of the same reference and/or various combinations of the cited references may be relied on in future rejections in view of amendments.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Andre’ Stevenson whose telephone number is (571) 272 1683 (Email Address, Andre.Stevenson@USPTO.GOV). The examiner can normally be reached on Monday through Friday from 7:30 am to 4:30 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached on 571-272 2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Andre’ Stevenson Sr./
Art Unit 2899
01/24/2026
/ZANDRA V SMITH/ Supervisory Patent Examiner, Art Unit 2899