Prosecution Insights
Last updated: April 19, 2026
Application No. 17/943,702

METHOD OF DETECTING DEVIATION AMOUNT OF SUBSTRATE TRANSPORT POSITION AND SUBSTRATE PROCESSING APPARATUS

Non-Final OA §103
Filed
Sep 13, 2022
Examiner
SEOANE, TODD MICHAEL
Art Unit
1718
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Tokyo Electron Limited
OA Round
3 (Non-Final)
62%
Grant Probability
Moderate
3-4
OA Rounds
3y 6m
To Grant
99%
With Interview

Examiner Intelligence

Grants 62% of resolved cases
62%
Career Allow Rate
5 granted / 8 resolved
-2.5% vs TC avg
Strong +75% interview lift
Without
With
+75.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
63 currently pending
Career history
71
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
61.8%
+21.8% vs TC avg
§102
15.6%
-24.4% vs TC avg
§112
22.0%
-18.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 8 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment The amendment filed 08/06/2025 has been entered. Applicant’s amendments to the claims have overcome each and every objection and 112(b) rejection previously set forth in the Non-Final Office Action mailed 05/06/2025. Claim Status Claims 14-30 are pending. Claims 14, 18-19, 21, and 24-26 are currently amended. Claims 1-13 are cancelled. Claims 27-30 are newly added. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 14, 16-20, and 22-30 are rejected under 35 U.S.C. 103 as being unpatentable over Ikuhara (JP 2011082442 A) in view of Chen (US 20090088887 A1). Regarding claim 14, Ikuhara teaches A substrate processing apparatus (Fig. 1, [0019], etching apparatus 1) comprising: a process module in which a stage having a substrate support surface is provided inside a chamber (Fig. 1, [0022], processing chamber 9 has electrode 21 upon which wafer 3 sits, Fig. 2, [0031]); a gauge configured to measure an etching rate of a substrate (Fig. 1, OCD apparatus 11 measures film thicknesses on wafers and an etching rate is calculated, [0030]); and a controller configured to concentrically control a temperature of the substrate support surface (Fig. 3, [0040]-[0042], control device 30 and OCD control device 40 control the apparatus, where subsystem electrode temperature control unit 31 sets electrode temperature, and central/intermediate/outer peripheral heaters 24a-24c can be independently adjusted, [0032]), wherein the controller is configured to control the substrate processing apparatus to: (a) set a temperature of the substrate support surface to a same temperature over an entire substrate support surface ([0044], step S1 – temperature setting of the electrode is performed per the standard etching conditions with no adjustment); (b) etch a first etching target film formed on a substrate disposed on the substrate support surface ([0044], step S3 – standard etching conditions are performed on a wafer, where a film is present on the wafer, [0024]); (c) acquire a first etching rate that is an etching rate of the first etching target film ([0028], wafer is measured pre/post processing by OCD apparatus 11 to acquire etch rate, Fig. 5a middle data points) (d) set the temperature of the substrate support surface to be concentrically and gradually increased from a central portion to a peripheral edge portion, or to be concentrically and gradually decreased from the central portion to the peripheral edge portion ([0045], Fig. 5a, temperature of electrode is shifted up or down +/- temperature T from standard etching conditions, where subsystem electrode temperature control unit 31 sets electrode temperature, and central/intermediate/outer peripheral heaters 24a-24c can be independently adjusted, [0032]); (e) etch a second etching target film formed on the substrate disposed on the substrate support surface, the second etching target film being same kind as the first etching target film (Fig. 5a, [0048], wafer is etched after shifting the temperature up/down); (f) acquire a second etching rate that is an etching rate of the second etching target film ([0028], wafer is measured pre/post processing by OCD apparatus 11 to acquire etch rate, Fig. 5a, top/bottom data points); and (g) calculate a difference between the first etching rate acquired in (c) and second etching rate acquired in (f) ([0042], OCD process management unit 35 calculates the etching rate at each point in the surface or correlation data between the electrode temperature and the etching rate from the measurement data by the OCD device 11, the electrode temperature data, and the like). Ikuhara fails to teach (h) calculate a deviation amount of a substrate transport position after the substrate is transferred into the process module based on the difference calculated in (g). However, Chen teaches (h) calculate a deviation amount of a substrate transport position after the substrate is transferred into the process module based on the difference calculated in (g) (Chen, Figs. 6 and 7, [0069]-[0080], etch rate is calculated at step 610 where substrate off-center value is calculated vs chuck’s process center, where all operations are controlled by a computer, [0037]). Chen is considered analogous art to the claimed invention because it is in the same field of semiconductor processing. It would have been obvious to one ordinarily skilled in the art at the time of filing to have incorporated the methods of Chen of using the spatially measured etch rate values to calculate the deviation of the wafer to the center of the chuck as doing so would allow for adjustment of wafer placement misalignment, thereby minimizing device defects caused by said misalignment (Chen, [0007]). Regarding claim 16, Ikuhara teaches wherein the gauge is provided adjacent to a loader module (Fig. 1, [0021], OCD device 11 is located adjacent to loader device 4). Regarding claim 17, Ikuhara teaches wherein each of the first etching rate and the second etching rate includes etching rates in two different directions ([0028], etching rate can be measured in both the vertical and horizontal direction), but fails to explicitly teach wherein the directions are passing through a center of the substrate. However, Chen teaches wherein the different measurement directions pass through a center of the substrate (Chen, Fig. 2B, etch rates measured from 90° to 270° are perpendicular to etch rates measured from 0° to 180°). It would have been obvious to one ordinarily skilled in the art at the time of filing to have incorporated the methods of Chen of using the spatially measured etch rate values to calculate the deviation of the wafer to the center of the chuck as doing so would allow for adjustment of wafer placement misalignment, thereby minimizing device defects caused by said misalignment (Chen, [0007]). Regarding claim 18, Ikuhara fails to explicitly teach wherein the etching rates in the two different directions are etching rates in two directions perpendicular to each other. However, Chen teaches wherein the etching rates in the two different directions are etching rates in two directions perpendicular to each other (Chen, Fig. 2B, etch rates measured from 90° to 270° are perpendicular to etch rates measured from 0° to 180°). It would have been obvious to one ordinarily skilled in the art at the time of filing to have incorporated the methods of Chen of using the spatially measured etch rate values to calculate the deviation of the wafer to the center of the chuck as doing so would allow for adjustment of wafer placement misalignment, thereby minimizing device defects caused by said misalignment (Chen, [0007]). Regarding claim 19, Ikuhara teaches wherein, (g) includes calculating each difference between the first etching rate and the second etching rate ([0042], OCD process management unit 35 calculates the etching rate among a plurality of measurement points located about the substrate at each point in the surface or correlation data between the electrode temperature and the etching rate from the measurement data by the OCD device 11, the electrode temperature data, and the like). Ikuhara fails to teach wherein the etching rates are calculated on a straight line in a same direction passing through the center of the substrate, and (h) includes obtaining each linear approximate formula for a corresponding range in each section from the center of the substrate to peripheral edge portion of both sides when each difference on the straight line is represented by a graph, and calculating the deviation amount based on each linear approximate formula. However, Chen teaches wherein the etching rates are calculated on a straight line in a same direction passing through the center of the substrate (Chen, Fig. 2B, etch rates measured from 90° to 270° are perpendicular to etch rates measured from 0° to 180°), and (h) includes obtaining each linear approximate formula for a corresponding range in each section from the center of the substrate to peripheral edge portion of both sides when each difference on the straight line is represented by a graph, and calculating the deviation amount based on each linear approximate formula (Chen, Fig. 3, [0063], a linear interpolation or cubic spline may be performed to determine the radius for data points having a given etch rate, where multiple wafer orientation etch rates may be plotted and calculated). It would have been obvious to one ordinarily skilled in the art at the time of filing to have incorporated the methods of Chen of using the spatially measured etch rate values to calculate the deviation of the wafer to the center of the chuck as doing so would allow for adjustment of wafer placement misalignment, thereby minimizing device defects caused by said misalignment (Chen, [0007]). Regarding claim 20, Ikuhara teaches wherein the substrate support surface has at least two concentric temperature control regions (Fig. 2, [0032],central heater 24a, intermediate heater 24b, peripheral heater 24c). Regarding claim 22, Ikuhara teaches wherein the first etching rate and the second etching rate are etching rates of a silicon-containing film or an organic film formed on the substrate ([0024], thin film on wafer may be a silicon oxide or resist film). The Examiner construes ‘a silicon-containing film or an organic film formed on the substrate’ as a material or article worked upon by the apparatus. The courts have held that such an inclusion does not impart patentability to the claims. See MPEP 2115. Regarding claim 23, Ikuhara teaches wherein the silicon- containing film is a silicon nitride film or a silicon oxide film ([0024], thin film on wafer may be a silicon oxide or resist film). The Examiner construes ‘the silicon- containing film is a silicon nitride film or a silicon oxide film’ as a material or article worked upon by the apparatus. The courts have held that such an inclusion does not impart patentability to the claims. See MPEP 2115. Regarding claim 24, Ikuhara fails to teach wherein the controller is further configured to control the substrate processing apparatus to: (i) adjust the substrate transport position based on the deviation amount calculated in (h). However, Chen teaches wherein the controller is further configured to control the substrate processing apparatus to: (i) adjust the substrate transport position based on the deviation amount calculated in (h) (Chen, Fig. 6, [0080], substrate offset calculation values are transmitted to the robotic arm such that the substrate has corrected coordinates when placed upon the chuck). It would have been obvious to one ordinarily skilled in the art at the time of filing to have incorporated the methods of Chen of using the spatially measured etch rate values to calculate the deviation of the wafer to the center of the chuck as doing so would allow for adjustment of wafer placement misalignment, thereby minimizing device defects caused by said misalignment (Chen, [0007]). Regarding claim 25, Ikuhara teaches wherein the first etching rate and the second etching rate are measured by the gauge ([0044]-[0048], first etching rate in step S3 is measured by OCD device 11, second etching rate in step S4 is measured by OCD device 11). Regarding claim 26, Ikuhara teaches wherein the first etching target film and the second etching target film are films of a same kind that are formed on different substrates (Fig. 5B, [0024], dummy wafers used have a film on them, such as silicon oxide). The Examiner construes ‘the first etching target film and the second etching target film are films of a same kind that are formed on different substrates’ as a material or article worked upon by the apparatus. The courts have held that such an inclusion does not impart patentability to the claims. See MPEP 2115. Regarding claim 27, Ikuhara teaches wherein the first etching rate and the second etching rate are etching rates of a silicon-containing film formed on the substrate ([0024], thin film on wafer that is etched may be a silicon oxide or resist film). The Examiner construes ‘a silicon-containing film formed on the substrate’ as a material or article worked upon by the apparatus. The courts have held that such an inclusion does not impart patentability to the claims. See MPEP 2115. Regarding claim 28, Ikuhara teaches wherein the first etching rate and the second etching rate are etching rates of an organic film formed on the substrate ([0024], thin film on wafer that is etched may be a silicon oxide or resist film). The Examiner construes ‘an organic film formed on the substrate’ as a material or article worked upon by the apparatus. The courts have held that such an inclusion does not impart patentability to the claims. See MPEP 2115. Regarding claim 29, Ikuhara teaches a film on the substrate ([0024], thin film on wafer that is etched may be a silicon oxide or resist film). The Examiner construes ‘wherein the silicon- containing film is a silicon nitride film’ as a material or article worked upon by the apparatus. The courts have held that such an inclusion does not impart patentability to the claims. See MPEP 2115. Regarding claim 30, Ikuhara teaches wherein the silicon- containing film is a silicon oxide film ([0024], thin film on wafer that is etched may be a silicon oxide or resist film). The Examiner construes ‘the silicon- containing film is a silicon oxide film’ as a material or article worked upon by the apparatus. The courts have held that such an inclusion does not impart patentability to the claims. See MPEP 2115. Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Ikuhara (JP 2011082442 A) in view of Chen (US 20090088887 A1) as applied in claims 14, 16-20, and 22-30, and further in view of Clark (US 20190295891 A1). The limitations of claims 14, 16-20, and 22-30 are set forth above. Regarding claim 15, modified Ikuhara fails to teach wherein the gauge is provided inside a loader module. However, Clark teaches wherein the gauge is provided inside a loader module (Clark, Fig. 3, metrology module 310a is located within transfer module 310a). Clark is considered analogous art to the claimed invention because it is in the same field of semiconductor processing. It would have been obvious to one ordinarily skilled in the art at the time of filing to have incorporated the metrology module within the TM as taught by Clark as doing so would allow measured data to be collected, in real time during the processing, without removing the workpiece/substrate/wafer from the controlled processing environment, such as being under vacuum (Clark, [0095]). Claim 21 is rejected under 35 U.S.C. 103 as being unpatentable over Ikuhara (JP 2011082442 A) in view of Chen (US 20090088887 A1) as applied in claims 14, 16-20, and 22-30, and further in view of Oka (US 20200111650 A1). The limitations of claims 14, 16-20, and 22-30 are set forth above. Regarding claim 21, modified Ikuhara fails to teach wherein the stage has a ring support surface of an annular shape on an outer peripheral side of the substrate support surface, (a) includes setting the temperature of the substrate support surface and a temperature of the ring support surface to the same, and (d) includes setting the temperature of the substrate support surface and the temperature of the ring support surface to be concentrically and gradually increased from the central portion to the peripheral edge portion and further to the ring support surface, or to be concentrically and gradually decreased from the central portion to the peripheral portion and the ring support surface. However, Oka teaches wherein the stage has a ring support surface of an annular shape on an outer peripheral side of the substrate support surface (Oka, Fig. 1, annular focus ring FR sits on outer peripheral side of electrostatic chuck 18), (a) includes setting the temperature of the substrate support surface and a temperature of the ring support surface to the same temperature (Oka, Fig. 2, [0045]-[0046], concentric annular heaters HT are provided under mounting regions 75a-75d which correspond to center, middle, edge, and focus ring portions of chuck 18, where each heater is individually adjusted and controlled by control unit 100), and (d) includes setting the temperature of the substrate support surface and the temperature of the ring support surface to be concentrically and gradually increased from the central portion to the peripheral edge portion and further to the ring support surface, or to be concentrically and gradually decreased from the central portion to the peripheral portion and the ring support surface (Oka, Fig. 2, [0045]-[0046], concentric annular heaters HT are provided under mounting regions 75a-75d which correspond to center, middle, edge, and focus ring portions of chuck 18, where each heater is individually adjusted and controlled by control unit 100). Oka is considered analogous art to the claimed invention because they are in the same field of semiconductor processing. It would have been obvious to one ordinarily skilled in the art at the time of filing to have incorporated the focus ring and heater of Oka to the apparatus of modified Ikuhara as doing so would provide the benefit of having a focus ring, which includes improving the uniformity of plasma processing (Oka, [0032]). Response to Arguments In the Applicant’s response filed 08/06/2025, the Applicant asserts that none of the cited prior art, particularly Ikuhara, teach the claim limitations “(e) etch a second etching target film formed on the substrate disposed on the substrate support surface, the second etching target film being a same kind as the first etching target film; (f) acquire a second etching rate that is an etching rate of the second etching target film; (g) calculate a difference between the first etching rate acquired in (c) and the second etching rate acquired in (f); and (h) calculate a deviation amount of a substrate transport position after the substrate is transferred into the process module based on the difference calculated in (g)” of independent claim 14. Specifically, that paragraph [0047] of Ikuhara fails to teach “(e) etch a second etching target film formed on the substrate disposed on the substrate support surface, the second etching target film being a same kind as the first etching target film”, and therefore steps (f) through (g) of claim 14 cannot consequently be taught. Upon review of the Office Action, the Examiner noted that the paragraph citation given for the rejection of claim 14, limitation “(e)”, was a typographical error. The rejection should have instead read (emphasis added): ‘(e) etch a second etching target film formed on the substrate disposed on the substrate support surface, the second etching target film being same kind as the first etching target film (Fig. 5a, [0048], wafer is etched after shifting the temperature up/down)’. The Examiner has corrected the paragraph citation in this Office Action. As noted in the 103 rejections section above for claim 14, Ikuhara discloses in [0048] that the etching process is performed after shifting the temperature up and down from the standard temperature, which is a step that follows after etching the wafer at standard temperature, as disclosed in [0047], thereby meeting the claim limitation. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TODD M SEOANE whose telephone number is (703)756-4612. The examiner can normally be reached M-F 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Gordon Baldwin can be reached at 571-272-5166. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TODD M SEOANE/ Examiner, Art Unit 1718 /GORDON BALDWIN/Supervisory Patent Examiner, Art Unit 1718
Read full office action

Prosecution Timeline

Sep 13, 2022
Application Filed
Apr 21, 2025
Non-Final Rejection — §103
Aug 06, 2025
Response Filed
Oct 20, 2025
Final Rejection — §103
Mar 02, 2026
Request for Continued Examination
Mar 08, 2026
Response after Non-Final Action
Apr 06, 2026
Non-Final Rejection — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12598946
FIXTURES AND METHODS FOR POSITIONING PROCESS KIT COMPONENTS WITHIN REACTION CHAMBERS
2y 5m to grant Granted Apr 07, 2026
Patent 12562348
PLASMA PROCESSING APPARATUS
2y 5m to grant Granted Feb 24, 2026
Patent 12512330
SUBSTRATE PROCESSING METHOD AND PLASMA PROCESSING APPARATUS
2y 5m to grant Granted Dec 30, 2025
Patent 12463020
SUPPORT UNIT, APPARATUS FOR TREATING SUBSTRATE WITH THE SAME
2y 5m to grant Granted Nov 04, 2025
Study what changed to get past this examiner. Based on 4 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

3-4
Expected OA Rounds
62%
Grant Probability
99%
With Interview (+75.0%)
3y 6m
Median Time to Grant
High
PTA Risk
Based on 8 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month