Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
In response to applicants correspondence dated 05/14/2026, specifically the arguments on pages 8-12 regarding Lee et and Jeong et al, the arguments are no longer pertinent as a new reference is used as a base reference, and Lee et al and Jeong et al are no longer used for any limitations being specifically argued. Additionally, the amendments made to claims 1, 15 and 21 overcome the previous prior art rejection. However a new rejection is formulated upon a new base reference below.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 15, and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Cha et al (US 20210208463) in view of Ogawa (US 20210091260 A1).
Cha et al teaches
[claim 1] A display device comprising: a first voltage line included in a first metal layer on a substrate and extending in a first direction (figures 6 and 7, paragraph 0088, where the first voltage line is element HGLn and on the first metal layer situated on a substrate [element 110] extending in a first direction [horizontal direction in figure 7]);
a first transistor electrically connected to the first voltage line, (figure 6, paragraph 0088, where element HGLn is connected to the first transistor [element ST1]),
the first transistor comprising, a source electrode included in an active layer on the first metal layer (figure 8, paragraphs 0111 and 0123, where element SE1 is the source electrode on the active layer [layer with element ACT1] and on the first metal layer [layer which contains element GE1]),
a source electrode included in an active layer on the first metal layer, a second capacitor electrode included in the active layer (figure 8, paragraphs 0123 and 0111, where the source electrode [element SE1] is in an active layer [part of SE1 is situated in the same layer as element ACT1] where the source electrode is also the second capacitor electrode which is also located in the active layer),
and a first capacitor electrically connected between the gate electrode of the first transistor and the source electrode of the first transistor (figure 8, paragraph 0097, where element Cgs1 is the first capacitor and is electrically connected between the gate electrode [element GE1] and the source electrode [element SE1]),
the first capacitor comprising: a first capacitor electrode included in the first metal layer and electrically connected to the gate electrode of the first transistor (figure 8, paragraphs 0097 and 0129, where element GE1 is simultaneously the gate electrode and the first capacitor electrode [thus electrically connected] situated in a first metal layer),
the second capacitor electrode and the source electrode of the first transistor being integrally formed with each other (figure 8, paragraphs 0111 and 0129, where element SE1 is an integrally formed capacitor electrode, which is the second capacitor electrode, and the source electrode),
wherein the source electrode is spaced apart from the first voltage line (figure 8, paragraph 0129, where element SE1 is spaced apart from the first voltage line which is connected to element GE1 of figure 8 and in the same layer).
[claim 15] A display device comprising: a first metal layer on a substrate (figure 8, paragraph 0129, where the layer above the substrate [element 110] is the first metal layer [layer that contains element GE1]),
an active layer on the first metal layer; a second metal layer on the active layer (figure 8, paragraph 0129, where element ACT1 is the location of the active layer which is on the first metal layer, and the second metal layer which contains the portion of SE1 that sits on element ACT1 is the second metal layer on the active layer),
a first transistor included in the active layer and the second metal layer (figure 8, paragraph 0129, where element ST1 is the first transistor and includes the active layer [element ACT1 layer] and the second metal layer [elements SE1 and DE1 have portions on the second metal layer]);
and a first capacitor electrically connected between a gate electrode of the first transistor and a source electrode of the first transistor (figure 8, paragraph 0129, where element GE1 and SE1 comprise the first capacitor and electrically connected between the gate electrode [element GE1] and source electrode [element SE1]),
the first capacitor comprising: a first capacitor electrode included in the first metal layer and electrically connected to the gate electrode of the first transistor (figure 8, paragraphs 0111 and 0129, where element GE1 is the first capacitor electrode and gate electrode and thus electrically connected to one another and located in the first metal layer),
a second capacitor electrode included in the active layer (figure 8, paragraph 0129, where element SE1 is also the second capacitor electrode and is located in the same layer as the active layer [element ACT1 layer]),
wherein the second capacitor electrode and the source electrode of the first transistor are integrally formed with each other (figure 8, paragraph 0129, where element SE1 is the second capacitor electrode and source electrode integrally formed together),
wherein the source electrode is spaced apart from the first voltage line (figures 6-8, paragraphs 0097 and 0129, where element HGLn is the first voltage line and connected to element GE1 and located in the same layer, where element SE1 is spaced apart from said layer),
[claim 21] An electronic device comprising: a first voltage line included in a first metal layer on a substrate and extending in a first direction (figures 6 and 7, paragraph 0088, where the first voltage line is element HGLn and on the first metal layer situated on a substrate [element 110] extending in a first direction [horizontal direction in figure 7]);
a first transistor electrically connected to the first voltage line, (figure 6, paragraph 0088, where element HGLn is connected to the first transistor [element ST1]),
the first transistor comprising, a source electrode included in an active layer on the first metal layer (figure 8, paragraphs 0111 and 0123, where element SE1 is the source electrode on the active layer [layer with element ACT1] and on the first metal layer [layer which contains element GE1]),
and a first capacitor electrically connected between the gate electrode of the first transistor and the source electrode of the first transistor (figure 8, paragraph 0097, where element Cgs1 is the first capacitor and is electrically connected between the gate electrode [element GE1] and the source electrode [element SE1]),
the first capacitor comprising: a first capacitor electrode included in the first metal layer and electrically connected to the gate electrode of the first transistor (figure 8, paragraphs 0097 and 0129, where element GE1 is simultaneously the gate electrode and the first capacitor electrode [thus electrically connected] situated in a first metal layer),
a source electrode included in an active layer on the first metal layer, a second capacitor electrode included in the active layer (figure 8, paragraphs 0123 and 0111, where the source electrode [element SE1] is in an active layer [part of SE1 is situated in the same layer as element ACT1] where the source electrode is also the second capacitor electrode which is also located in the active layer),
the second capacitor electrode and the source electrode of the first transistor being integrally formed with each other (figure 8, paragraphs 0111 and 0129, where element SE1 is an integrally formed capacitor electrode, which is the second capacitor electrode, and the source electrode),
wherein the source electrode is spaced apart from the first voltage line (figure 8, paragraph 0129, where element SE1 is spaced apart from the first voltage line which is connected to element GE1 of figure 8 and in the same layer).
However, Cha et al does not specifically disclose
[claims 1] and a gate electrode included in a second metal layer on the active layer, wherein the source electrode is made of a semiconductor material, and wherein the second capacitor electrode is made of a semiconductor material.
[claim 15] wherein the source electrode is made of a semiconductor material, and wherein the second capacitor electrode is made of a semiconductor material.
[claims 21] and a gate electrode included in a second metal layer on the active layer, wherein the source electrode is made of a semiconductor material, and wherein the second capacitor electrode is made of a semiconductor material.
However, Ogawa does teach
[claim 1] and a gate electrode included in a second metal layer on the active layer (figure 4, paragraph 0053, where element 31 is a gate electrode in a second metal layer [layer over the active region labeled element 27 read onto from Cha et al, specifically element ACT1], which is located on the active layer),
and wherein the second capacitor electrode is made of a semiconductor material (paragraph 0058, where the integrally formed capacitor can be made of semiconductor material, where CS1 is the second capacitor and CS2 is the first capacitor).
[claim 15] and wherein the second capacitor electrode is made of a semiconductor material (paragraph 0058, where the integrally formed capacitor can be made of semiconductor material, where CS1 is the second capacitor and CS2 is the first capacitor).
[claim 21] and a gate electrode included in a second metal layer on the active layer (figure 4, paragraph 0053, where element 31 is a gate electrode in a second metal layer [layer over the active region labeled element 27 read onto from Cha et al, specifically element ACT1], which is located on the active layer),
and wherein the second capacitor electrode is made of a semiconductor material (paragraph 0058, where the integrally formed capacitor can be made of semiconductor material, where CS1 is the second capacitor and CS2 is the first capacitor).
It would have been obvious to one of ordinary skill in the art at the time of filing to have modified the teachings of Cha et al as modified to incorporate the teachings of Ogawa in order to provide a more stable capacitor by using a semiconductor material instead of a conductor material to increase device reliability.
Claim(s) 2-4, 6, 9, 11, 16, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Cha et al (US 20210208463) and Ogawa (US 20210091260 A1) and in further view of Lee et al (US 20210202643 A1).
Cha et al as modified teaches all of the limitations of the parent claims, claims 1 and 15 but does not specifically disclose
[claim 2] The display device of claim 1, further comprising: a first connection electrode included in the second metal layer and electrically connecting the first voltage line and a drain electrode of the first transistor.
[claim 3] The display device of claim 1, further comprising: a second connection electrode included in the second metal layer, wherein the second connection electrode and the gate electrode of the first transistor are integrally formed with each other, and the second connection electrode is electrically connected to the first capacitor electrode.
[claim 4] The display device of claim 1, further comprising: a data line included in the first metal layer and extending in the first direction; and a second transistor electrically connecting the data line and the gate electrode of the first transistor.
[claim 6] The display device of claim 4, further comprising: a fourth connection electrode included in the second metal layer and electrically connecting the first capacitor electrode and a source electrode of the second transistor.
[claim 9] The display device of claim 1, further comprising: an active extension portion extending from the second capacitor electrode; a first electrode included in a third metal layer on the second metal layer, extending in the first direction, and electrically connected to the active extension portion; and a second electrode extending parallel to the first electrode included in the third metal layer.
[claim 11] The display device of claim 1, further comprising: a horizontal voltage line included in the second metal layer, extending in a second direction intersecting the first direction, and electrically connected to the first voltage line; a first electrode included in a third metal layer on the second metal layer, extending in the first direction, and electrically connected to the horizontal voltage line; and a second electrode extending parallel to the first electrode included in the third metal layer.
[claim 16] The display device of claim 15, further comprising: an active extension portion extending from the second capacitor electrode; a first electrode included in a third metal layer on the second metal layer, extending in the first direction, and electrically connected to the active extension portion; and a second electrode extending parallel to the first electrode included in the third metal layer.
[claim 18] The display device of claim 15, further comprising: a first voltage line in the first metal layer and extending in a first direction; a horizontal voltage line included in the second metal layer, extending in a second direction intersecting the first direction, and electrically connected to the first voltage line, a first electrode included in a third metal layer on the second metal layer, extending in the first direction, and electrically connected to the horizontal voltage line and a second electrode extending parallel to the first electrode included in the third metal layer
However, Lee et al does teach
[claim 2] The display device of claim 1, further comprising: a first connection electrode included in the second metal layer and electrically connecting the first voltage line and a drain electrode of the first transistor (figure 4, paragraph 0114, element DP is in the second metal layer [with element 121a and GL] and is electrically connected to the first voltage line and drain electrode of the first transistor [elements VDD and 123a respectively] through contact holes).
[claim 3] The display device of claim 1, further comprising: a second connection electrode included in the second metal layer, wherein the second connection electrode and the gate electrode of the first transistor are integrally formed with each other, and the second connection electrode is electrically connected to the first capacitor electrode (figure 4, paragraph 0088, element 121a is the gate electrode and second connection electrode integrally formed and the second connection electrode is connected to the first capacitor electrode [element 151a] per figure 2 where the gate of the transistor [120] is connected to the capacitor electrode not integrally formed with the source electrode).
[claim 4] The display device of claim 1, further comprising: a data line included in the first metal layer and extending in the first direction; and a second transistor electrically connecting the data line and the gate electrode of the first transistor (figures 2 and 3, paragraph 0058, where the data line [element DL] extends in the same direction as VDD [the first direction], and a second transistor [element 130] is electrically connected to the data through the drain electrode, and the gate of the first transistor [element 120] is electrically connected to the data line through the second transistor).
[claim 6] The display device of claim 4, further comprising: a fourth connection electrode included in the second metal layer and electrically connecting the first capacitor electrode and a source electrode of the second transistor (paragraph 0088, where the contact hole is metallic, and extends from the first metal layer to the second metal layer, thus there is a metal portion on the second metal layer connected to the source electrode which is designated as the forth connection electrode).
[claim 9] The display device of claim 1, further comprising: an active extension portion extending from the second capacitor electrode (figure 4, paragraph 0109, element 162 is connected to and extending from the second capacitor electrode [element 152a]);
a first electrode included in a third metal layer on the second metal layer, extending in the first direction, and electrically connected to the active extension portion (figures 3 and 4, paragraph 0109, element 161 extending in the first direction [vertical direction on figure 3, parallel with VDD], in the third metal layer which is over the second metal layer);
and a second electrode extending parallel to the first electrode included in the third metal layer (figure 4, element 163 extends parallel to 161 and is in the same layer [third metal layer]).
[claim 11] The display device of claim 1, further comprising: a horizontal voltage line included in the second metal layer, extending in a second direction intersecting the first direction, and electrically connected to the first voltage line (figures 3 and 4, element GL is extending horizontally across the page of figure 3 which is orthogonal to the first voltage line [vdd] extending in the first direction [vertical up the page on figure 3], and is electrically connected to VDD through multiple transistors);
a first electrode included in a third metal layer on the second metal layer, extending in the first direction, and electrically connected to the horizontal voltage line (figures 2, 3 and 4, paragraph 0109, element 161 is the first electrode in the third metal layer [which is the layer of element 161 and 162], where element 161 is electrically connected to the GL through elements 150 and 130 per figure 2);
and a second electrode extending parallel to the first electrode included in the third metal layer (figure 3 and 4, element 163 is a second electrode extending parallel to element 161 in the first direction [vertical up figure 3]).
[claim 16] The display device of claim 15, further comprising: an active extension portion extending from the second capacitor electrode; a first electrode included in a third metal layer on the second metal layer, extending in the first direction, and electrically connected to the active extension portion (figures 3, and 4, paragraph 0109, where element 162 is the active extension portion extending from the second capacitor electrode [element 152a], and is connected to a first electrode [element 161] in the third metal layer [layer comprising elements 161, part of 162 and 163], and extending in a first direction [vertically up the page of figure 3]);
and a second electrode extending parallel to the first electrode included in the third metal layer (figure 3 and 4, element 163 is in the third metal layer and extends in parallel to element 161).
[claim 18] The display device of claim 15, further comprising: a first voltage line in the first metal layer and extending in a first direction (paragraph 0059, figure 5, element VDD1 is a first voltage line and is in the first metal layer and extends in the first direction [it has a height and extends in the vertical direction]);
a horizontal voltage line included in the second metal layer, extending in a second direction intersecting the first direction, and electrically connected to the first voltage line (figures 2, 3, and 4, element GL is the horizontal voltage line extending in a second direction perpendicular to the first direction, and is electrically connected to the first voltage line [VDD] through transistors 130 and 120);
a first electrode included in a third metal layer on the second metal layer, extending in the first direction, and electrically connected to the horizontal voltage line (figures 2, 3, and 4, element 161 is the first electrode of element 160 and is connected to GL through capacitor 150 and transistor 130 and resides in the third metal layer on the second metal layer);
and a second electrode extending parallel to the first electrode included in the third metal layer (figure 4, element 163 is the second electrode in the third metal layer [layer with 161, 162, and 163] and runs parallel to element 161 [first electrode]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application to have modified the teachings of Cha et al as modified with the teachings of Lee et al to form the capacitors within the transistor metal layers to maximize spatial efficiency while maintaining proper function of the transistors.
Claim(s) 5 is rejected under 35 U.S.C. 103 as being unpatentable over Cha et al (US 20210208463), Ogawa (US 20210091260 A1), and Lee et al (US 20210202643 A1) in view of Kwon et al (US 12218300 B2).
Cha et al as modified teaches all of the limitations of the parent claim, claim 4, but does not specifically disclose
[claim 5] The display device of claim 4, further comprising: a third connection electrode included in the second metal layer and electrically connecting the data line and a drain electrode of the second transistor.
However, Kwon et al does teach
[claim 5] The display device of claim 4, further comprising: a third connection electrode included in the second metal layer and electrically connecting the data line and a drain electrode of the second transistor (figures 16 and 17, element Vdata is connected to the drain of element STW1, where the drain is element 109a on figure 17 and is connected to an electrode, element 117a in the second metal layer [second metal layer consisting of 115a, 116a and 117a]).
It would have been obvious to one of ordinary skill in the art at the time of filing to have modified the teachings of Cha et al as modified to incorporate the teachings of Kwon et al in order to connect the switching transistor drain to a data line to turn the drive transistor on in order to emit light through the light emitting diode.
Claim(s) 7 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Cha et al (US 20210208463), Ogawa (US 20210091260 A1), as applied to claim 1 above, and further in view of Park et al (US 11469286 B2).
Cha et al as modified teaches all of the limitations of the parent claim, claim 1, but does not specifically disclose
[claim 7] The display device of claim 1, further comprising: an initialization voltage line included in the first metal layer and extending in the first direction; and a third transistor electrically connecting the initialization voltage line and the source electrode of the first transistor.
However, Park et al does teach
[claim 7] The display device of claim 1, further comprising: an initialization voltage line included in the first metal layer and extending in the first direction (figure 2, element 173 is the initialization voltage line extending in a first direction [vertical up the page, direction DR2]);
and a third transistor electrically connecting the initialization voltage line and the source electrode of the first transistor (figure 1, element T3 connects element INIT to element S1 through element T1).
It would have been obvious to one of ordinary skill in the art at the time of filing to have modified the teachings of Cha et al to incorporate the teachings of Park et al in order to include an initialization voltage line linked up to a transistor so the initialization of the light emitting element may be done in a separate manner than supplying voltage to the entire circuit, and even switched on through a transistor for when initialization needs to take place, saving overall energy usage of the circuit in totality.
Regarding claim 8, Cha et al as modified by Park would include wherein the drain electrode of the third transistor and the capacitor electrode are integral with each other (the combination bring both the drain electrode of the third transistor and the capacitor electrode together to be part of the integrated design of the display device, and, thus, broadly are integral with each other in the display device).
Claim(s) 10, 12-13, 17, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Cha et al (US 20210208463), Ogawa (US 20210091260 A1), and Lee et al (US 20210202643 A1),as applied to claim 9, 11, 16, and 18 above, respectively, and further in view of Choi et al (US 12048213 B2).
Cha et al as modified teaches all of the limitations of the parent claims, claims 9, 11, 16, and 18, but does not specifically disclose
[claim 10] The display device of claim 9, further comprising: a light emitting element; a second voltage line included in the second metal layer and extending in a second direction intersecting the first direction; a first contact electrode included in a fourth metal layer on the third metal layer and electrically connecting the first electrode and the light emitting element; and a second contact electrode included in the fourth metal layer and electrically connecting the light emitting element and the second voltage line.
[claim 12] The display device of claim 11, further comprising: an active extension portion extending from the second capacitor electrode; and a first contact electrode included in a fourth metal layer on the third metal layer and directly connected to the active extension portion.
[claim 13] The display device of claim 12, further comprising: a light emitting element; a second voltage line included in the second metal layer and extending in the second direction; and a second contact electrode included in the fourth metal layer and electrically connecting the light emitting element and the second voltage line.
[claim 17] The display device of claim 16, further comprising: a light emitting element; a second voltage line included in the second metal layer and extending in a second direction intersecting the first direction; a first contact electrode included in a fourth metal layer on the third metal layer and electrically connecting the first electrode and the light emitting element; and a second contact electrode included in the fourth metal layer and electrically connecting the light emitting element and the second voltage line.
[claim 19] The display device of claim 18, further comprising: an active extension portion extending from the second capacitor electrode; and a first contact electrode included in a fourth metal layer on the third metal layer and directly connected to the active extension portion; a light emitting element; a second voltage line included in the second metal layer and extending in the second direction intersecting the first direction; and a second contact electrode included in the fourth metal layer and electrically connecting the light emitting element and the second voltage line.
However, Choi et al does teach
[claim 10] The display device of claim 9, further comprising: a light emitting element; a second voltage line included in the second metal layer and extending in a second direction intersecting the first direction (figures 6, 7A and 7B, col 14 lines 56-67, element VIL is the second voltage line and it extends in a second direction [x-direction] and is located on the second metal layer which corresponds to the layer with the gate insulating layer, element 2141);
a first contact electrode included in a fourth metal layer on the third metal layer and electrically connecting the first electrode and the light emitting element (figure 7B, element 1163 is the first contact electrode, situated in the fourth metal layer which consists of anything in layer containing element 2180, which sits on the third metal layer which consists of element 2150 and other items in said layer);
and a second contact electrode included in the fourth metal layer and electrically connecting the light emitting element and the second voltage line (figure 7B, element 2175 is the second contact electrode residing in the fourth metal layer [anything in layer with element 2180], and connecting the light emitting element [elements 210, 220, and 230/OLED] to the second voltage line [element D6, per figure 6, where D6 and S7 are connected, and S7 is connected to VIL through T7]).
[claim 12] The display device of claim 11, further comprising: an active extension portion extending from the second capacitor electrode (figure 7B, element 1157 which extends from the second capacitor electrode [element G1/CST1]);
and a first contact electrode included in a fourth metal layer on the third metal layer and directly connected to the active extension portion (figure 7B, element 1174 resides in the fourth metal region [region with element 2180] and is in direct contact with the active extension portion [element 1157, extending from CST1/G1]).
[claim 13] The display device of claim 12, further comprising: a light emitting element; a second voltage line included in the second metal layer and extending in the second direction (figures 6, 7A and 7B, col 14 lines 56-67, element VIL is the second voltage line and it extends in a second direction [x-direction] and is located on the second metal layer which corresponds to the layer with the gate insulating layer, element 2141);
and a second contact electrode included in the fourth metal layer and electrically connecting the light emitting element and the second voltage line (figure 7B, element 2175 is the second contact electrode residing in the fourth metal layer [anything in layer with element 2180], and connecting the light emitting element [elements 210, 220, and 230/OLED] to the second voltage line [element D6, per figure 6, where D6 and S7 are connected, and S7 is connected to VIL through T7]).
[claim 17] The display device of claim 16, further comprising: a light emitting element; a second voltage line included in the second metal layer and extending in a second direction intersecting the first direction (figures 6, 7A and 7B, col 14 lines 56-67, element VIL is the second voltage line and it extends in a second direction [x-direction] and is located on the second metal layer which corresponds to the layer with the gate insulating layer, element 2141);
a first contact electrode included in a fourth metal layer on the third metal layer and electrically connecting the first electrode and the light emitting element (figure 7B, element 1163 is the first contact electrode, situated in the fourth metal layer which consists of anything in layer containing element 2180, which sits on the third metal layer which consists of element 2150 and other items in said layer);
and a second contact electrode included in the fourth metal layer and electrically connecting the light emitting element and the second voltage line (figure 7B, element 2175 is the second contact electrode residing in the fourth metal layer [anything in layer with element 2180], and connecting the light emitting element [elements 210, 220, and 230/OLED] to the second voltage line [element D6, per figure 6, where D6 and S7 are connected, and S7 is connected to VIL through T7]).
[claim 19] The display device of claim 18, further comprising: an active extension portion extending from the second capacitor electrode ((figure 7B, element 1157 which extends from the second capacitor electrode [element G1/CST1]);
and a first contact electrode included in a fourth metal layer on the third metal layer and directly connected to the active extension portion (figure 7B, element 1174 resides in the fourth metal region [region with element 2180] and is in direct contact with the active extension portion [element 1157, extending from CST1/G1]);
a light emitting element; a second voltage line included in the second metal layer and extending in the second direction intersecting the first direction (figures 6, 7A and 7B, col 14 lines 56-67, element VIL is the second voltage line and it extends in a second direction [x-direction] and is located on the second metal layer which corresponds to the layer with the gate insulating layer, element 2141);
and a second contact electrode included in the fourth metal layer and electrically connecting the light emitting element and the second voltage line (figure 7B, element 2175 is the second contact electrode residing in the fourth metal layer [anything in layer with element 2180], and connecting the light emitting element [elements 210, 220, and 230/OLED] to the second voltage line [element D6, per figure 6, where D6 and S7 are connected, and S7 is connected to VIL through T7]).
It would have been obvious to one of ordinary skill in the art at the time of filing to have modified the teachings of Cha et al with the teachings of Choi et al in order to connect the light emitting element to a second voltage line, to provide initialization to the light emitting element separate from power supplied to the circuit in order to save total energy consumed by the circuit and maximize efficiency of the energy usage as well as add an additional control measure so as to not turn the light emitting element on when power is supplied to the circuit.
Claim(s) 14 is rejected under 35 U.S.C. 103 as being unpatentable over Cha et al (US 20210208463), Ogawa (US 20210091260 A1), and Lee et al (US 20210202643 A1), as applied to claim 1, and further in view of Kang et al (US 20220149079 A1).
Cha et al teaches all of the limitations of the parent claim, claim 1, but does not specifically disclose
[claim 14] The display device of claim 1, further comprising: a vertical gate line included in the first metal layer and extending in the first direction; a horizontal gate line included in the second metal layer and extending in the second direction intersecting the first direction; and an auxiliary gate line extending from the horizontal gate line in the first direction.
However, Kang et al does teach
[claim 14] The display device of claim 1, further comprising: a vertical gate line included in the first metal layer and extending in the first direction (figures 15 and 18, element GE1 of GP1 is the vertical gate line and it extends into the page which is the first direction, first metal layer defined as the layer between elements GIL and BFL in figure 18);
a horizontal gate line included in the second metal layer and extending in the second direction intersecting the first direction (figure 15 and 18, element VL(VGL) is the horizontal gate line, extending in a second direction is located in a second metal layer [per figure 18] and intersects the first direction [into the page], second metal layer is defined as the layer above the GIL layer in figure 18);
and an auxiliary gate line extending from the horizontal gate line in the first direction (figures 15 and 18, element GE2 extends into the page which is the first direction and is extending from the horizontal gate line [VL]).
It would have been obvious to one of ordinary skill in the art at the time of filing to have modified the teachings of Cha et al to incorporate the teachings of Kang et al in order to connect to separate gate lines to minimize metal deposited on gate lines attaching to any controlling element, creating a grid like structure which maximizes spatial efficiency.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/ANDREW JOHN ZABEL/Examiner, Art Unit 2818
/JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818
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