Prosecution Insights
Last updated: April 19, 2026
Application No. 17/950,120

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

Final Rejection §102
Filed
Sep 22, 2022
Examiner
WRIGHT, TUCKER J
Art Unit
2891
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
UNITED MICROELECTRONICS CORPORATION
OA Round
4 (Final)
79%
Grant Probability
Favorable
5-6
OA Rounds
2y 7m
To Grant
90%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allow Rate
718 granted / 908 resolved
+11.1% vs TC avg
Moderate +11% lift
Without
With
+10.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
35 currently pending
Career history
943
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
44.7%
+4.7% vs TC avg
§102
35.2%
-4.8% vs TC avg
§112
16.7%
-23.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 908 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 6, 8, and 9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen (US Pub. No. 2021/0366786). Regarding claim 1, in FIG. 10B, Chen discloses a semiconductor device, comprising: a substrate (50, paragraph [0014]), having a P-type metal-oxide-semiconductor (50P, paragraph [0018]) transistor region; a first epitaxial layer (70B, paragraph [0038]), disposed on a topmost surface of the substrate, within the PMOS transistor region; a second epitaxial layer (70B associated with 50N) disposed on the substrate, within a N-type metal-oxide-semiconductor (NMOS) transistor region (50N) of the substrate; a first protection layer (70C, paragraph [0038]), disposed on the first epitaxial layer, covering surfaces of the first epitaxial layer which are over the topmost surface of the substrate; a second protection layer (70D) disposed on the second epitaxial layer, covering surfaces of the second epitaxial layer; and a contact etching stop layer (CESL) (74, paragraph [0048]), disposed on the first protection layer, the second protection layer and the substrate, wherein a portion of the first protection layer and the second protection layer disposed on surfaces of the first epitaxial layer and the second epitaxial layer is exposed from the CESL (e.g. within hole 90). Regarding claim 6, in FIG. 10B, Chen discloses that the first protection layer (70C) and the second protection layer (70D) comprise a same thickness (paragraph [0042]). Regarding claim 8, in FIG. 10B, Chen discloses a plurality of fin shaped structures (52, paragraph [0014]) disposed in the substrate and partially protruded from a plane of the substrate, wherein the first epitaxial layer and the second epitaxial layer are respectively disposed on the fin shaped structures. Regarding claim 9, in FIG. 10B, Chen discloses that the second epitaxial layer comprises silicon carbide (SiC), silicon carbide phosphide (SiCP) or silicon phosphide (SiP), and the first epitaxial layer comprises silicon germanium (SiGe), silicon-germanium-boron (SiGeB) or silicon-germanium-tin silicide (SiGeSn) (paragraph [0039]). Allowable Subject Matter Claim 4 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 10, 12-13, and 16-20 are allowed. The following is a statement of reasons for the indication of allowable subject matter: Regarding claims 10, 12-13, and 16-20, the prior art failed to disclose or reasonably suggest the claimed method of fabricating a semiconductor device particularly characterized by forming a second epitaxial layer on the substrate, within a N-type metal-oxide-semiconductor (NMOS) transistor region of the substrate; forming a first protection layer on the first epitaxial layer, covering surfaces of the first epitaxial layer which are over the top surface of the substrate, wherein the forming of the first protection layer further comprising: after forming the first epitaxial layer, performing a first oxidation treatment to form a first oxide layer on the first epitaxial layer; performing an implanting process on the first epitaxial layer; performing a cleaning process, to remove the first oxide layer; and after the cleaning process, performing a second oxidation treatment to form a second oxide layer on the first epitaxial layer; forming a second protection layer on the second epitaxial layer, covering surfaces of the second epitaxial layer. Response to Arguments Applicant's arguments filed 3/11/2026 have been fully considered but they are not persuasive. Applicant’s arguments with respect to claim 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TUCKER J WRIGHT whose telephone number is (571)270-3234. The examiner can normally be reached 8:30am-5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at 571-272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TUCKER J WRIGHT/Primary Examiner, Art Unit 2891
Read full office action

Prosecution Timeline

Sep 22, 2022
Application Filed
Feb 21, 2025
Non-Final Rejection — §102
Apr 17, 2025
Response Filed
Sep 16, 2025
Final Rejection — §102
Nov 02, 2025
Request for Continued Examination
Nov 07, 2025
Response after Non-Final Action
Dec 11, 2025
Non-Final Rejection — §102
Feb 05, 2026
Interview Requested
Feb 23, 2026
Examiner Interview Summary
Feb 23, 2026
Applicant Interview (Telephonic)
Mar 11, 2026
Response Filed
Mar 24, 2026
Final Rejection — §102 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
79%
Grant Probability
90%
With Interview (+10.8%)
2y 7m
Median Time to Grant
High
PTA Risk
Based on 908 resolved cases by this examiner. Grant probability derived from career allow rate.

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