Prosecution Insights
Last updated: April 19, 2026
Application No. 17/954,585

MODELING THERMAL DONOR FORMATION AND TARGET RESISTIVITY FOR SINGLE CRYSTAL SILICON INGOT PRODUCTION

Final Rejection §103§112
Filed
Sep 28, 2022
Examiner
QI, HUA
Art Unit
1714
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Globalwafers Co. Ltd.
OA Round
2 (Final)
55%
Grant Probability
Moderate
3-4
OA Rounds
3y 4m
To Grant
80%
With Interview

Examiner Intelligence

Grants 55% of resolved cases
55%
Career Allow Rate
292 granted / 529 resolved
-9.8% vs TC avg
Strong +24% interview lift
Without
With
+24.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
50 currently pending
Career history
579
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
47.1%
+7.1% vs TC avg
§102
8.6%
-31.4% vs TC avg
§112
35.1%
-4.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 529 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of Claims Claims 1-20 are pending. Claims 1-3, 6-8, 13-16, 19 and 20 are amended. Claim 1 is an independent claim. Claims 1-20 are currently examined on the merits. Specification The specification/amended specification is objected to because of the following informalities: “housing 25” should be replaced with “housing 26” in the entire specification; “port 11” should be replaced with “port 12” in the entire specification. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 2-9 and 19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. The recited in claim 2 “... the subsequent anneal of wafers …the anneal and a length of the anneal …” constitutes an indefinite subject matter. It is not clear whether the “subsequent anneal” is related to or refers to the previously recited “anneal” or not; It is not clear what “a length of the anneal” means, e.g. which anneal is referred. Also, claim 2 recites the limitation "the subsequent anneal". There is insufficient antecedent basis for this limitation in the claim. Therefore, the metes and bounds of claim 2 are not readily ascertainable. Clarification and/or correction are/is required. Claims 3-9 are rejected because they depend on claim 2. The recited in claim 4 “... the anneal …” constitutes an indefinite subject matter.” Parent claims recite “subsequent anneal” and “anneal”; It is not clear which anneal is referred. Therefore, the metes and bounds of claim 4 are not readily ascertainable. Clarification and/or correction are/is required. The recited in claim 5 “... the anneal …” constitutes an indefinite subject matter.” Parent claims recite “subsequent anneal” and “anneal”; It is not clear which anneal is referred. Therefore, the metes and bounds of claim 5 are not readily ascertainable. Clarification and/or correction are/is required. The recited in claim 6 “... the anneal …” constitutes an indefinite subject matter.” Parent claims recite “subsequent anneal” and “anneal”; It is not clear which anneal is referred. Therefore, the metes and bounds of claim 6 are not readily ascertainable. Clarification and/or correction are/is required. The recited in claim 7 “... the anneal …” constitutes an indefinite subject matter.” Parent claims recite “subsequent anneal” and “anneal”; It is not clear which anneal is referred. Therefore, the metes and bounds of claim 7 are not readily ascertainable. Clarification and/or correction are/is required. The recited in claim 8 “... the anneal …” constitutes an indefinite subject matter.” Parent claims recite “subsequent anneal” and “anneal”; It is not clear which anneal is referred. Therefore, the metes and bounds of claim 8 are not readily ascertainable. Clarification and/or correction are/is required. Claim 9 is rejected because it depends on claim 8. The recited in claim 9 “... the device manufacturing process comprises forming an interposer device …” constitutes an indefinite subject matter.” Parent claim 1 is directing to a method for producing a single crystal silicon ingot. It is not clear why/how the device manufacturing process comprising forming an interposer device is related to the instantly claimed method for producing a single crystal silicon ingot, e.g., it is not clear with respect to the boundaries sought for protection. Therefore, the metes and bounds of claim 9 are not readily ascertainable. Clarification and/or correction are/is required. The recited in claim 19 “...a subsequent anneal of wafers … a length of the anneal, and the temperature of the anneal as inputs.” constitutes an indefinite subject matter. It is noted that parent claims already recite “an anneal of wafers”; It is not clear whether the “subsequent anneal of wafers” refers to the previously recited “anneal of wafers” or not. It is not clear what “a length of the anneal” means, for example whether “the anneal refers to “subsequent anneal” or the “anneal” There is insufficient antecedent basis for this limitation in the claim. Therefore, the metes and bounds of claim 19 are not readily ascertainable. Clarification and/or correction are/is required. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1-7 and 15-17 are rejected under 35 U.S.C. 103 as being unpatentable over Caspary et al (US 20170062568 A1, “Caspary”), and further in view of Libbert et al (US 20120238070 A1, “Libbert”) and Hoshi et al (US 20170260645 A1, “Hoshi”). Regarding claim 1, Caspary teaches a method for producing a single crystal silicon ingot from a silicon melt held within a crucible, the method comprising adding polycrystalline silicon to the crucible (0078, 0079); heating the polycrystalline silicon to cause the silicon melt to form in the crucible (0077, 0078); adding a dopant source (first dopant) to the crucible (0078, 0078), the first dopant being comprising phosphorus (n-type) (0078); contacting the melt with a seed crystal (0080); withdrawing the seed crystal from the melt to form the single crystal silicon ingot (0080); and adding a second dopant to the silicon melt while forming the single crystal silicon ingot based on a counter-doping schedule (0067, 0089, 0090, 0093, 0095, 0097-0100, 0101, 0103), the second dopant boron being of a type different from the type of the first dopant for example boron (0067, 0089, 0090, 0093, 0095, 0097-0100, 0101, 0103). Caspary further teaches achieving (determining) a target resistivity for wafers sliced from the single crystal silicon ingot (0007, 0044, 0047-0049, 0028, 0043, 0104, 0105, 0123), and simulating (modeling) a dopant profile of the melt during ingot growth to determine the counter-doping schedule in which at least a portion of the single crystal silicon ingot is within a pre-anneal wafer resistivity target range (figs 9 and 10, 0018, 0019, 0097-0103 and table 1), and the pre-anneal wafer resistivity target range being a resistivity target range of the wafers before the anneal (figs 9 and 10, 0018, 0019, 0097-0103 and table 1), but does not explicitly teach that the post-anneal target resistivity being the target resistivity of the wafers after an anneal of the wafers, and modeling thermal donors generated during the anneal of wafers sliced from the single crystal silicon ingot to determine a pre-anneal wafer resistivity target range. However, Libbert teaches a method of processing silicon wafers, wherein a post-anneal target resistivity is the target resistivity of the wafers after thermal treatment/anneal of the wafers (0040, 0041, 0056, 0065, 0073, 0073,0093-0098), a process of simulating/modeling thermal donors generated during a heat subsequent anneal of wafers sliced from the single crystal silicon ingot is performed and a pre-anneal wafer resistivity target range is determined (0030, 0073, 0095-0098). Therefore, it would have been obvious that one of ordinary skill in the art before the effective filing date of the claimed invention would have modified Caspary per teachings of Libbert in order to manufacture electronic structures in a reliable and cost-efficient manner (Libbert 0006). Caspary/Libbert teaches adding the second dopant as addressed above, but does not explicitly teach the second dopant being added in two or more cycles. However, Hoshi teaches a method of producing a single crystal, wherein a second dopant can be intermittently added (fig 1, 0009, 0013, 0032, 0046, 0046, 0049, 0051). and a pre-anneal wafer resistivity target range is determined (0030, 0073, 0095-0098). Therefore, it would have been obvious that one of ordinary skill in the art before the effective filing date of the claimed invention would have modified Caspary/Libbert per teachings of Hoshi in order to control resistivity with high precision (Hoshi 0001, 0009, 0010 and 0023). Regarding claim 2, Caspary/Libbert/Hoshi teaches modeling thermal donors generated during anneal of wafers sliced from the single crystal silicon ingot as addressed above, and further teaches that modeling/simulating thermal donors generated during a subsequent anneal of wafers sliced from the single crystal silicon ingot comprises inputting the temperature of the anneal and the time (length) of the anneal into the model (Libbert 0095-0098). Regarding claim 3, Caspary/Libbert/Hoshi teaches that modeling thermal donors generated during a subsequent anneal of wafers sliced from the single crystal silicon ingot comprises inputting the oxygen content of the wafer into the model (Libbert 0095-0098). Regarding claim 4, Caspary/Libbert/Hoshi teaches that the anneal is at a temperature range of 350°C and 550°C (Caspary 0047), overlapping the instantly claimed at least 300°C. Overlapping ranges are prima facie obvious. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976) (MPEP 2144.05 I). Regarding claim 5, Caspary/Libbert/Hoshi teaches that the anneal is at a temperature range of 350°C and 550°C (Caspary 0047), overlapping the instantly claimed at least 500°C. Overlapping ranges are prima facie obvious. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976) (MPEP 2144.05 I). Regarding claim 6, Caspary/Libbert/Hoshi teaches that the time (length) of the anneal is in a range of 30 minutes and 20 hours (Caspary 0047), overlapping the instantly claimed at least 5 hours. Overlapping ranges are prima facie obvious. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976) (MPEP 2144.05 I). Regarding claim 7, Caspary/Libbert/Hoshi teaches that the time (length) of the anneal is in a range of 30 minutes and 20 hours (Caspary 0047), overlapping the instantly claimed at least 20 hours. Overlapping ranges are prima facie obvious. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976) (MPEP 2144.05 I). Regarding claim 15, Caspary/Libbert/Hoshi teaches that the single crystal silicon ingot has a constant diameter portion (Caspary Fig 6), and almost an entire ingot along axial (at least 50% of the length of the constant diameter portion) is within the pre-anneal wafer resistivity target range (Caspary Fig 10). Overlapping ranges are prima facie obvious. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976) (MPEP 2144.05 I). Regarding claim 16, Caspary/Libbert/Hoshi teaches that the single crystal silicon ingot has a constant diameter portion (Caspary Fig 6), and almost an entire ingot along axial (at least 95% of the length of the constant diameter portion) is within the pre-anneal wafer resistivity target range (Caspary Fig 10). Overlapping ranges are prima facie obvious. In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976) (MPEP 2144.05 I). Regarding claim 17, Caspary/Libbert/Hoshi teaches that the post-anneal target resistivity comprises a minimum resistivity, maximum resistivity, or a range of resistivity (Caspary 0105). Claims 8 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Caspary/Libbert/Hoshi as applied to claim 2 above, and further in view of Zvi et al (US 20170213821 A1, “Zvi”). Regarding claim 8, Caspary/Libbert/Hoshi teaches the anneal and the wafers sliced from the single crystal silicon ingot as addressed above, but does not explicitly teach that the anneal is part of a device manufacturing process. However, Zvi teaches a method of manufacturing a device, wherein an anneal is performed as part of device manufacturing process (0003, 0021-0023, 0055-0062, 0065, 0068, 0069, 0070-0073, 0107, 0109, 0119, 0120-0123, 0134). Therefore, it would have been obvious that one of ordinary skill in the art before the effective filing date of the claimed invention would have modified Caspary/Libbert/Hoshi per teachings of Zvi in order to fabricate devices with reduced costs and increased yield (Zvi 0020, 0055, 0079). Regarding claim 9, Caspary/Libbert/Hoshi/Zvi teaches the device manufacturing process as addressed above, and further teaches that the device manufacturing process comprises forming an interposer (Zvi 0078, 0079, 0242). Claims 10-14 are rejected under 35 U.S.C. 103 as being unpatentable over Caspary/Libbert/Hoshi as applied to claims 1 and 17 above, and further in view of Phillips et al (US 20180179660 A1, “Phillips”). Regarding claim 10, Caspary/Libbert/Hoshi teaches the dopant is p-type (0029, 0053, 0121, 0123, 0126), but does not explicitly teach that the first dopant is p-type dopant. However, Phillips teaches a method of making crystal, wherein a first dopant comprises p-type (0008, 0034, 0037-0046, 0052). Therefore, it would have been obvious that one of ordinary skill in the art before the effective filing date of the claimed invention would have modified Caspary/Libbert/Hoshi per teachings of Phillips in order to form crystal ingots with improved resistivity control (Phillips 0002). Moreover, it is well-established that selection of any order of performing process steps is prima facie obvious in the absence of new or unexpected results. Exparte Rubin, 128 USPQ 440 (Bd. Pat. App. 1959). Also see MPEP 2144.04 IV C. In general, the transposition of process steps or the splitting of one step into two, where the processes are substantially identical or equivalent in terms of function, manner and result, was held not to patentably distinguish the process (e.g., Exparte Rubin, 128 USPQ 440 (Bd. Pat. App. 1959). See MPEP 2144.04 (IV)(C). Further, it is well-established that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945). MPEP 2144.07. Regarding claim 11, Caspary/Libbert/Hoshi/Phlipps teaches the first dopant being p-type as addressed above, and further teaches boron, aluminum, gallium or indium as p-type dopant (Caspary 0027, 0073, 0074, 0112, 0121; Libbert 0031, Phlipps 0002, 0034, 0039). Further, it is well-established that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945). Also see MPEP 2144.07. Regarding claim 12, Caspary/Libbert/Hoshi/Phlipps teaches the first dopant being p-type as addressed above, and further teaches boron as p-type dopant (Caspary 0027, 0053; Libbert 0031, Phlipps 0002, 0034, 0039). Further, it is well-established that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945). Also see MPEP 2144.07. Regarding claims 13 and 14, Caspary/Libbert/Hoshi/Philipps teaches the second dopant is phosphorus (n-type) (Phillips 0034, 0048). Further, it is well-established that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945). Also see MPEP 2144.07. Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Caspary/ Libbert as applied to claim 17 above, and further in view of Hudson et al (US 20200208294 A1, “Hudson”). Regarding claim 18, Caspary/Libbert/Hoshi does not explicitly teach that the post-anneal target resistivity is at least 300 Ω-cm. However, Hudson teaches a method of making crystal, wherein a post-anneal target resistivity is above 5000 Ω-cm (0087). Therefore, it would have been obvious that one of ordinary skill in the art before the effective filing date of the claimed invention would have modified Caspary/Libbert/Hoshi per teachings of Hudson in order to provide suitable silicon with high resistivity for fabricating devices (Hudson 0002, 0003). Claims 19 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Caspary/Libbert/Hoshi as applied to claim 1 above, and further in view of Kamiura et al (J. Appl. Phys. 65 (2), 15 January 1989, “Kamiura”). Regarding claim 19, Caspary/Libbert/Hoshi modeling the thermal donors generated during a subsequent anneal of wafers sliced from the single crystal silicon ingot to determine a pre-anneal wafer resistivity target range and modelling for determining a pre-anneal wafer resistivity target range of a wafer sliced from the single crystal silicon ingot as addressed above, and further teaches executing the model using the parameters comprising oxygen profile of wafers, time (length) of the anneal, and temperature are modeled (Libbert 0095-0098), but does not explicitly teach storing in the memory of a computer system. However, Kamiura teaches a method of processing wafers sliced from silicon crystal, wherein a computer is used to perform the data acquisition (page 601). Therefore, it would have been obvious that one of ordinary skill in the art before the effective filing date of the claimed invention would have modified Caspary/Libbert/Hoshi per teachings of Kamiura in order to study thermal donors produced on silicon (Kamiura pages 600-604). Also, the court held that broadly providing an automatic or mechanical means to replace a manual activity which accomplished the same result is not sufficient to distinguish over the prior art. In re Venner, 262 F.2d 91, 95, 120 USPQ 193, 194 (CCPA 1958). MPEP 2144.04 III. Regarding claim 20, Caspary/Libbert/Hoshi teaches modeling a dopant profile of the melt during ingot growth to determine a counter-doping schedule in which the single crystal silicon ingot is within the pre-anneal wafer resistivity target range and modelling/simulating for determining a dopant profile of the melt during ingot growth as addressed above, and further teaches executing the model using an initial doping amount of the melt and the pre-anneal wafer resistivity target range (Caspary 0018, 0019, 0078, 0097-0103 and table 1). However, Kamiura teaches a method of processing wafers sliced from silicon crystal, wherein a computer is used to perform the data acquisition (page 601). Therefore, it would have been obvious that one of ordinary skill in the art before the effective filing date of the claimed invention would have modified Caspary/Libbert/Hoshi per teachings of Kamiura in order to study thermal donors produced on silicon (Kamiura pages 600-604). Also, the court held that broadly providing an automatic or mechanical means to replace a manual activity which accomplished the same result is not sufficient to distinguish over the prior art. In re Venner, 262 F.2d 91, 95, 120 USPQ 193, 194 (CCPA 1958). MPEP 2144.04 III. Response to Arguments Applicant's arguments filed 09/23/2025 have been fully considered but they are not persuasive, because the arguments do not apply to the new ground rejection provided above. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Hua Qi whose telephone number is (571)272-3193. The examiner can normally be reached 9am-6pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kaj Olsen can be reached at (571) 272-1344. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HUA QI/ Primary Examiner, Art Unit 1714
Read full office action

Prosecution Timeline

Sep 28, 2022
Application Filed
Jun 18, 2025
Non-Final Rejection — §103, §112
Sep 23, 2025
Response Filed
Jan 25, 2026
Final Rejection — §103, §112 (current)

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Expected OA Rounds
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3y 4m
Median Time to Grant
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