Prosecution Insights
Last updated: July 17, 2026
Application No. 17/968,349

ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF

Non-Final OA §103
Filed
Oct 18, 2022
Priority
Aug 03, 2022 — TW 111129167
Examiner
NGUYEN, THANH T
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Siliconware Precision Industries Co., Ltd.
OA Round
2 (Non-Final)
83%
Grant Probability
Favorable
2-3
OA Rounds
0m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
1171 granted / 1406 resolved
+15.3% vs TC avg
Moderate +14% lift
Without
With
+14.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
16 currently pending
Career history
1441
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
69.6%
+29.6% vs TC avg
§102
16.3%
-23.7% vs TC avg
§112
1.1%
-38.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1406 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Response to Arguments Applicant’s arguments, filed 12/23/25, with respect to the rejection(s) of claim(s) 1-10 under 35 U.S.C. 102 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Chen et al.. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over by Li et al. (CN Patent Publication No.114497008) in view of CHEN et al. (U.S. Patent Publication No. 2024/0038677). Referring to figures 1-30, Li et al. teaches an electronic package, comprising: a carrier structure (2); a plurality of electronic elements (30/31) disposed on and electrically connected to the carrier structure (2); and a shielding structure (40) disposed on the carrier structure (2) and located between any two of the plurality of electronic elements (30/31), wherein the shielding structure (40) is formed with at least one cavity (423) and a plurality of shielding members (41) located on opposite sides of the at least one cavity, such that the plurality of shielding members are located between any two of the plurality of electronic elements (see figures 6-30). However, the reference does not clearly teach the plurality of conductive shielding member. CHEN et al. teaches a semiconductor device package having the plurality of conductive shielding member (110/112/130, see figures 1-10). Therefore, it would have been obvious to a person of ordinary skill in the requisite art at the time of the invention was filed would forming the plurality of conductive shielding member in Li et al. as taught by CHEN et al. because it is known in the semiconductor art to protect the device. Regarding to claim 2, the shielding structure (40) has a plurality of sections with different widths, such that the at least one cavity is formed on a wider one of the plurality of sections (see figures 6, 7). Regarding to claim 4, wherein a top surface of the shielding structure is shaped like an I-shape, a zigzag-like shape, or a shape (see figures 6-30). Regarding to claim 5, wherein a depth of the at least one cavity is less than or equal to a thickness of the shielding structure (see figures 6-30). Regarding to claim 7, further comprising a cladding layer (50) formed on the carrier structure to cover the plurality of electronic elements (30/31) and the shielding structure (40, see figures 6-30). Regarding to claim 8, wherein at least a part of surfaces of the shielding structure (40) is exposed from the cladding layer (50, see figure 24). Regarding to claim 9, a sheltering layer (60) formed on the cladding layer (50, see figure 24). Regarding to claim 10, the at least one cavity is opened toward the carrier structure and/or the at least one cavity is formed on a top surface of the shielding structure (see figures 6-10). However, the reference does not clearly teach the width of the wider one of the plurality of sections is at most ten times greater than a width of a narrower one of the plurality of sections (in claim 3), wherein a depth of the at least one cavity is 1/5 to 4/5 of a thickness of the shielding structure (in claim 6). In re claims 3, 6, the width of the wider one of the plurality of sections and a depth of the at least one cavity are obvious because it is a matter of determining optimum process condition by routine experimentation with a limited number of species. ln re Jones, 162 USPQ 224 (CCPA 1955)(the selection of optimum ranges within prior art general conditions is obvious) and In re Boesch, 205 USPQ 215 (CCPA 1980)(discovery of optimum value of result effective variable in a known process is obvious). In such a situation, applicant must show that the particular range is critical, generally by showing that the claimed range achieves unexpected results relative to prior art range. See M.P.E.P 2144.05 III. In particular, Li et al. suggest that the width of the wider one of the plurality of sections and a depth of the at least one cavity can be optimized (see figures 6-30). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to provide the specific width of the wider one of the plurality of sections and a depth of the at least one cavity in Li et al. because choosing an optimum width and depth for a structure is known in the semiconductor art to form a layer with desired conductivity. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Thanh Nguyen whose telephone number is (571) 272-1695, or by Email via address Thanh.Nguyen@uspto.gov. The examiner can normally be reached on Monday-Thursday from 6:00AM to 3:30PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Yara Green, can be reached on (571) 270-3035. The fax phone number for this Group is (571) 273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pairdirect.uspto.gov. Should you have questions on access to thy Private PAIR system, contact the Electronic Business center (EBC) at 866-217-9197 (toll-free). /THANH T NGUYEN/Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Oct 18, 2022
Application Filed
Sep 26, 2025
Non-Final Rejection mailed — §103
Dec 23, 2025
Response Filed
Apr 03, 2026
Final Rejection mailed — §103
Jul 02, 2026
Request for Continued Examination
Jul 08, 2026
Response after Non-Final Action

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

2-3
Expected OA Rounds
83%
Grant Probability
97%
With Interview (+14.0%)
2y 9m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 1406 resolved cases by this examiner. Grant probability derived from career allowance rate.

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