DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 3/13/2026 has been entered.
Status of the Application
Acknowledgement is made of the amendment received on 3/13/206. Claims 1-20 are pending in this application. Claim 1 is amended. Claim 14-20 are previously withdrawn.
Priority
Acknowledgment is made of applicant's claim for foreign priority based on an application KR 10-2022-0025990 filed in Ministry of Intellectual Property (MOIP) on 2/28/2022 and receipt of a certified copy thereof.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, and 9-13 are rejected under 35 U.S.C. 103 as being unpatentable over Fujiyoshi et al. (JP 2015-72361; hereinafter ‘Fujiyoshi’) in view of Nakagawa et al. (US 2018/0259818; hereinafter ‘Nakagawa’), Hatada et al. (US 4959590; hereinafter ‘Hatada’), and Bibl et al. (US 2016/0259368; hereinafter ‘Bibl’).
Regarding claim 1, Fujiyoshi teaches a display device (FIG. 9c, [0033]) comprising:
a substrate (21, [0040]);
a first barrier insulating layer (18, [0036]) disposed on a bottom surface of the substrate (the surface of 21 facing 20, [0040]) and including a first contact hole (13, FIG. 5c, [0034]);
a first metal layer (19b and 19c, [0037]) disposed between the substrate (21) and the first barrier insulating layer (18), the first metal layer (19b and 19c) including:
a protruding part (a protruding part of 19b in contact with 31 at its bottom surface, [0037]; hereinafter referred to as ‘PP’) inserted in the first contact hole (13) to protrude from below the first barrier insulating layer (18), and
a recessed part (a recessed part of 19b located inward of PP, spaced apart from the contact interface; hereinafter referred to as ‘RP’) formed in the first contact hole (13);
a second metal layer (24) disposed on an upper surface of the substrate (the surface of 21 facing 22, [0041]) and inserted in a second contact hole (a recessed part in which 24 is disposed, FIG. 7b, [0039]) in the substrate (21) to be connected to the first metal layer (19b and 19c);
a thin-film transistor (TFT, [0035]) including an active layer (15) and a third metal layer (17) overlapping the active layer (15); and
a flexible film (31) disposed below the first barrier insulating layer (18).
Fujiyoshi does not teach the display device comprising the thin-film transistor on the upper surface of the substrate and a flexible film including a lead electrode electrically connected to the protruding part of the first metal layer.
Nakagawa teaches a display device (LCD, FIG. 12, [0060, 0065]) comprising the thin-film transistor (TFT1, [0061]) on the upper surface of the substrate (the surface of SUB2 facing TFT1).
As taught by Nakagawa, one of ordinary skill in the art would utilize and modify the above teaching into Fujiyoshi to obtain and achieve the display device comprising the thin-film transistor on the upper surface of the substrate as claimed, because the relative vertical placement of the TFT with respect to the substrate does not affect its operation, and the TFT is interchangeably located on either the observer-side or backlight-side substrate while providing the same pixel-switching function [0060-0061. Further, it has been held that that rearranging part of an invention involves only routine skill in the art. In re Japikse, 86 USPQ 70.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Nakagawa in combination with Fujiyoshi due to above reason.
Fujiyoshi in view of Nakagawa does not teach the display device comprising a flexible film including a lead electrode electrically connected to the protruding part of the first metal layer.
Hatada teaches a display device (10, FIG. 1, col. 2, lines 57-58) comprising a flexible film (20, col. 3, line 1) including a lead electrode (24b, col. 3, line 11) electrically connected to the protruding part of the first metal layer (14, col. 3, lines 12-13).
As taught by Hatada, one of ordinary skill in the art would utilize and modify the above teaching into Fujiyoshi in view of Nakagawa to obtain and achieve the display device comprising a flexible film including a lead electrode electrically connected to the protruding part of the first metal layer as claimed, because reducing the number of connections by directly mounting the semiconductor device onto a flexible film with leads and connecting them to the electrodes of the display panel enhances reliability and reduces manufacturing costs (col. 1, lines 48-54).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Hatada in combination with Fujiyoshi in view of Nakagawa due to above reason.
Fujiyoshi in view of Nakagawa and Hatada does not teach the display device wherein the second metal layer is disposed below the thin-film transistor.
Bibl teaches a display device (315, FIG. 6A, [0063]) wherein the second metal layer is disposed below the thin-film transistor (wiring layer 212, corresponding to the second metal layer because it is disposed on the front-side surface of display substrate 202 and connected to through via 204, is positioned below the corresponding TFT working circuitry 316 of the TFT backplane, FIGS. 2A and 6A, [0050, 0057, 0063]).
As taught by Bibl, one of ordinary skill in the art would utilize and modify the above teaching into Fujiyoshi in view of Nakagawa and Hatada to obtain and achieve the display device wherein the second metal layer is disposed below the thin-film transistor as claimed, because an interconnection arrangement provides shorter electrical interconnections and reduces the overall size of the display module [0040-0042]
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Bibl in combination with Fujiyoshi in view of Nakagawa and Hatada due to above reason.
Regarding claim 3, Fujiyoshi in view of Nakagawa, Hatada, and Bibl teaches the display device of claim 1, further comprising a filler part (Fujiyoshi: 20, FIG. 9c, [0040]) filling the recessed part of the first metal layer (shown in FIG. 9c).
Regarding claim 9, Fujiyoshi in view of Nakagawa, Hatada, and Bibl teaches the display device of claim 1, wherein the flexible film provides a data voltage, a power supply voltage, or a gate signal to the thin-film transistor through the first metal layer (Fujiyoshi: 31 controls the switching of the TFT, [0031]).
Regarding claim 10, Fujiyoshi in view of Nakagawa, Hatada, and Bibl teaches the display device of claim 9, further comprising a display driver mounted on the flexible film and providing the data voltage, the power supply voltage, or the gate signal (Fujiyoshi: driver IC or the drive circuit board is mounted on 31, [0031]).
Regarding claim 11, Fujiyoshi in view of Nakagawa, Hatada, and Bibl teaches the display device of claim 1, wherein
the second metal layer includes a connecting line and a voltage line (Fujiyoshi: pixel electrode 24 corresponds to the voltage line, [0041]), and
the voltage line is electrically connected to the thin-film transistor (24 is electrically connected to the TFT via 22, FIG. 9a).
Regarding claim 12, Fujiyoshi in view of Nakagawa, Hatada, and Bibl teaches the display device of claim 1, further comprising a fourth metal layer (Fujiyoshi: 22, [0041]) disposed on the third metal layer (shown in FIG. 9a), wherein
the fourth metal layer include a first connecting electrode (22 is a common electrode),
an end of the first connecting electrode is connected to the voltage line (the left end of 22 is connected the pixel electrode 24), and
another end of the first connecting electrode is connected to the thin-film transistor (the right end of 22 is connected to TFT).
Regarding claim 13, Fujiyoshi in view of Nakagawa, Hatada, and Bibl teaches the display device of claim 12, further comprising a light-emitting element layer (Fujiyoshi: 35, FIG. 10a, [0046]) disposed on the fourth metal layer (shown in FIG. 10a), wherein
the fourth metal layer further includes a second connecting electrode (22 is used as a cathode electrode for 35), and
the light-emitting element layer comprises:
a first electrode (cathode electrode of 35) connected to the second connecting electrode (22 is used as the cathode electrode for 35);
a second electrode (36 is an anode electrode of 35) spaced apart from the first electrode (shown in FIG. 10a); and
light-emitting elements aligned between the first and second electrodes and electrically connected between the first and second electrodes (35 is sandwiched between 22 and 36 and electrically connected between 22 and 36).
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Fujiyoshi (JP 2015-72361) in view of Nakagawa (US 2018/0259818), Hatada (US 4959590), and Bibl (US 2016/0259368), and further in view of Kim et al. (US 2019/0075656; hereinafter ‘Kim’).
Regarding claim 2, Fujiyoshi in view of Nakagawa, Hatada, and Bibl teaches the display device of claim 1, but does not teach the display device further comprising an adhesive part having an insulating property and attaching the flexible film to a bottom surface of the first barrier insulating layer.
Kim teaches a display device (100, FIG. 4A, [0062]) further comprising an adhesive part (160, [0060]) having an insulating property (160 is non-conductive material, [0073]) and attaching the flexible film to a bottom surface of the first barrier insulating layer (160 attaching 110 to a bottom surface of 150).
As taught by Kim, one of ordinary skill in the art would utilize and modify the above teaching into Fujiyoshi in view of Nakagawa, Hatada, and Bibl to obtain and achieve the display device further comprising an adhesive part having an insulating property and attaching the flexible film to a bottom surface of the first barrier insulating layer as claimed, because the adhesive part performs well-known functions such as adhesion, insulation, and mechanical protection in semiconductor packages, especially in flexible chip-on-film structures [0072-0074].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Kim in combination with Fujiyoshi in view of Nakagawa, Hatada, and Bibl due to above reason.
Claims 4-5 are rejected under 35 U.S.C. 103 as being unpatentable over Fujiyoshi (JP 2015-72361) in view of Nakagawa (US 2018/0259818), Hatada (US 4959590), and Bibl (US 2016/0259368), and further in view of Cho et al. (US 2022/0013576; hereinafter ‘Cho’).
Regarding claim 4, Fujiyoshi in view of Nakagawa, Hatada, and Bibl teaches the display device of claim 3, but does not teach the display device wherein the filler part includes an organic material or photoresist.
Cho teaches a display device (10, FIG. 8, [0175]) wherein the filler part (FIL, [0176]) includes an organic material or photoresist (FIL includes an organic material, [0183]).
As taught by Cho, one of ordinary skill in the art would utilize and modify the above teaching into Fujiyoshi in view of Nakagawa, Hatada, and Bibl to obtain and achieve the display device display device wherein the filler part includes an organic material or photoresist as claimed, because the use of organic material in the filler part offers suitable flowability and process compatibility to achieve effective planarization [0204-0205].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Cho in combination with Fujiyoshi in view of Nakagawa, Hatada, and Bibl due to above reason.
Regarding claim 5, Fujiyoshi in view of Nakagawa, Hatada, and Bibl teaches the display device of claim 3, but does not teach the display device further comprising a second barrier insulating layer disposed on the first barrier insulating layer, the first metal layer, and the filler part.
Cho teaches a display device (10, FIG. 8, [0176]) further comprising a second barrier insulating layer (BF, [0182, 0185]) disposed on the first barrier insulating layer (SUB, [0177]), the first metal layer (CWL1), and the filler part (FIL).
As taught by Cho, one of ordinary skill in the art would utilize and modify the above teaching into Fujiyoshi in view of Nakagawa, Hatada, and Bibl to obtain and achieve the display device further comprising a second barrier insulating layer disposed on the first barrier insulating layer, the first metal layer, and the filler part as claimed, because this configuration is a deliberate design choice to achieve planarization of uneven topographies, protect underlying conductive structures from environmental exposure, and facilitate reliable formation of subsequent layers with reduce thickness and improved uniformity [0185, 0204-0205].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Cho in combination with Fujiyoshi in view of Nakagawa, Hatada, and Bibl due to above reason.
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Fujiyoshi (JP 2015-72361) in view of Nakagawa (US 2018/0259818), Hatada (US 4959590), and Bibl (US 2016/0259368), and further in view of Kim et al. (US 2022/0052078; hereinafter ‘Kim078’).
Regarding claim 6, Fujiyoshi in view of Nakagawa, Hatada, and Bibl teaches the display device of claim 1, but does not teach the display device wherein the first barrier insulating layer includes a plurality of first contact holes, the first metal layer includes a plurality of protruding parts inserted in each of the plurality of first contact holes, and the lead electrode is in direct contact with the plurality of protruding parts.
Kim078 teaches a display device (TD, FIG. 8, [0147]) wherein
the first barrier insulating layer (BR, [0149]) includes a plurality of first contact holes (CNT1 and CNT3, [0153]),
the first metal layer (CWL1) includes a plurality of protruding parts inserted in each of the plurality of first contact holes (shown in FIG. 6), and
the lead electrode (LDL, [0164]) is in direct contact with the plurality of protruding parts (shown in FIG. 6).
As taught by Kim078, one of ordinary skill in the art would utilize and modify the above teaching into Fujiyoshi in view of Nakagawa, Hatada, and Bibl to obtain and achieve the display device wherein the first barrier insulating layer includes a plurality of first contact holes, the first metal layer includes a plurality of protruding parts inserted in each of the plurality of first contact holes, and the lead electrode is in direct contact with the plurality of protruding parts as claimed, because splitting the electrical path through the plurality of contact holes enables compact vertical routing via and lead line, minimizing bezel width and interference while enhancing process stability and seamless module integration [0151, 0162].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Kim078 in combination with Fujiyoshi in view of Nakagawa, Hatada, and Bibl due to above reason.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Fujiyoshi (JP 2015-72361) in view of Nakagawa (US 2018/0259818), Hatada (US 4959590), and Bibl (US 2016/0259368), and further in view of Oh et al. (US 2020/0203462; hereinafter ‘Oh’).
Regarding claim 7, Fujiyoshi in view of Nakagawa, Hatada, Bibl, and Kim078 teaches the display device of claim 6, the display device wherein each of the plurality of protruding parts (Fujiyoshi: the portion of 19b protrudes from 18, FIG. 9(a)) has short sides in a first direction (short in the lateral direction) and long sides in a second direction intersecting the first direction (long side in the thickness direction).
Fujiyoshi in view of Nakagawa, Hatada, Bibl, and Kim078 does not teach the display device wherein the plurality of protruding parts are spaced apart from each other in the first direction.
Oh teaches a display device (FIG. 2, [0032]) wherein the plurality of protruding parts (the portion of 102, 160, and 170 protrudes from 101, [0043-0044]) are spaced apart from each other in the first direction (shown in FIG. 2).
As taught by Oh, one of ordinary skill in the art would utilize and modify the above teaching into Fujiyoshi in view of Nakagawa, Hatada, Bibl, and Kim078 to obtain and achieve the display device wherein the plurality of protruding parts are spaced apart from each other in the first direction as claimed, because the lateral distribution multiple conductive connectors enables high-resolution implementation, improves contact reliability, and prevents stress-induced cracking without requiring bending [0045, 0083].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Oh in combination with Fujiyoshi in view of Nakagawa, Hatada, Bibl, and Kim078 due to above reason.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Fujiyoshi (JP 2015-72361) in view of Nakagawa (US 2018/0259818), Hatada (US 4959590), and Bibl (US 2016/0259368), and further in view of Chen et al. (US 2007/0039706; hereinafter ‘Chen’) and Lin et al. (US 2006/0063378; hereinafter ‘Lin’).
Regarding claim 8, Fujiyoshi in view of Nakagawa, Hatada, and Bibl teaches the display device of claim 1, but does not teach the display device wherein the first metal layer includes a fan-out line, the fan-out line includes: a lower fan-out line disposed on the first barrier insulating layer, and an upper fan-out line disposed on the lower fan-out line, and a thickness of the upper fan-out line is greater than a thickness of the lower fan-out line.
Chen teaches a display device (Fig. 5, [0035]) wherein
the first metal layer (518) includes a fan-out line (the left portion of M1 is connected 508),
the fan-out line includes:
a lower fan-out line (a lower 518; 418 of the multi-stack structure 408b, Fig. 4B, [0032]) disposed on the first barrier insulating layer (a lower disposed on silicon nitride), and
an upper fan-out line (an upper 518; 428 of the multi-stack structure 408b) disposed on the lower fan-out line (shown in Fig. 4B).
As taught by Chen, one of ordinary skill in the art would utilize and modify the above teaching into Fujiyoshi in view of Nakagawa, Hatada, and Bibl to obtain and achieve the display device wherein the first metal layer includes a fan-out line, the fan-out line includes: a lower fan-out line disposed on the first barrier insulating layer, and an upper fan-out line disposed on the lower fan-out line, and a thickness of the upper fan-out line is greater than a thickness of the lower fan-out line as claimed, because vertically stacking wires on different metal layers increases routing density in limited fan-out areas [0032-0033].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Chen in combination with Fujiyoshi in view of Nakagawa, Hatada, and Bibl due to above reason.
Fujiyoshi in view of Nakagawa, Hatada, Bibl, and Chen does not teach the display device wherein a thickness of the upper fan-out line is greater than a thickness of the lower fan-out line.
Lin teaches a device (FIG. 3g, [0029-0030]) wherein a thickness of the upper interconnect line (204, [0059]) is greater (shown in FIG. 3g) than a thickness of the lower conductive line (202).
Although, Lin does not explicitly teach a fan-out line in the context of a display device.
Lin, however, disclosed multilayer interconnect structure-with a thicker upper metal line formed over a thinner lower line-provides a functionally equivalent wiring scheme, satisfying the claimed configuration of differential thickness between metal lines within a signal routing structure [0031].
As taught by Lin, one of ordinary skill in the art would utilize and modify the above teaching into Fujiyoshi in view of Nakagawa, Hatada, Bibl, and Chen to obtain and achieve the display device wherein a thickness of the upper fan-out line is greater than a thickness of the lower fan-out line as claimed, because the use of a thicker upper metal line provides a low-resistance conductive path in a multilayer interconnect structure formed over a lower wiring layer, a configuration often employed to overcome routing limitations and to achieve signal connectivity and space optimization [0031-0032].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Lin in combination with Fujiyoshi in view of Nakagawa, Hatada, Bibl, and Chen due to above reason.
Response to Arguments
Applicant’s arguments with respect to claims have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
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/JIYOUNG OH/Examiner, Art Unit 2818
/DUY T NGUYEN/Primary Examiner, Art Unit 2818 7/27/26