Detailed Action
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 3/10/2026 has been entered.
Status of Claims
The following status of the claims reflects the entry of the amendment filed on 3/10/2026, submitted with the RCE.
Claims 1-20 are currently pending.
Claims 1, 11, and 16 have been amended.
Claims 1-20 have been examined.
Response to Arguments
Applicant's arguments filed 3/10/2026, starting on page 8, have been fully considered but they are not persuasive. In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986).
Applicant argues that:
Hatem does not teach performing a hydrogen plasma clean at 3-30 eV immediately preceding dopant layer formation, nor forming a 1-7 nm dopant layer that is subsequently implanted at <7 keV so that the implant range exceeds the film thickness.
Seebauer does not teach a hydrogen plasma clean performed at 3-30 eV and room temperature to 100 0C.
Wood does not teach intentionally directing ions at 3-30 eV or forming a dopant layer of 1-7 nm thickness that is subsequently implanted at <7 keV so that the implant range exceeds the layer thickness.
Sharma does not teach the claimed plasma clean energy range, the 1-7 nm dopant layer thickness limitation, nor the implantation energy constraint of <7 keV in combination with the implant range exceeding the film thickness.
Olander does not teach a multiprocess sequence including low-energy hydrogen plasma clean, ultra-thin dopant layer deposition, and immediate implantation under continuous vacuum conditions or the thickness and implantation energy interplay now explicitly recited.
Within Final Office Action dated 12/05/2025, the Examiner agrees:
Hatem does not teach performing a hydrogen plasma clean at 3-30 eV immediately preceding dopant layer formation.
Seebauer does not teach a hydrogen plasma clean performed at 3-30 eV and room temperature to 100 0C.
Wood does not teach ions at 3-30 eV or forming a dopant layer of 1-7 nm thickness that is subsequently implanted at <7 keV so that the implant range exceeds the layer thickness.
Sharma does not teach the claimed plasma clean energy range, the 1-7 nm dopant layer thickness limitation, nor the implantation energy constraint of <7 keV in combination with the implant range exceeding the film thickness.
Olander on its own does not teach a multiprocess sequence including low-energy hydrogen plasma clean, ultra-thin dopant layer deposition, and immediate implantation under continuous vacuum conditions or the thickness and implantation energy interplay now explicitly recited.
Examiner uses Hatem in combination of other art cited in the action to teach the dopant layer comprising a thickness of 1 nm to 7 nm before implant process and that the implant range for the ion species is greater than the thickness of the dopant layer before the implant process. See page. 19 of the Final Office Action dated 12/05/2025.
Examiner uses a combination of art with Wood to teach the plasma clean comprises generating a hydrogen species in a plasma chamber and directing the hydrogen species to the substrate surface when the semiconductor substrate is at a cleaning temperature between room temperature and 1000C starting on page 13 of Final Office Action with motivation to combine provided on page 14. To clarify one of ordinary skill in the art would know by Fig. 2A that Wood directs the ions from the remote zone 30 where the cleaning glass is ionized to a processing zone 108. (Wood, Fig. 2A, [0033].)
Examiner uses a combination of art with Seebauer to teach the ion implantation energy of less thank 7kEV on page 22. Motivation to combine Seebauer early in the final office action on page 5.
Examiner uses a combination of art with Olander to teach the ions having a cleaning energy of 3eV and 30eV on page 13. The motivation of using a cleaning energy of less than 100 eV is provided on page 6. Therefore in combination with the other art cited a multiprocess sequence including low-energy hydrogen plasma clean, ultra-thin dopant layer deposition, and immediate implantation under continuous vacuum conditions or the thickness and implantation energy interplay now explicitly recited would be considered obvious.
Examiner uses a combination of art with Sharma to teach a cyclic process that would result in enhancing conformality of the doping process in the Final Office Action on page 23 with the motivation for combining also on page 23.
Additionally, with the above combinations in mind, it seems Applicant does not provide any additional specific arguments as to why any particular combination would be non-obvious or why any particular combination would not be reasonable.
Claim Objections
Claims 1, 3, and 8 are objected to because of the following informalities:
Claim 1 appears to have a typo in which “100 eVU” should read “100 eV”.
Appropriate correction is required.
Claim 3 is objected to because the majority of the limitations are word for word repeated from claim 1 on which it depends. Therefore while it does not currently rise to the level of a 112 rejection the claim, cleanup of the claim language is heavily suggested so that it does not include in duplicate limitations.
Claim 8 is objected to because the majority of the limitations are word for word repeated from claim 1 on which it depends. Therefore while it does not currently rise to the level of a 112 rejection the claim, cleanup of the claim language is heavily suggested so that it does not include in duplicate limitations.
Claim 12 is objected to because the majority of the limitations are word for word repeated from claim 11 on which it depends. Therefore while it does not currently rise to the level of a 112 rejection the claim, cleanup of the claim language is heavily suggested so that it does not include in duplicate limitations.
Claim 18 is objected to because the majority of the limitations are word for word repeated from claim 16 on which it depends. Therefore while it does not currently rise to the level of a 112 rejection the claim, cleanup of the claim language is heavily suggested so that it does not include in duplicate limitations.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(d):
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph:
Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claims 7, 9, 15 and 19 are rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends.
Regarding claim 7, the claim recites word for word language that was included in claim 1 on which it depends and does not further limit the subject matter of the claim 4 on which it depends.
Regarding claim 9, the claim recites word for word language that was included in claim 1 on which it depends and does not further limit the subject matter of the claim 7 on which it depends.
Regarding claim 15, the claim recites word for word language that was included in claim 11 on which it depend and does not further limit the subject matter of the claim 11 on which it depends.
Regarding claim 19, the claim recites word for word language that was included in claim 16 on which it depends and does not further limit the subject matter of the claim 16 on which it depends.
Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements.
Claim interpretation
Claims 1-3, 10-12, 16-17, and 20 use the term “plasma clean” is described within the specification as where the native oxide is removed from the surface of the substrate. See specification paragraph [0006].
Claims 3-4, 12-13, and 18 use the term “room temperature” is defined by Merriam-Websters dictionary as “a comfortable temperature that is not too hot or too cold”. A range of temperatures can be counted as room temperature, for example in a medical setting the room temperature can be from 15°C to 25 °C (Merriam-Websters dictionary website, last updated 25 May 2025). American Heritage Dictionary of the English Language, room temperature is 20–22 °C. The Oxford English Dictionary states room temperature is around 20 °C. Room temperature is not defined by the specification as one set temperature or a range of temperatures, therefore for the purposes of examination room temperature will be considered to be any temperature between 15°C to 25 °C as that the broadest ranges of possible temperatures that could be meant by the Applicant.
Claims 6 and 14 use the term “several” is not clearly defined by the specification as to what range counts as several. The term several has a plain mean of more than one (Merriam Websters Dictionary). Therefore an energy value of ‘several eV and several tens of eV’ will be considered to be at least 2eV to 19eV.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-3, 11-12, 15-17, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Hatem et al. US 20180240670 A1 (hereinafter Hatem), Seebauer et al. US 20060024928 A1 (hereinafter Seebauer), Gottlieb S. Oehrlein et al. “Foundations of low-temperature plasma enhanced materials synthesis and etching” 2018 Plasma Sources Sci. Technol. 27 (hereinafter Oehrlein), and Wood et al. US 20040219789 A1 (hereinafter Wood).
Regarding claim 1, Hatem discloses:
A method of doping a semiconductor substrate (Hatem, Abstract: method of doping a substrate), comprising:
exposing a substrate (substrate 102) surface of the semiconductor substrate ([0017]) to a plasma clean; (Claim 10: cleaning the substrate in an etch chamber)
performing a deposition of a dopant layer (surface 110) on the substrate surface using a plasma source (Claim 10: depositing a dopant on the substate, and [0042] the implant chamber including a plasma generator.), after the plasma clean ([0041], the plasma clean occurs before the deposition step), the dopant layer comprising a dopant element (doping layer 122 including boron [0022])
…
wherein the semiconductor substrate is maintained under vacuum over a process duration spanning the plasma clean, the deposition of the dopant layer (Fig. 5, [0041], individual operations may be performed under vacuum)
…
wherein the dopant layer comprises a thickness of 1 nm to 7 nm before the implant process. (Hatem, [0022], the doping layer 122 is between .01nm to 3nm thick.)
…
an implant range for the ion species is greater than the thickness of the dopant layer before the implant process. (Hatem, [0022], the target region of the substrate is 10nm thick.)
Hatem appears to be silent on “exposing the semiconductor substrate to an implant process when the dopant layer is disposed on the substrate surface,
wherein the implant process introduces an ion species comprising the dopant element into the semiconductor substrate,
wherein the semiconductor substrate is maintained under vacuum over a process duration spanning the …, and the implant process,
wherein at least a portion of the dopant layer is implanted into the semiconductor substrate during the implant process, and…
wherein the plasma clean comprises generating a hydrogen species in a plasma chamber and directing the hydrogen species to the substrate surface when the semiconductor substrate is at a cleaning temperature between room temperature and 1000C, the ions having a cleaning energy between 3 eV and 30 eV…
wherein the ion species comprises an ion implantation energy of less than 7 keV.”
However, Seebauer, which teaches ultra-shallow doped semiconductor (Seebauer, Abstract), discloses:
exposing the semiconductor substrate to an implant process when the dopant layer is disposed on the semiconductor substrate surface, (Seebauer, Fig. 2A, [0071])
wherein the implant process introduces an ion species comprising the dopant element into the semiconductor substrate, ([0071], the semiconductor is implanted with a dopant, such as boron into the substrate)
wherein the substrate is maintained under vacuum over a process duration spanning the … the implant process, ([0114], the working example of the process was performed under ultra-high vacuum)
wherein at least a portion of the dopant layer is implanted into the semiconductor substrate during the implant process, and ([0071], the dopant is implanted into the substrate in an ultra-shallow doped semiconductor layer)
…
wherein the ion species comprises an ion implantation energy of less than 7 keV. (Seebauer, [0100], discloses the ion implantation of an ion species at 2 keV.)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hatem to have exposing the semiconductor substrate to an implant process when the dopant layer is disposed on the substrate surface, wherein the implant process introduces an ion species comprising the dopant element into the semiconductor substrate, wherein the semiconductor substrate is maintained under vacuum over a process duration spanning the plasma clean, the deposition of the dopant layer, and the implant process, and wherein at least a portion of the dopant layer is implanted into the semiconductor substrate during the implant, and the ion species comprises an ion implantation energy of less than 7 keV process as taught by Seebauer for purposes of doping the semiconductor surface to a preferred concentration depth profile. (Seebauer, [0071])
Hatem and Seebauer do not appear to disclose “wherein the plasma clean further includes directing ions to the substrate surface where the ions have a cleaning energy of less than 100 eV” and “wherein the plasma clean comprises generating a hydrogen species in a plasma chamber and directing the hydrogen species to the substrate surface when the semiconductor substrate is at a cleaning temperature between room temperature and 1000C, the ions have a cleaning energy between 3 eV and 30 eV.”
However, Oehrlein which teaches method of plasma cleaning of surfaces at low temperatures (Oehrlein, Abstract), discloses:
wherein the plasma clean further includes directing ions to the substrate surface where the ions have a cleaning energy of less than 100 eV. (Oehrlein, page 15, last full paragraph, cleaning SiO2 (a native oxide of Si) a low energy Ar+ ion bombardment with a maximum ion energy of 20 eV may be used)
… the ions have a cleaning energy between 3 eV and 30 eV. (Oehrlein, page 15, last full paragraph, (a native oxide of Si) a low energy Ar+ ion bombardment with a maximum ion energy of 20 eV may be used. Therefore between 3 eV and 30eV.)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hatem and Seebauer to have the plasma clean further includes directing ions to the substrate surface where the ions have a cleaning energy of less than 100 eV and having the cleaning energy between 3 eV and 30 eV as taught by Oehrlein for purposes of etching (cleaning) the surface SiO2. (Oehrlein, page 15 last full paragraph.)
Hatem, Seebauer, and Oehrlein do not appear to disclose “wherein the plasma clean comprises generating a hydrogen species in a plasma chamber and directing the hydrogen species to the substrate surface when the semiconductor substrate is at a cleaning temperature between room temperature and 1000C.”
Wood, which teaches cleaning a semiconductor substrate by using a hydrogen-contain gas, discloses:
the plasma clean (Wood, cleaning method of Figs. 1A-1D that can be performed in the apparatus of Fig. 2A-2B) comprises generating a hydrogen species ([0029], cleaning gas comprising hydrogen-containing radicals) in a plasma chamber (Fig. 2A, cleaning chamber 106a); and
directing the hydrogen species ([0029], hydrogen-containing gas) to the substrate surface (Fig. 1A substrate 10) when the semiconductor substrate is at a cleaning temperature between room temperature and 100 °C, ([0011], substrate maintained at about 100 °C)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hatem, Seebauer, and Oehrlein to have the plasma clean is completed by generating a hydrogen species in a plasma chamber, and directing the hydrogen species to the substrate surface when the semiconductor substrate is at a cleaning temperature between room temperature and 100 °C as taught by Wood for purposes of preventing damage to the structure of the device. (Wood, [0029].)
Regarding claim 2, Hatem, Seebauer, Oehrlein, and Wood disclose all the elements of claim 1, as disclosed above.
Hatem further discloses:
the substrate surface includes a native oxide ([0018], the surface layer 104 may be a native oxide), before the plasma clean ([0018] and [0019], the surface oxide 104 is etched before the implantation operation), and wherein the native oxide is removed after the plasma clean. ([0018], The duration of the exposure may be adequate to remove the surface layer 104.)
Regarding claim 3, Hatem, Seebauer, Oehrlein, and Wood disclose all the elements of claim 1, as disclosed above.
Oehrlein further discloses:
wherein the ions have a cleaning energy between 3 eV and 30 eV. (Oehrlein, page 15, last full paragraph, (a native oxide of Si) a low energy Ar+ ion bombardment with a maximum ion energy of 20 eV may be used. Therefore between 3 eV and 30eV.)
Wood further disclose:
wherein the plasma clean (Wood, cleaning method of Figs. 1A-1D that can be performed in the apparatus of Fig. 2A-2B) is completed by:
generating a hydrogen species ([0029], cleaning gas comprising hydrogen-containing radicals) in a plasma chamber (Fig. 2A, cleaning chamber 106a); and
directing the hydrogen species ([0029], hydrogen-containing gas) to the substrate surface (Fig. 1A substrate 10) when the semiconductor substrate is at a cleaning temperature between room temperature and 100 °C, ([0011], substrate maintained at about 100 °C)
wherein the substrate surface is terminated with a hydrogen passivation after the plasma clean. ([0029], the hydrogen-containing radicals interact with the deposits 12 therefore the substrate surface is terminated with a hydrogen passivation.)
Regarding claim 11, Hatem discloses:
A method of doping a substrate (Hatem, Abstract: method of doping a substrate), comprising:
providing a monocrystalline semiconductor ([0017], the substrate 102 may have a monocrystalline structure) material on a surface of the substrate;(substrate 102)
exposing the surface (substrate 102) to a plasma clean (Claim 10: cleaning the substrate in an etch chamber), wherein a native oxide is removed from the surface; ([0018], the surface layer 104 may be a native oxide and the duration of the plasma clean may be adequate to remove the surface layer.)
performing a deposition of a dopant layer (surface 110) on the surface of the substrate using a plasma source (Claim 10: depositing a dopant on the substate, and [0042] the implant chamber including a plasma generator.), after the plasma clean, ([0041], the plasma clean occurs before the deposition step) the dopant layer comprising a dopant element (doping layer 122 including boron [0022]); and
…
wherein the substrate is maintained under vacuum over a process duration spanning the plasma clean, the deposition of the dopant layer, (Fig. 5, [0041], individual operations may be performed under vacuum. This would include the plasma clean and deposition of the dopant layer.) …
wherein the dopant layer comprises a thickness of 1 nm to 7 nm before the implant process. (Hatem, [0022], the doping layer 122 is between .01nm to 3nm thick.)
…
an implant range for the ion species is greater than the thickness of the dopant layer before the implant process. (Hatem, [0022], the target region of the substrate is 10nm thick.)
Hatem appears to be silent on “exposing the substrate to an implant process when the dopant layer is disposed on the surface of the substrate,
wherein the implant process introduces an ion species comprising the dopant element into the substrate,
wherein the substrate is maintained under vacuum over a process duration spanning the …, and the implant process,
wherein at least a portion of the dopant layer is implanted into the substrate during the implant process wherein the plasma clean comprises generating a hydrogen species in a plasma chamber and directing the hydrogen species to the substrate surface when the semiconductor substrate is at a cleaning temperature between room temperature and 1000C, the ions having a cleaning energy between 3 eV and 30 eV…
wherein the ion species comprises an ion implantation energy of less than 7 keV.”
However, Seebauer, which teaches ultra-shallow doped semiconductor (Seebauer, Abstract), discloses:
exposing the substrate to an implant process when the dopant layer is disposed on the surface of the substrate, (Seebauer, Fig. 2A, [0071])
wherein the implant process introduces an ion species comprising the dopant element into the substrate, ([0071], the semiconductor is implanted with a dopant, such as boron into the substrate)
wherein the substrate is maintained under vacuum over a process duration spanning the …, and the implant process, ([0114], the working example of the process was performed under ultra-high vacuum)
wherein at least a portion of the dopant layer is implanted into the substrate during the implant process, and ([0071], the dopant is implanted into the substrate in an ultra-shallow doped semiconductor layer)
…
wherein the ion species comprises an ion implantation energy of less than 7 keV. (Seebauer, [0100], discloses the ion implantation of an ion species at 2 keV.)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hatem to have exposing the semiconductor substrate to an implant process when the dopant layer is disposed on the substrate surface, wherein the implant process introduces an ion species comprising the dopant element into the substrate, wherein the substrate is maintained under vacuum over a process duration spanning the plasma clean, the deposition of the dopant layer, and the implant process, and wherein at least a portion of the dopant layer is implanted into the substrate during the implant process, and the ion species comprises an ion implantation energy of less than 7 keV as taught by Seebauer for purposes of doping the semiconductor surface to a preferred concentration depth profile. (Seebauer, [0071])
Hatem and Seebauer do not appear to disclose “wherein the plasma clean further includes directing ions to the substrate surface where the ions have a cleaning energy of less than 100 eV” and “wherein the plasma clean comprises generating a hydrogen species in a plasma chamber and directing the hydrogen species to the substrate surface when the semiconductor substrate is at a cleaning temperature between room temperature and 1000C, the ions have a cleaning energy between 3 eV and 30 eV.”
However, Oehrlein which teaches method of plasma cleaning of surfaces at low temperatures (Oehrlein, Abstract), discloses:
wherein the plasma clean further includes directing ions to the substrate surface where the ions have a cleaning energy of less than 100 eV. (Oehrlein, page 15, last full paragraph, cleaning SiO2 (a native oxide of Si) a low energy Ar+ ion bombardment with a maximum ion energy of 20 eV may be used)
… the ions have a cleaning energy between 3 eV and 30 eV. (Oehrlein, page 15, last full paragraph, (a native oxide of Si) a low energy Ar+ ion bombardment with a maximum ion energy of 20 eV may be used. Therefore between 3 eV and 30eV.)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hatem and Seebauer to have the plasma clean further includes directing ions to the substrate surface where the ions have a cleaning energy of less than 100 eV and having the cleaning energy between 3 eV and 30 eV as taught by Oehrlein for purposes of etching (cleaning) the surface SiO2. (Oehrlein, page 15 last full paragraph.)
Hatem, Seebauer, and Oehrlein do not appear to disclose “wherein the plasma clean comprises generating a hydrogen species in a plasma chamber and directing the hydrogen species to the substrate surface when the semiconductor substrate is at a cleaning temperature between room temperature and 1000C”.
Wood, which teaches cleaning a semiconductor substrate by using a hydrogen-contain gas, discloses:
the plasma clean (Wood, cleaning method of Figs. 1A-1D that can be performed in the apparatus of Fig. 2A-2B) comprises generating a hydrogen species ([0029], cleaning gas comprising hydrogen-containing radicals) in a plasma chamber (Fig. 2A, cleaning chamber 106a); and
directing the hydrogen species ([0029], hydrogen-containing gas) to the substrate surface (Fig. 1A substrate 10) when the semiconductor substrate is at a cleaning temperature between room temperature and 100 °C, ([0011], substrate maintained at about 100 °C)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hatem, Seebauer, and Oehrlein to have the plasma clean is completed by generating a hydrogen species in a plasma chamber, and directing the hydrogen species to the substrate surface when the semiconductor substrate is at a cleaning temperature between room temperature and 100 °C by Wood for purposes of preventing damage to the structure of the device. (Wood, [0029].)
Regarding claim 12, Hatem, Seebauer, Oehrlein, and Wood disclose all the elements of claim 11 as disclosed above.
Oehrlein further discloses:
wherein the ions have a cleaning energy between 3 eV and 30 eV. (Oehrlein, page 15, last full paragraph, (a native oxide of Si) a low energy Ar+ ion bombardment with a maximum ion energy of 20 eV may be used. Therefore between 3 eV and 30eV.)
Wood further discloses:
the plasma clean (Wood, cleaning method of Figs. 1A-1D that can be performed in the apparatus of Fig. 2A-2B) is completed by:
generating a hydrogen species ([0029], cleaning gas comprising hydrogen-containing radicals) in a plasma chamber (Fig. 2A, cleaning chamber 106a); and
directing the hydrogen species ([0029], hydrogen-containing gas) to the substrate surface (Fig. 1A substrate 10) when the substrate is at a cleaning temperature between room temperature and 100 °C, ([0011], substrate maintained at about 100 °C)
wherein the substrate surface is terminated with a hydrogen passivation after the plasma clean. ([0029], the hydrogen-containing radicals interact with the deposits 12 therefore the substrate surface is terminated with a hydrogen passivation.)
Regarding claim 15, Hatem, Seebauer, Oehrlein, and Wood disclose all the elements of claim 11 as disclosed above.
Hatem further discloses:
the dopant layer comprises a thickness of 1 nm to 7 nm before the implant process (Hatem, [0022], the doping layer 122 is between .01nm to 3nm thick.), and wherein an implant thickness for the ion species is at least 2nm or a thickness greater than the thickness of the dopant layer before the implant process. (Hatem, [0022], the target region of the substrate is 10nm thick.)
Regarding claim 16, Hatem discloses:
A method of doping a semiconductor substrate (Hatem, Abstract: method of doping a substrate), comprising:
providing the semiconductor substrate (substrate 102) in a beamline ion implanter; ([0042], the system uses an ion beam and is therefore a beamline ion implanter)
exposing a substrate surface (substrate 102) of the semiconductor substrate to a plasma clean; (Claim 10: cleaning the substrate in an etch chamber)
performing a deposition of a dopant layer (surface 110) on the substrate surface using a plasma source (Claim 10: depositing a dopant on the substate, and [0042] the implant chamber including a plasma generator.), after the plasma clean ([0041], the plasma clean occurs before the deposition step), the dopant layer comprising a dopant element (doping layer 122 including boron [0022]); and
…
wherein the substrate is maintained in the beamline ion implanter under vacuum over a process duration spanning the plasma clean, the deposition of the dopant layer, (Fig. 5, [0041], individual operations may be performed under vacuum. This would include the plasma clean and deposition of the dopant layer.) …
wherein the dopant layer comprises a thickness of 1 nm to 7 nm before the implant process. (Hatem, [0022], the doping layer 122 is between .01nm to 3nm thick.)
…
an implant range for the ion species is greater than the thickness of the dopant layer before the implant process. (Hatem, [0022], the target region of the substrate is 10nm thick.)
Hatem appears to be silent on “exposing the semiconductor substrate to an implant process when the dopant layer is disposed on the substrate surface,
wherein the implant process introduces an ion species comprising the dopant element into the semiconductor substrate,
wherein the semiconductor substrate is maintained in the beamline ion implanter under vacuum over a process duration spanning the plasma clean, the deposition of the dopant layer, and the implant process,
wherein at least a portion of the dopant layer is driven into the semiconductor substrate during the implant process, wherein at least a portion of the dopant layer is implanted into the substrate during the implant process wherein the plasma clean comprises generating a hydrogen species in a plasma chamber and directing the hydrogen species to the substrate surface when the semiconductor substrate is at a cleaning temperature between room temperature and 1000C, the ions having a cleaning energy between 3 eV and 30 eV…
wherein the ion species comprises an ion implantation energy of less than 7 keV.”
However, Seebauer, which teaches ultra-shallow doped semiconductor (Seebauer, Abstract), discloses:
exposing the semiconductor substrate to an implant process when the dopant layer is disposed on the substrate surface, (Seebauer, Fig. 2A, [0071])
wherein the implant process introduces an ion species comprising the dopant element into the semiconductor substrate, ([0071], the semiconductor is implanted with a dopant, such as boron into the substrate)
wherein the semiconductor substrate is maintained in the beamline ion implanter under vacuum over a process duration spanning the … and the implant process, ([0114], the working example of the process was performed under ultra-high vacuum)
wherein at least a portion of the dopant layer is driven into the semiconductor substrate during the implant process, and ([0071], the dopant is implanted into the substrate in an ultra-shallow doped semiconductor layer)
…
wherein the ion species comprises an ion implantation energy of less than 7 keV. (Seebauer, [0100], discloses the ion implantation of an ion species at 2 keV.)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hatem to have exposing the semiconductor substrate to an implant process when the dopant layer is disposed on the substrate surface, wherein the implant process introduces an ion species comprising the dopant element into the substrate, wherein the semiconductor substrate is maintained under vacuum over a process duration spanning the plasma clean, the deposition of the dopant layer, and the implant process, and wherein at least a portion of the dopant layer is implanted into the substrate during the implant process, and the ion species comprises an ion implantation energy of less than 7 keV as taught by Seebauer for purposes of doping the semiconductor surface to a preferred concentration depth profile. (Seebauer, [0071])
Hatem and Seebauer do not appear to disclose “wherein the plasma clean further includes directing ions to the substrate surface where the ions have a cleaning energy of less than 100 eV” and “wherein the plasma clean comprises generating a hydrogen species in a plasma chamber and directing the hydrogen species to the substrate surface when the semiconductor substrate is at a cleaning temperature between room temperature and 1000C, the ions have a cleaning energy between 3 eV and 30 eV.”
However, Oehrlein which teaches method of plasma cleaning of surfaces at low temperatures (Oehrlein, Abstract), discloses:
wherein the plasma clean further includes directing ions to the substrate surface where the ions have a cleaning energy of less than 100 eV. (Oehrlein, page 15, last full paragraph, cleaning SiO2 (a native oxide of Si) a low energy Ar+ ion bombardment with a maximum ion energy of 20 eV may be used)
… the ions have a cleaning energy between 3 eV and 30 eV. (Oehrlein, page 15, last full paragraph, (a native oxide of Si) a low energy Ar+ ion bombardment with a maximum ion energy of 20 eV may be used. Therefore between 3 eV and 30eV.)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hatem and Seebauer to have the plasma clean further includes directing ions to the substrate surface where the ions have a cleaning energy of less than 100 eV and having the cleaning energy between 3 eV and 30 eV as taught by Oehrlein for purposes of etching (cleaning) the surface SiO2. (Oehrlein, page 15 last full paragraph.)
Hatem, Seebauer, and Oehrlein do not appear to disclose “wherein the plasma clean comprises generating a hydrogen species in a plasma chamber and directing the hydrogen species to the substrate surface when the semiconductor substrate is at a cleaning temperature between room temperature and 1000C”.
Wood, which teaches cleaning a semiconductor substrate by using a hydrogen-contain gas, discloses:
the plasma clean (Wood, cleaning method of Figs. 1A-1D that can be performed in the apparatus of Fig. 2A-2B) comprises generating a hydrogen species ([0029], cleaning gas comprising hydrogen-containing radicals) in a plasma chamber (Fig. 2A, cleaning chamber 106a); and
directing the hydrogen species ([0029], hydrogen-containing gas) to the substrate surface (Fig. 1A substrate 10) when the semiconductor substrate is at a cleaning temperature between room temperature and 100 °C, ([0011], substrate maintained at about 100 °C)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hatem, Seebauer, and Oehrlein to have the plasma clean is completed by generating a hydrogen species in a plasma chamber, and directing the hydrogen species to the substrate surface when the semiconductor substrate is at a cleaning temperature between room temperature and 100 °C by Wood for purposes of preventing damage to the structure of the device. (Wood, [0029].)
Regarding claim 17, Hatem, Seebauer, Oehrlein, and Wood disclose all the elements of claim 16, as disclosed above.
Hatem further discloses:
the substrate surface includes a native oxide ([0018], the surface layer 104 may be a native oxide), before the plasma clean ([0018] and [0019], the surface oxide 104 is etched before the implantation operation), and wherein the native oxide is removed after the plasma clean. ([0018], The duration of the exposure may be adequate to remove the surface layer 104.)
Wood further discloses:
wherein the substrate surface is terminated with a hydrogen passivation after the plasma clean. ([0029], the hydrogen-containing radicals interact with the deposits 12 therefore the substrate surface is terminated with a hydrogen passivation)
Regarding claim 19, Hatem, Seebauer, Oehrlein, and Wood disclose all the elements of claim 16 as disclosed above.
Hatem further discloses:
the dopant layer comprises a thickness of 1 nm to 7 nm before the implant process (Hatem, [0022], the doping layer 122 is between .01nm to 3nm thick.), and wherein an implant thickness for the ion species is at least 2nm or a thickness greater than the thickness of the dopant layer before the implant process. (Hatem, [0022], the target region of the substrate is 10nm thick.)
Claims 4-7, 9, 13, 14 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Hatem, Seebauer. And Oehrlein as applied to claims 1, 11, and 16 above, and further in view of Cao et al. "Boron Doping in Next-Generation Materials for Semiconductor Device", Characteristics and Applications of Boron. IntechOpen (hereinafter Cao).
Regarding claim 4, Hatem, Seebauer, Oehrlein, and Wood disclose all the elements of claim 1, as disclosed above.
Hatem further discloses:
the performing the deposition comprises: (Fig. 5 and [0041]- [0043] describe the use of the apparatus for the method of Figs. 1A-1H)
generating a dopant species (Fig. 1B, helium species 114) in the plasma source ([0042], hot implant chamber 508 providing a helium plasma for generating helium ions), the dopant species comprising a dopant element (the helium species by necessity has helium as the dopant element); and
Hatem however teaches where the ion implantation would occur at a temperature above room temperature such as at 300 °C. (Hatem, Abstract.)]
Hatem, Seebauer, Oehrlein, and Wood appear to be silent regarding performing the ion implantation by “directing the dopant species to the substrate surface when the semiconductor substrate is at a substrate temperature of between room temperature and -100 °C.”
However, Cao, which teaches boron doping using ion implantation (Cao, page 2, section 2), discloses:
directing the dopant species to the substrate surface when the semiconductor substrate is at a substrate temperature of between room temperature and -100 °C. (Cao, page 6 first full paragraph, room temperature and cold temperature (-100 °C) ion implantation is discussed.)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hatem, Seebauer, Oehrlein, and Wood to have directing the dopant species to the substrate surface when the semiconductor substrate is at a substrate temperature of between room temperature and -100 °C as taught by Cao for purposes of performing the implantation at lower and cold temperatures to purposefully introduce lattice defects that would increase the diffusion of boron. (Cao, page 6, first full paragraph.)
Regarding claim 5, Hatem, Seebauer, Oehrlein, Wood and Cao disclose all the elements of claim 4, as disclosed above.
Hatem further discloses:
the dopant species comprises a boron-containing species or a phosphorous-containing species. (Hatem, [0022], The doping layer 122 may include an appropriate dopant for doping the substrate 102, such as boron or phosphorous.)
Regarding claim 6, Hatem, Seebauer, Oehrlein, Wood and Cao disclose all the elements of claim 4, as disclosed above.
Cao further discloses:
the dopant species comprises an ion implantation energy from several eV to 100 eV. (Cao, page 9 last full paragraph, low ion energy during ion implantation of boron is 100-1 eV.)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hatem, Seebauer, Oehrlein, Wood and Cao to have the dopant species comprises an energy from several eV to 100 eV as taught by Cao for purposes of shallow depth profile of boron doping at low implantation ion energies. (Cao, page 9 last full paragraph.)
Regarding claim 7, Hatem, Seebauer, Oehrlein, Wood and Cao disclose all the elements of claim 4, as disclosed above.
Hatem further discloses:
the dopant layer comprises a thickness of 1 nm to 7 nm before the implant process. (Hatem, [0022], the doping layer 122 is between .01nm to 3nm thick.)
Regarding claim 9, Hatem, Seebauer, Oehrlein, Wood, and Cao disclose all the elements of claim 7, as disclosed above.
Hatem further teaches:
an implant range for the ion species is greater than the thickness of the dopant layer before the implant process. (Hatem, [0022], the target region of the substrate is 10nm thick.)
Regarding claim 13, Hatem, Seebauer, Oehrlein, and Wood disclose all the elements of claim 11, as disclosed above.
Hatem further discloses:
the performing the deposition comprises: (Fig. 5 and [0041] - [0043] describe the use of the apparatus for the method of Figs. 1A-1H)
generating a dopant species (Fig. 1B, helium species 114) in the plasma source ([0042], hot implant chamber 508 providing a helium plasma for generating helium ions), the dopant species comprising a dopant element (the helium species by necessity has helium as the dopant element); and
Hatem however does teach where the ion implantation would occur at a temperature above room temperature such as at 300 °C. (Hatem, Abstract.)
However, Cao, which teaches boron doping using ion implantation (Cao, page 2, section 2), discloses:
directing the dopant species to the substrate surface when the substrate is at a substrate temperature of between room temperature and -100 °C. (Cao, page 6 first full paragraph, room temperature and cold temperature (-100 °C) ion implantation is discussed.)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hatem, Seebauer, Oehrlein, and Wood to have directing the dopant species to the substrate surface when the substrate is at a substrate temperature of between room temperature and -100 °C as taught by Cao for purposes of performing the implantation at lower and cold temperatures to purposefully introduce lattice defects that would increase the diffusion of boron. (Cao, page 6, first full paragraph.)
Regarding claim 14, Hatem, Seebauer, Oehrlein, Wood and Cao disclose all the elements of claim 13.
Cao further discloses:
the dopant species comprises an ion implantation energy from several eV to 100 eV. (Cao, page 9 last full paragraph, low ion energy during ion implantation of boron is 100-1 eV.)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hatem, Seebauer, Oehrlein, Wood, and Cao to have the dopant species comprises an energy from several eV to 100 eV as taught by Cao for purposes of shallow depth profile of boron doping at low implantation ion energies. (Cao, page 9 last full paragraph.)
Regarding claim 18, Hatem, Seebauer, Oehrlein, and Wood disclose all the elements of claim 16, as disclosed above.
Hatem further discloses:
the performing the deposition comprises: (Fig. 5 and [0041] - [0043] describe the use of the apparatus for the method of Figs. 1A-1H)
generating a dopant species (Fig. 1B, helium species 114) in the plasma source ([0042], hot implant chamber 508 providing a helium plasma for generating helium ions), the dopant species comprising a dopant element (the helium species by necessity has helium as the dopant element); and
Hatem however does teach where the ion implantation would occur at a temperature above room temperature such as at 300 °C. (Hatem, Abstract.)
However, Cao, which teaches boron doping using ion implantation (Cao, page 2, section 2), discloses:
directing the dopant species to the substrate surface when the substrate is at a substrate temperature of between room temperature and -100 °C. (Cao, page 6 first full paragraph, room temperature and cold temperature (-100 °C) ion implantation is discussed.)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hatem, Seebauer, Oehrlein, and Wood to have directing the dopant species to the substrate surface when the substrate is at a substrate temperature of between room temperature and -100 °C as taught by Cao for purposes of performing the implantation at lower and cold temperatures to purposefully introduce lattice defects that would increase the diffusion of boron. (Cao, page 6, first full paragraph.)
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Hatem, Seebauer, Oehrlein and Wood as applied to claim 1 above, and further in view of Olander et al. US 20130137250 A1 (hereinafter Olander).
Regarding Claim 8, Hatem, Seebauer, Oehrlein, and Wood disclose all the elements of claim 1.
Seebauer further discloses:
wherein the ion species comprises an ion implantation energy of less than 7 keV. (Seebauer, [0100], discloses the ion implantation of an ion species at 2 keV.)
Seebauer also discloses the use of BF4 (Tetrafluoroborate), but which is a different boron-containing halide than the claim BF3 (Boron trifluoride).
However, Olander, which teaches methods of implanting boron-containing ions, discloses that Boron trifuoride has been traditionally been the source of boron dopant impurities used with ion implantation. (Olander, [0005]). Therefore, Olander discloses:
the dopant element is derived from a dopant species that comprises BF3 or PF3 (Olander, [0005], BF3).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hatem, Seebauer, Oehrlein, and Wood to have the dopant element is derived from a dopant species that comprises BF3 as taught by Olander for purposes of implanting boron into a semiconductor substrate. (Olander, [0005].)
Alternative rejection of Claim 8, under 35 U.S.C. 103 as being unpatentable over Hatem, Seebauer, Oehrlein and Wood as applied to claim 1 above, and further in view of Cao and Olander et al. US 20130137250 A1 (hereinafter Olander).
Regarding claim 8, Hatem, Seebauer, Oehrlein, and Wood disclose all the elements of claim 1, as disclosed above.
Seebauer also further discloses implanting arsenic (As) as an ion species at an ion energy of less than 7 keV. (Seebauer, [0100], discloses the ion implantation of an ion species at 2 keV.) While Seebauer does disclose the use of boron atoms ([0004]) it does not disclose a working example of the implantation energy of boron.
Cao, which teaches boron doping using ion implantation (Cao, page 2, section 2), discloses:
wherein the ion species comprises an ion energy of less than 7 keV. (Cao, page 9 last full paragraph, low energy implantation of boron is usually done at below 100 eV.)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hatem, Seebauer, Oehrlein, and Wood to have the ion species comprises an ion energy of less than 7 keV as taught by Cao for purposes of implanting the dopant at a shall depth of around 100-200nm. (Cao, page 9, last full paragraph.)
Seebauer further discloses the use of BF4 (Tetrafluoroborate), but which is a different boron-containing halide than the claim BF3 (Boron trifluoride). None of Hatem, Seebauer, Oehrlein, Wood, or Cao teach specifically BF3 (Boron trifluoride).
However, Olander, which teaches methods of implanting boron-containing ions, discloses that Boron trifuoride has been traditionally been the source of boron dopant impurities used with ion implantation. (Olander, [0005]). Therefore, Olander discloses:
the dopant element is derived from a dopant species that comprises BF3 or PF3 (Olander, [0005], BF3).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hatem, Seebauer, Oehrlein, Wood and Cao to have the dopant element is derived from a dopant species that comprises BF3 as taught by Olander for purposes of implanting boron into a semiconductor substrate. (Olander, [0005].)
Claims 10 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Hatem, Seebauer, Oehrlein, and Wood as applied to claims 1 and 16 above, and further in view of Sharma et al. US 20130288469 A1 (hereinafter Sharma).
Regarding claim 10, Hatem, Seebauer, Oehrlein, and Wood disclose all the elements of claim 1, as disclosed above.
Hatem, Seebauer, and Oehrlein the implant cycles which includes “the plasma clean, the deposition of the dopant layer, and the implant process”. See discussion of claim 1.
Hatem, Seebauer, and Oehrlein appear to be silent regarding “the implant cycle is repeated one or more times to implant a target dopant level into the semiconductor substrate.”
However, Sharma, which teaches a method of implanting a dopant material, discloses that repetition of the method in the cyclic process would result in enhancing the conformality of the doping process. Therefore, Sharma discloses repeating the implant cycle one or more times to implant a target dopant level into the semiconductor substrate. (Sharma, [0025].)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hatem, Seebauer, Oehrlein, and Wood to have the implant cycle is repeated one or more times to implant a target dopant level into the semiconductor substrate. as taught by Sharma for purposes of refreshed dopant implanted surfaces and enhancing the conformality of the doping process is enhanced. (Sharma, [0025].)
Regarding claim 20, Hatem, Seebauer, Oehrlein, and Wood disclose all the elements of claim 16, as disclosed above.
Hatem, Seebauer, and Oehrlein the implant cycles which includes “the plasma clean, the deposition of the dopant layer, and the implant process”. See discussion of claim 1.
Hatem, Seebauer, Oehrlein, and Wood appear to be silent regarding “the implant cycle is repeated one or more times to implant a target dopant level into the semiconductor substrate.”
However, Sharma, which teaches a method of implanting a dopant material, discloses that repetition of the method in the cyclic process would result in enhancing the conformality of the doping process. Therefore, Sharma discloses repeating the implant cycle one or more times to implant a target dopant level into the semiconductor substrate. (Sharma, [0025].)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Hatem, Seebauer, Oehrlein, and Wood to have the implant cycle is repeated one or more times to implant a target dopant level into the semiconductor substrate. as taught by Sharma for purposes of refreshed dopant implanted surfaces and enhancing the conformality of the doping process is enhanced. (Sharma, [0025].)
Prior Art Made of Record
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
S. Ruffell, I. V. Mitchell, P. J. Simpson; Annealing behavior of low-energy ion-implanted phosphorus in silicon. J. Appl. Phys. 15 June 2005; 97 (12): 123518. - Low energy (5 keV) implantation of Phosphorous in silicon. Which would address claim 5 directed to the phosphorous dopant after the ‘or’ statement.
Conclusion
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/HEIM KIRIN GREWAL/ Examiner, Art Unit 2812
/DAVIENNE N MONBLEAU/ Supervisory Patent Examiner, Art Unit 2812
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