Prosecution Insights
Last updated: April 19, 2026
Application No. 17/983,426

METHOD FOR FABRICATING SPACER

Final Rejection §103
Filed
Nov 09, 2022
Examiner
LAOBAK, ANDREW KEELAN
Art Unit
1713
Tech Center
1700 — Chemical & Materials Engineering
Assignee
UNITED MICROELECTRONICS CORPORATION
OA Round
4 (Final)
77%
Grant Probability
Favorable
5-6
OA Rounds
3y 1m
To Grant
99%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allow Rate
24 granted / 31 resolved
+12.4% vs TC avg
Strong +28% interview lift
Without
With
+28.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
41 currently pending
Career history
72
Total Applications
across all art units

Statute-Specific Performance

§103
61.5%
+21.5% vs TC avg
§102
16.4%
-23.6% vs TC avg
§112
19.2%
-20.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 31 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of the Claims This is a final office action in response to the applicant’s arguments and remarks filed on 06/19/2025. Claims 1, 2, 5, 6, and 8-10 are pending in the current office action. Claims 1 and 8 have been amended by the applicant and Claims 3, 4, and 7 have been cancelled. Status of the Rejection All 35 U.S.C. § 112(b) rejections from the previous office action are withdrawn in view of the Applicant’s amendment. The rejection of claims 3, 4, and 7 is obviated by the Applicant’s cancellation. All 35 U.S.C. § 103 rejections from the previous office action are substantially maintained and modified only in response to the amendments to the claims. Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claims 1, 2, 5, 6, 8, and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Ahmed et al. (US-20040056304-A1) in view of Shen (US-20160163797-A1), Akatsu et al. (JP 2001035841 A, machine translation), and Sato (US-20090085123-A1). Regarding Claim 1, Ahmed teaches a method for fabricating a spacer covering sidewalls of a gate structure formed on a substrate (Paragraph [0002] method for forming transistors. Paragraph [0023] transistor contains spacers on sidewalls), comprising: providing an etch stop structure that comprises a silicon nitride-containing capping layer covering the substrate and the gate structure where the capping layer directly contacts top surfaces and vertical walls of the electrode layer of a gate structure (Paragraph [0047] Figure 5B an insulating layer (element 320), equivalent to the claimed capping layer, is formed to cover the gate structure. Paragraph [0046] the gate structure comprises a gate dielectric (element 312) and a gate terminal (element 306), where the gate terminal can be considered equivalent to the claimed electrode layer. As seen in Figure 5B, the insulating layer (element 320) is in direct contact with the top surface and vertical walls of the gate terminal (element 306). Paragraph [0048] insulating layer may be silicon nitride); performing an etching process to remove a portion of the silicon nitride-containing capping layer to expose a portion of the substrate and to expose gate electrode layers of the gate structure (Paragraph [0052] Figure 5C sidewall spacers are formed by an anisotropic etch where the insulating layer on the top of the gate is removed by dry etch, therefore gate electrode layer (element 306) is exposed after etching); and prior to forming source/drain structures in the substrate (Figure 4 forming of spacers (element 420) is conducted before forming source and drain (element 440)) and respectively adjacent to the gate structure, performing a wet process to make a treatment agent contacting a remaining portion of the silicon nitride-containing capping layer (Paragraph [0054] after dry etch a wet etch is used to etch a remainder of overlayer to form sidewall spacers). Ahmed fails to teach that the silicon nitride-containing capping layer comprises: a silicon oxide layer, covering the top surfaces and the vertical walls; and a silicon nitride layer, covering the silicon oxide layer. Sato teaches a method of forming a spacer (Paragraphs [0003] and [0030]). Sato teaches insulating layers over a gate structure and where a first layer, which covers the top and vertical walls of the gate structure, can be a silicon oxide film and the second layer, which covers the first layer, can be silicon nitride (Paragraph [0077] Figure 1D, a first insulating film (element 18) can be silicon oxide and is covered by a second insulation layer (shown after an etching step in Figure 1D as element 19a) can be silicon nitride). It would have been obvious to one of ordinary skill in the art to modified the method of modified Ahmed by depositing two insulating layers over the gate structure as taught by Sato. This modification would have been obvious because it would have been the combination of prior art elements according to known methods to yield predictable results. This combination would have had the predictable result of providing two insulating layers over the gate structures which could then be formed into a multi-layered spacer. See MPEP 2143(I)(A). Ahmed fails to teach that the method includes forming two adjacent gate structures on the semiconductor layer of the substrate and that there are two adjacent gate structures on the substrate which are covered by the capping layer and that the substrate between the gate structures is exposed by the etching process. Shen teaches a method for fabricating a spacer covering sidewalls of two adjacent gate structures formed on a substrate (Paragraph [0014] Figure 2 method for forming plurality of gate structures (element 306) that are adjacent to each other and include spaces on their sidewalls (elements 310)). Shen teaches forming the adjacent gate structures on a semiconductor layer (Paragraphs [0012-0014] the gate structures (elements 306) are formed on the semiconductor substrate layer (element 300). It would have been obvious to one of ordinary skill in the art to have modified the method of Ahmed by providing a semiconductor substrate and forming adjacent gate structures upon that substrate. With this modification, the particular limitation of “forming the two adjacent gate structures on a semiconductor layer of the substrate” would be met and when the capping layer is formed it would cover both of the two adjacent gate structures and when the etching process is conducted the area of the substrate exposed would include an area between the two gate structures. This modification would have been obvious because it would have been the combination of prior art elements according to known methods to yield predictable results. This combination would have had the predictable result of providing two adjacent gate structures and allowing for the formation of the spacers of each gate structure at the same time. See MPEP 2143(I)(A). Ahmed fails to teach that the treatment agent of the wet process is a sulfide-containing treatment agent. Shen teaches that a wet process that uses sulfuric acid and contacts spacers is used after a dry etching process (Paragraph [0015] Figure 2 after the recess (element 312) is formed by dry etching, a pre-clean process using sulfuric acid contacts the surface of the recess which includes the spacer (element 310)). It would have been obvious to one of ordinary skill in the art to have modified the method of modified Ahmed by using a sulfuric acid containing wet treatment agent as the treatment agent for the wet process conducted after the dry etching, as taught by Shen. This modification would have been obvious because it would have been the combination of prior art elements according to known methods to yield predictable results. This combination would have had the predictable result of providing suitable wet etching agent for use after a dry etching process. See MPEP 2143(I)(A). Modified Ahmed, as outlined above, teaches wherein the sulfide-containing treatment agent comprises H2SO4 (Shen Paragraph [0015] pre-clean process uses sulfuric acid) but fails to teach that the sulfide-containing treatment agent has a sulfuric acid concentration substantially between 50 wt% and 95 wt%. Akatsu teaches a method of method of processing a substrate for use in the semiconductor industry (Paragraphs [0001-0002]). Akatsu teaches a composition for use in surface treatment of layers on a substrate (Paragraphs [0008-0010]). Akatsu teaches that the composition contains, by volume, 5-80% sulfuric acid, 20-95% hydrogen peroxide, and 0-75% water (Paragraph [0010]). The range of sulfuric acid in this composition as represented in weight percent that meets the limitations of Claim 6 would be greater than 7.9851% and less than 88.03%. (The high end of sulfuric acid would be represented by a formulation that contains 80 volume percent sulfuric acid, less than 20 volume percent water, and more than 0 volume percent hydrogen peroxide. Using a representative 100mL formulation: 80mL sulfuric acid * (1.8302g/mL) = 146.416g, 20mL water * (0.995 g/mL) = 19.9g. 146.416/ (146.416+19.9) = 88.03 weight percent sulfuric acid. The inclusion of any hydrogen peroxide, which is denser than water, as required by Claim 7, would result in the weight percent of sulfuric acid being lower than the calculated value. The low end of sulfuric acid would be represented by a formulation that contains 5 volume percent sulfuric acid, more than 0 volume percent water, and less than 95 volume percent hydrogen peroxide. Using a representative 100mL formulation: 5mL sulfuric acid * (1.8302g/mL) = 9.151g, 95mL hydrogen peroxide * (1.11g/mL) = 105.45g. 9.151/ (9.151+105.45) = 7.9851 weight percent sulfuric acid. The inclusion of any water, which is less dense than hydrogen peroxide, as required by Claim 7, would result in the weight percent of sulfuric acid being higher than the calculated value. See Reference Documents: “Water – PubChem” , “Hydrogen Peroxide – PubChem”, and “Sulfuric Acid – PubChem” for densities used in above calculations). It would have been obvious to one of ordinary skill in the art to have modified the method of modified Ahmed by using the composition for the sulfide-containing treatment agent that was taught by Akatsu. This modification would have been obvious because it would have been a simple substitution of one known element for another to obtain predictable results. The use of the composition as taught by Akatsu would have resulted in the predictable outcome of the composition acting as a sulfide-containing treatment agent in the method. See MPEP 2143(I)(B). It would have been obvious to one of ordinary skill in the art to have selected and incorporated a sulfuric acid weight percent at a level within the disclosed range of greater than 7.9851% and less than 88.03%, including at amounts that overlap with the claimed range of 50-95%. It has been held that obviousness exists where the claimed ranges overlap or lie inside ranges disclosed by the prior art. See MPEP 2144.05 (I). Additionally, examiner notes that generally differences in concentration or temperature will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such concentration or temperature is critical. “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." MPEP § 2144.05(II)(A). Therefore, it would have been obvious to one skilled in the art to use a sulfuric acid concentration substantially between 50 wt% and 95 wt%. in the treatment agent because Shen teaches the use of sulfuric acid in a treatment composition and a composition will function in a predictable manner given these conditions. Regarding Claim 2, Ahmed further teaches wherein the etching process comprises a dry etching process (Paragraph [0052] Figure 5C sidewall spacers are formed by an anisotropic etch). Regarding Claim 5, modified Ahmed teaches all the limitations of claim 1 as outlined above. Shen further teaches wherein the sulfide-containing treatment agent comprises sulfuric acid (H2SO4), caro's acid (H2SO5) or a combination thereof (Paragraph [0015] sulfuric acid is used in pre-cleaning process). Regarding Claim 6, modified Ahmed teaches all the limitations of claim 1 as outlined above. Shen further teaches wherein the sulfide-containing treatment agent comprises H2SO4, hydrogen peroxide (H202) and water (Paragraph [0015] pre-clean process uses sulfuric acid, hydrogen peroxide and water). Regarding Claim 8, modified Ahmed teaches all the limitations of Claim 1 as outlined above. Claim 8 recites “wherein there is a functional relationship between a width of the remaining portion of the silicon nitride-containing capping layer and the sulfuric acid concentration.” Under the broadest reasonable interpretation, the term “a functional relationship” could refer to any relationship between the concentration and width. For example, the functional relationship could be “while there is any width of the silicon nitride-containing capping layer, then the sulfuric acid concentration is to be between 50-95 weight percent.” Under this interpretation, using the example outlined above, the method of modified Ahmed meets the limitations of Claim 8. Regarding Claim 10, modified Ahmed teaches all the limitations of claim 1 as outlined above. Ahmed fails to teach wherein the etch stop structure comprises a shallow trench isolation (STI). Shen teaches a substrate comprising multiple gates and a shallow trench isolation (STI) (Paragraph [0012] Figure 1, structure includes shallow trench isolations (elements 302A)). It would have been obvious to one of ordinary skill in the art to have modified the method of modified Ahmed by including a shallow trench isolation with the substrate that includes multiple gates, as taught by Shen. This modification would have been obvious because it would have been the combination of prior art elements according to known methods to yield predictable results. This combination would have had the predictable result of providing a substrate that includes a shallow trench isolation. See MPEP 2143(I)(A). Claims 8 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Ahmed in view of Shen, Akatsu and Sato, as applied to claim 1 above, and further in view of Gao et al. (CN 110289212 A, machine translation). Regarding Claim 8 and 9, modified Ahmed teaches all the limitations of Claim 1 as outlined above. Note: claim 8 is rejected above as being unpatentable over Ahmed in view of Shen and Akatsu based on a BRI of the phrase “functional relationship”. Claim 8 is alternatively rejected below by a narrower interpretation of the phrase “functional relationship” where the limitation is interpreted such that the concentration of sulfuric acid during the process is varied by an amount that is calculated using a formula where the width of the remaining portion of the silicon nitride-containing capping layer is an input. Modified Ahmed fails to explicitly teach a functional relationship between a width of the remaining portion of the silicon nitride-containing capping layer and the sulfuric acid concentration, as required by Claim 8. Modified Ahmed further fails to teach that the wet process is controlled by using an advanced process control (APC) system and/or an advanced equipment control (AEC) system taking account the function relationship, as required by Claim 9. Gao teaches a method of semiconductor processing that comprises controlling the amount of material etched from a layer during an etching process (Paragraphs [0002-0004]). Gao teaches that the thickness of the layer to be etched and the concentration of the etching solution have a functional relationship (Paragraphs [0010-0014], [0022]). Examiner takes the position that specific gravity of a multicomponent composition, such as the composition taught by the prior art in Paragraph [0022], where the components have varying densities (See Reference Documents: “Water – PubChem” and “Phosphoric Acid”), has an inherent relationship to the concentration of the components. Therefore, the functional relationship between the composition density and the thickness of the layer to be etched includes a functional relationship between the concentration of the components and the thickness of the layer to be etched. Gao further teaches that an advanced process control system can be used to control the wet process taking account of the functional relationship (Paragraphs [0037-0038]). It would have been obvious to one of ordinary skill in the art to modify the method taught by modified Ahmed, by including an advanced process control system that using a functional relationship between the composition of treatment solution and a width of a treated surface to control the wet process of the method. This modification would have been obvious because it would have been the application of a known technique to a known method ready for improvement. The method of modified Ahmed was ready for the improvement of the use of an advanced process control system to control the wet process. This modification would have resulted in the predictable result of the advanced process control system using the functional relationship to control the wet process. See MPEP 2143(I)(D). Response to Arguments Applicant’s arguments, see Remarks Pg. 2-9, filed 06/19/2025, with respect to the 35 U.S.C. § 103 rejection have been fully considered and are not persuasive. Applicant argues that the cited prior art fails to teach that the silicon oxide layer of the silicon nitride containing capping layer directly contacts the top surfaces and vertical walls of the gate electrode layers. Examiner respectfully disagrees. As outlined in the rejection of claim 1, examiner takes the position that the capping layer taught by Ahmed directly covers and contact the top surfaces and vertical walls of a gate electrode layer as seen in Figure 5B. Examiner takes the position that the reference to the term “insulated gate” used in Paragraph [0047] of Ahmed and noted by applicant to argue that the capping layer is not in direct contact with the gate electrode layer, is used by Ahmed, as outlined in Paragraph [0046], to refer to the combination of “an insulator (a gate dielectric)” represented by element 312 and “a gate terminal” represented by element 306. Where the gate terminal is formed from a conductive material and can be considered equivalent to the term “gate electrode” used by the instant applicant. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDREW KEELAN LAOBAK whose telephone number is (703)756-5447. The examiner can normally be reached Monday - Friday 8:00am - 5:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Allen can be reached at 571-270-3176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /A.K.L./Examiner, Art Unit 1713 /JOSHUA L ALLEN/Supervisory Patent Examiner, Art Unit 1713
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Prosecution Timeline

Nov 09, 2022
Application Filed
Oct 17, 2024
Non-Final Rejection — §103
Jan 21, 2025
Response Filed
Jan 27, 2025
Final Rejection — §103
Mar 24, 2025
Request for Continued Examination
Mar 25, 2025
Response after Non-Final Action
Apr 08, 2025
Non-Final Rejection — §103
Jun 19, 2025
Response Filed
Aug 26, 2025
Final Rejection — §103 (current)

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Prosecution Projections

5-6
Expected OA Rounds
77%
Grant Probability
99%
With Interview (+28.2%)
3y 1m
Median Time to Grant
High
PTA Risk
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