DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the
“a stack of channels” and “channels” at least Claim 1, 11 and 16.
“fin structure” at least Claim 1, 11 and 16.
“the fin structure extends across a topmost surface of the second fin structure and a bottommost surface of the channels” od claim 20
must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 16 recite the limitation "the top surface of the isolation structure” in line 9. There is insufficient antecedent basis for this limitation in the claim.
For the purposes of compact prosecution, the examiner will treat “the top surface of the isolation structure” as – a top surface of the isolation structure --.
Specification
The specification is objected to as failing to provide proper antecedent basis for the claimed subject matter. See 37 CFR 1.75(d)(1) and MPEP § 608.01(o). Correction of the following is required:
The following claim terminology lack antecedent basis to originally filed specification “stack of channels” “channels” of Claim 1-20.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 11, 13, 15-20 is/are rejected under 35 U.S.C. 102(A2) as being anticipated by Xie et al. (US 10,332,803 A1).
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Regarding Claim 11, Xie (Fig. 20, 23) discloses the semiconductor device structure, comprising:
a substrate (110);
a fin structure (fin 1340. 1350) over the substrate (110), wherein
the fin structure has a channel height (height of 1350), the fin structure (1340, 1350) has a lower portion (see lower portion on annotated Fig. 20) and an upper portion (see upper portion on annotated Fig. 20);
a plurality of channels (nanosheets 1320) over the substrate (110), wherein
the channel height (height of 1350) is greater than a lateral distance between the fin structure (1340) and the channels (1320), and
the upper portion of the fin structure (see upper portion on annotated Fig. 20) continuously extends upward past at least one of the channels (1320) from the lower portion of the fin structure (see lower portion on annotated Fig. 20).
a metal gate material (high-k dielectric 1600, second work function metal 1900, additional work function metal 2000 over second work function metal 1900) wrapped around the fin structure (1350) and the channels (1320), wherein
a portion of the metal gate material (1600) is between two of the channels (1320).
Regarding Claim 13, Xie discloses the semiconductor device structure as claimed in claim 11, further comprising
an isolation structure (1380) laterally surrounding a lower portion of the fin structure (part of 1340 surrounded by 1380).
Regarding Claim 15, Xie discloses the semiconductor device structure as claimed in claim 11, wherein
a first portion of the metal gate material (1600, 1900, 2000 around 1350) wrapped around the fin structure (1350) is electrically connected to a second portion of the metal gate material (1600, 1900, 2000 around 1320) wrapped around the channels (1320).
Regarding Claim 16, Xie (Fig. 20, 23) discloses the semiconductor device structure, comprising:
a substrate (110);
a fin structure (fin 1340) over the substrate (110);
an isolation structure (1380) laterally surrounding a lower portion of the fin structure (portion 1340 surrounded by 1380) , wherein
an upper portion of the fin structure (1350) protruding from a top surface of the isolation structure (1380); and
a plurality of channels (1320) over the substrate (110), wherein
one of the channels (1320) is separated from the fin structure (1340) by a lateral distance, and the lateral distance is shorter than a height of the upper portion of the fin structure. (1350) (Fig. 20, 24)
and the upper portion of the fin structure (1340) continuously extends upward past at least one of the channels (1320) from the top surface of the isolation structure (1380).
The Examiner notes that originally filed specifications and Fig. 25A, 25B, 25B’ do not disclose the upper portion of the fin structure in direct contact with the top surface of the isolation structure, nor having bottom surface of the upper fin structure coplanar with horizontal top surface of the isolation structure.
Therefore, in order to avoid rejection under 35 U.S.C. 112 (pre-AIA ), second paragraph for new matter the limitation “the upper portion of the fin structure continuously extends upward past at least one of the channels from the top surface of the isolation structure” will be considered met as long as the upper portion of the fin structure continuously extends upward past at least one of the channels in a direction from the top surface of the isolation structure.
Regarding Claim 17, Xie (Fig. 20, 23) discloses the semiconductor device structure as claimed in claim 16, further comprising:
a gate material (high-k dielectric 1600, second work function metal 1900, additional work function metal 2000 over second work function metal 1900) wrapped around the fin structure (1350) and the channels (1320).
Regarding Claim 18, Xie (Fig. 20, 23) discloses the semiconductor device structure as claimed in claim 16, wherein
each of the channels (1320) is wider than the fin structure (1340, 1350).
Regarding Claim 19, Xie (Fig. 20, 23) discloses the semiconductor device structure as claimed in claim 16, further comprising:
a second fin structure (fin under 1320 surrounded by 1380) surrounded by the isolation structure (1380), wherein
the channels (1320) are suspended above the second fin structure (110 under 1320 surrounded by 1380).
Regarding Claim 20, Xie (Fig. 20, 23) discloses the semiconductor device structure as claimed in claim 19, wherein
the fin structure (1340, 1350) extends across a topmost surface of the second fin structure (fin under 1320 surrounded by 1380) and a bottommost surface of the channels (1320).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-6 and 8-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Xie et al. (US 10,332,803 A1) in view of Leobandung (US 2019/0214409 A1)
Regarding Claim 1, Xie (Fig. 20, 23) discloses a semiconductor device structure, comprising:
a substrate (110);
a fin structure (fin 1340) over the substrate (110), wherein
the fin structure has a channel height (height of 1350);
a stack of channels (nanosheets 1320) over the substrate (110), wherein
the channel height (height of 1350) is greater than a lateral distance between the fin structure (1340) and the stack of the channels (1320);
wherein the fin structure (fin 1340) continuously extends upward;
a metal gate material (high-k dielectric 1600, second work function metal 1900, additional work function metal 2000 over second work function metal 1900) over the channels (1320), wherein
the nanostructures (nanosheets 1320) are separated from each other by portions of the metal gate material (1600); and
Xie does not explicitly disclose the fin structure continuously extends upward past opposite surfaces of a bottommost channel of the channels and a dielectric layer surrounding the metal gate material, the nanostructures, and the fin structure
Leobandung (Fig. 12-14) discloses and a fin structure (120) continuously extends upward past opposite surfaces of a bottommost channel of a channels (lower 108) and a dielectric layer (ILD 136) surrounding a metal gate material (142), a nanostructures (108), and the fin structure (120).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify a semiconductor device structure in Xie in view of Leobandung such that the fin structure continuously extends upward past opposite surfaces of a bottommost channel of the channels and a dielectric layer surrounding the metal gate material, the nanostructures, and the fin structure in order to a first electrically conductive gate structure on the semiconductor fin to define a p-type field effect field transistor (PFET) on the semiconductor wafer [0005] and completely cover the PFET S/D elements and the NFET S/D elements [0090]
Regarding Claim 2, Xie in view of Leobandung discloses the semiconductor device structure as claimed in claim 1, wherein
the metal gate material (1600, 1900, 2000) continuously extends across the fin structure (1350) and the nanostructures (1320).
Regarding Claim 3, Xie in view of Leobandung discloses the semiconductor device structure as claimed in claim 1, wherein
the stack of the channels (1320) has a second channel height substantially equal to the channel height of the fin structure (1350) (Fig. 20).
Regarding Claim 4, Xie in view of Leobandung discloses the semiconductor device structure as claimed in claim 1, wherein
the fin structure (1350) is a portion of a p-type transistor (“pFET 2030 is formed in vGAA region 1820”), and the stack of the channels (1320) is a portion of an n-type transistor (“nFET 2020 is formed in hGAA region 1930”) (Fig. 20, 23).
Regarding Claim 5, Xie in view of Leobandung discloses the semiconductor device structure as claimed in claim 1, wherein
a width of the fin structure (1350) is smaller than a width of one of the channels (1320) (Fig. 20, 23).
Regarding Claim 6, Xie in view of Leobandung discloses the semiconductor device structure as claimed in claim 1, wherein
the fin structure (1350 ”silicon” column 12, lines 25-40]) and the substrate (110) [column 6, lines 5-53] are made of different materials.
Xie in view of Leobandung disclose limited number of materials for fin structure (120 [0072, Leobandung] and substrate (104, [0062, Leobandung]
Xie in view of Leobandung does not explicitly disclose that materials are different.
However, It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify a semiconductor device structure in Xie in view of Leobandung and select material the fin structure such that it is different from material of the substrate in order to have fins made by epitaxy process which facilitates the growth of an electrically conductive material [0072] and since that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945) (See MPEP 2144.07).
Regarding Claim 8, Xie in view of Leobandung discloses the semiconductor device structure as claimed in claim 1.
Xie in view of Leobandung does not explicitly disclose that the channel height of the fin structure is greater than 2 times of the lateral distance.
However, Xie discloses varying height of the the fin structure height of approximately 25 nm to approximately 120 nm.[column 12, lines 25-40] and column 15, lines 10-26].
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify a semiconductor device structure in Xie in view of Leobandung to select height of the fin structure such that the channel height of the fin structure is greater than 2 times of the lateral distance in order to reliably separate these adjacent structures.[column 5, lines 25-33]
Regarding Claim 9, Xie in view of Leobandung discloses the semiconductor device structure as claimed in claim 1, further comprising:
an isolation structure (isolation (STI) regions 1380) formed over the substrate (110) and laterally surrounding a lower portion of the of the fin structure (see portion of 1340 surrounded by 1380), wherein
an upper portion of the fin structure (1350) protrudes from a top surface of the isolation structure (1380), and the lower portion of the fin structure (see portion of 1340 surrounded by 1380) and the upper portion of the fin structure (1350) are made of materials.
Xie in view of Leobandung disclose limited number of materials for upper portion of the fin structure (120 [0072, Leobandung] and substrate (104, [0062, Leobandung]
Xie in view of Leobandung does not explicitly disclose that materials are different.
However, It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify a semiconductor device structure in Xie in view of Leobandung and select material the upper portion of the fin structure such that it is different from material of the lower portion of the fin structure in order to have fins made by epitaxy process which facilitates the growth of an electrically conductive material [0072] and since that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945) (See MPEP 2144.07).
Regarding Claim 10, Xie in view of Leobandung discloses the semiconductor device structure as claimed in claim 1, wherein
Xie in view of Leobandung a bottommost surface of the channels is higher than a bottommost surface of the fin structure.
However, Leobandung (Fig. 14) discloses a bottommost surface of a channels (108) is higher than a bottommost surface of the fin structure (120).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify a semiconductor device structure in Xie in view of Leobandung such that a bottommost surface of the nanostructures is higher than a bottommost surface of the fin structure in order to optimize the electron and hole mobility to improve the performance of the semiconductor device. [0061]
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Xie et al. (US 10,332,803 A1) in view of Leobandung (US 2019/0214409 A1) and further in view of Glass et al. (US 2018/0197789 A1).
Regarding Claim 7, Xie in view of Leobandung discloses the semiconductor device structure as claimed in claim 1.
Xie in view of Leobandung does not explicitly disclose the fin structure is made of SixGe1−x, X being less than 0.6.
Glass discloses a fin structure is made of SixGe1−x, X being less than 0.6. (“silicon germanium (Si.sub.xGe.sub.1-x, where x<0.2” [0001])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify a semiconductor device structure in Xie in view of Leobandung and Glass such that a the fin structure is made of SixGe1−x, X being less than 0.6 in order to provide mobility enhancement [0001].
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Xie et al. (US 10,332,803 A1).
Regarding Claim 12, Xie discloses the semiconductor device structure as claimed in claim 11,
Xie does not explicitly disclose that the channel height of the fin structure is greater than 2 times of the lateral distance.
However, Xie discloses varying height of the the fin structure height of approximately 25 nm to approximately 120 nm.[column 12, lines 25-40] and column 15, lines 10-26].
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify a semiconductor device structure in Xie in view of Leobandung to select height of the fin structure such that the channel height of the fin structure is greater than 2 times of the lateral distance in order to reliably separate these adjacent structures.[column 5, lines 25-33]
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Xie et al. (US 10,332,803 A1) in view of Glass et al. (US 2018/0197789 A1).
Regarding Claim 14, Xie discloses the semiconductor device structure as claimed in claim 13, wherein
Xie does not explicitly disclose that the upper portion of the fin structure protrudes from a top surface of the isolation structure, and the upper portion of the fin structure and the lower portion of the fin structure are made of different materials.
Glass discloses an upper portion (222/220; SiGe) [0041] of a fin structure (222/220, 212) protrudes from a top surface of an isolation structure (STI), and the upper portion (222/220) of the fin structure and a lower portion (212, bulk silicon) [0041] of the fin structure are made of different materials. (SiGe and Silicone)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify a semiconductor device structure in Xie in view of Glass such that the upper portion of the fin structure protrudes from a top surface of the isolation structure, and the upper portion of the fin structure and the lower portion of the fin structure are made of different materials in order to have silicon germanium fin-based channel structures provide mobility enhancement, which is suitable for use in many applications. [0001]
Response to Arguments
Applicant's arguments filed 01/08/2026 have been fully considered but they are not persuasive.
Regarding Applicant’s Arguments on page 7 regarding drawing objections.
The Examiner notes that originally filed Drawing do not show stack of channels nor channels.
Regarding Applicant’s arguments on page 9-11 concerning amended Claim 1.
The Examiner notes that prior art of Leobandung (Fig. 12-14) discloses newly added claim limitation a fin structure (120) continuously extends upward past opposite surfaces of a bottommost channel of a channels and It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify a semiconductor device structure in Xie in view of Leobandung such that the fin structure continuously extends upward past opposite surfaces of a bottommost channel of the channels and a dielectric layer surrounding the metal gate material, the nanostructures, and the fin structure in order to a first electrically conductive gate structure on the semiconductor fin to define a p-type field effect field transistor (PFET) on the semiconductor wafer [0005] (See rejection of Claim 1 above)
Regarding Applicant’s Arguments on Page 11-13 concerning Claim 11.
The Examiner notes that prior art of Xie discloses newly added limitation the upper portion of the fin structure (see upper portion on annotated Fig. 20) continuously extends upward past at least one of the channels (1320) from the lower portion of the fin structure (see lower portion on annotated Fig. 20).
Since the applicant did not explicitly state what is included or excluded in upper and lower portion of the fin, the Examiner, under broadest reasonable interpretation, annotated portion of the fin structure (1320) to read on newly added limitation. (See rejection of Claim 11 above)
Regarding Applicant’s arguments on Page 13-15 concerning Claim 16.
The Examiner notes that prior art of Xie discloses the upper portion of the fin structure (1340) continuously extends upward past at least one of the channels (1320) from the top surface of the isolation structure (1380).
Further, the Examiner notes that originally filed specifications and Fig. 25A, 25B, 25B’ do not disclose the upper portion of the fin structure in direct contact with the top surface of the isolation structure, nor having bottom surface of the upper fin structure coplanar with horizontal top surface of the isolation structure.
Therefore, in order to avoid rejection under 35 U.S.C. 112 (pre-AIA ), second paragraph for new matter the limitation “the upper portion of the fin structure continuously extends upward past at least one of the channels from the top surface of the isolation structure” will be considered met as long as the upper portion of the fin structure continuously extends upward past at least one of the channels in a direction from the top surface of the isolation structure.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DMITRIY YEMELYANOV whose telephone number is (571)270-7920. The examiner can normally be reached M-F 9a.m.-6p.m.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at (571) 272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DMITRIY YEMELYANOV/Examiner, Art Unit 2891
/MATTHEW C LANDAU/Supervisory Patent Examiner, Art Unit 2891