Prosecution Insights
Last updated: April 19, 2026
Application No. 17/997,158

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR MANUFACTURING DEVICE, AND SYSTEM

Non-Final OA §102§103
Filed
Oct 26, 2022
Examiner
GHYKA, ALEXANDER G
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Tokyo Electron Limited
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
97%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allow Rate
1067 granted / 1278 resolved
+15.5% vs TC avg
Moderate +14% lift
Without
With
+13.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
34 currently pending
Career history
1312
Total Applications
across all art units

Statute-Specific Performance

§101
1.2%
-38.8% vs TC avg
§103
55.4%
+15.4% vs TC avg
§102
15.8%
-24.2% vs TC avg
§112
12.2%
-27.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1278 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Group I (Claims 1-18) in the reply filed on 10/22/2025 is acknowledged. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-4, 6 and 14-17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by JP 2010-025656A. With respect to Claim 1, JP 2010—025656A discloses a method of manufacturing a semiconductor device, the method comprising: applying a liquid material containing an ionic liquid (paragraph 25) on a substrate to form a protective film (paragraph 25); transferring at an atmosphere the substrate on which the protective film is formed (Figures 1-2); and removing the protective film from the substrate that has been transferred at the atmosphere (paragraph 27). See Figures 1-2 and corresponding text, especially paragraphs 18-27. With respect to Claim 2, JP 2010—025656A discloses wherein forming the protective film is performed at the atmosphere. See paragraph 19. With respect to Claim 3, JP 2010—025656A discloses wherein forming the protective film is performed in a vacuum. See paragraph 19. With respect to Claim 4, JP 2010—025656A discloses wherein removing the protective film is performed in a vacuum. See paragraph 18. With respect to Claim 6, JP 2010—025656A discloses wherein removing the protective film is performed at the atmosphere. See paragraph 18. With respect to Claim 14, the limitation “ a physical property of the ionic liquid changes depending on an environmental factor” is inherent. The Examiner takes Official Notice of this fact. For example, changes in temperature affect the viscosity of a liquid. With respect to Claim 15, the limitation “wherein the environmental factor includes temperature” is inherent. The Examiner takes Official Notice of this fact. For example, changes in temperature affect the viscosity of a liquid. With respect to Claim 16, the limitation, “wherein the physical property includes at least one of viscosity and adhesiveness” is inherent. The Examiner takes Official Notice of this fact. For example changes, in temperature affect the viscosity of a liquid. With respect to Claim 17, JP 2010—025656A discloses wherein the ionic liquid has a property of not evaporating in a vacuum, as it is coated as liquid in vacuum. See paragraphs 18-21 of JP 2010—025656A . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 5, 7-13 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over JP 2010—025656A as applied to claims 1-4, 6 and 14-17 above, and further in view of Cohen et al (EP 2102900). JP 2010—025656A is relied upon as discussed above. Moreover, JP 2010—025656A discloses the use of the protective film in deposition apparatus which uses an electron microscope. See paragraphs 1 and 6. However, JP 2010—025656A does not disclose forming a film by plating (Claims 5, 7 and 8) or removing an oxide with HF gas (Claims 9-13) or the presence of a conductive material (Claim 18) as required by the Claims at hand. Cohen et al pertains to deposition processes and discloses the use of plating and removal of oxides on substrates which comprise a conductive material, and the analysis of the substrates by an electron microscope. See paragraphs 11 and 21. It would have been obvious to one of ordinary skill in the art to use the formation of the protective film as disclosed by JP 2010—025656A, in a process as disclosed by Cohen et al, for its known benefit of forming a semiconductor device as disclosed Cohen et al. As Cohen et al discloses plating and removal of oxides as known process steps of substrates which contain a conductive material, and their evaluation by electron microscopes, the application of the process of forming protective layers in the process of JP 2010—025656A to the processing steps of Cohen et al, for its benefit of forming semiconductor devices, would have been prima facie obvious to one of ordinary skill in the art. With respect to Claim 5, the combined make obvious after removing the protective film, forming a film on the substrate in a vacuum without exposing the substrate to an atmosphere. See paragraph 11, lines 35-40 of Cohen et al. With respect to Claim 7, the combined references make obvious after removing the protective film, forming a film on the substrate at the atmosphere. See paragraph 11, lines 35-40 of Cohen et al. With respect to Claim 8, the combined references make obvious wherein in forming the film, the film is formed by a plating method. See paragraph 11, lines 35-40, and paragraph 21 of Cohen et al. With respect to Claim 9, the combined references make obvious further including, before forming the protective film, removing the oxide generated on the substrate. See paragraphs 21 and 25 of Cohen et al. With respect to Claim 10, the combined references make obvious herein removing the oxide is performed at the atmosphere. See paragraphs 21 and 25 of Cohen et al. With respect to Claim 11, the combined references make obvious wherein removing the oxide includes removing the oxide with chemical solution containing (HF). See paragraphs 21 and 25 of Cohen et al. With respect to Claim 12, the combined references make obvious wherein removing the oxide is performed in a vacuum. The Examiner takes Official Notice that performing semiconductor processing in a vacuum is well known in the art. With respect to Claim 13, the combined references make obvious wherein removing the oxide includes: supplying a mixed gas containing a gas containing a halogen element and a basic gas to the substrate to transform the oxide to generate a reaction product; and removing the reaction product. Even though Cohen et al disclose HF solutions and not gas, the Examiner takes Official Notice that the use of HF solutions and gases are well known in the art, for their known benefit of removing oxides. With respect to Claim 18, the combined references make obvious wherein the substrate has a region where a conductive material is exposed on a surface. See paragraph 21 of Cohen et al. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALEXANDER G GHYKA whose telephone number is (571)272-1669. The examiner can normally be reached Monday-Friday 9-6. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine Kim can be reached at 571 272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. AGG January 3, 2025 /ALEXANDER G GHYKA/Primary Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Oct 26, 2022
Application Filed
Jan 03, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
97%
With Interview (+13.8%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 1278 resolved cases by this examiner. Grant probability derived from career allow rate.

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