Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 01/02/2026 and is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Response to Arguments/Amendments
Applicant's amendment to claim 3, page 5 of the remarks, filed 01/02/2026, with respect to 35 U.S.C 112(b) rejection of claims 3 and 5 has been fully considered and is not found persuasive. (See 35 U.S.C. 112(b) rejection of claims 3 and 5 below)
Applicant's amendment to claim 1 and corresponding arguments, page 5 of the remarks, filed 01/02/2026, with respect to 35 U.S.C 102(a)(1) rejection of claim 1 as unpatentable over US 8835311 B2; Collins et al.; (hereinafter “Collins”) have been fully considered and are not found persuasive.
Applicant argues in page 6 of the remarks that the reference used in Office Action, filed 10/01/2025, does not teach the limitation: “without forming a titanium nitride layer on the semiconductor substrate, depositing a tungsten nucleation layer” recited in the amended claim 1. However, examiner respectfully disagrees. Collins does provide a clear teaching of the amended claimed limitation. (See 35 U.S.C. 102(a)(1) rejection of amended claim 1 below)
Applicant's arguments to claims 2 and 13, pages 6 of the remarks, filed 01/02/2026, with respect to 35 U.S.C 103 rejections of claims 2 and 13 as unpatentable over Collins in view of US9129945B2; Lee et al.; (hereinafter “Lee”) have been fully considered and are persuasive. Hence, the rejections have been withdrawn. However, upon further consideration, a new ground(s) of rejection is made under 35 U.S.C. 103 as being unpatentable over Collins in view of US20150179461A1; Bamnolker et al.; (hereinafter “Bamnolker”). Bamnolker has been introduced in view of the amendments to claim 1, upon which claims 2 and 13 depend (see 35 U.S.C. 103 rejection of claims 2 and 13 below).
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 3 and 5 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 3 recites “a second amount of bulk tungsten over the tungsten nitride layer”. The specification discusses annealing the tungsten nitride layer before depositing the tungsten nucleation layer and the bulk tungsten over the tungsten nitride layer in [0047] but does not disclose depositing a second bulk tungsten layer between the tungsten nitride layer and the nucleation layer, see also Figure 3B. Thus, it does not reasonably convey to one skilled in the art that the inventor, at the time the application was filed, had possession of the claimed invention.
Claim 5 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre AIA ), first paragraph, by virtue of its dependency on claim 3.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3 and 5 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 3 recites “depositing a second amount of bulk tungsten over the tungsten nitride layer”. It is unclear whether “a second amount of bulk tungsten” is referencing to the bulk tungsten layer deposited over the tungsten nucleation layer and the tungsten nitride layer recited in claims 1-2 OR a separate bulk tungsten layer deposited between the tungsten nitride layer and the nucleation layer. Specifically, the specification discusses annealing the tungsten nitride layer before depositing the tungsten nucleation layer and the bulk tungsten over the tungsten nitride layer in [0047] but does not disclose depositing a second bulk tungsten layer between the tungsten nitride layer and the nucleation layer, see also Figure 3B.
Additionally, claim 3 also recites “The method of claim 2…comprises annealing the tungsten nitride layer” which contradicts the limitation “without annealing the tungsten nitride layer” recited in claim 2, upon which claim 3 depends (previously stated in the Non-Final Office Action). Thus, claim 3 is indefinite under 35 U.S.C. 112(b) for indefiniteness.
For the examination’s purpose, examiner has interpreted, under broadest reasonable interpretation (BRI):
“a second amount of bulk tungsten” to be “the bulk tungsten” (deposited over the tungsten nucleation layer and the tungsten nitride layer), as supported at least by [0047] of the specification.
“The method of claim 2” to be “The method of claim 1”, as supported at least by [0047-0048] of the specification.
Claim 5 is indefinite by virtue of its dependency on claim 3.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 3, 5, 16-17 and 19 are rejected under 35 U.S.C. 102(a)(1) as being unpatentable over Collins.
Regarding Claim 1 (currently amended), Collins teaches a method of processing semiconductor substrates (col. 1, ln. 17-20), the method comprising:
providing a semiconductor substrate (#202, Figure 2F, substrate);
without forming a titanium nitride layer on the semiconductor substrate (col. 1, ln. 45-60, the adhesion layer between the tungsten nitride barrier and the substrate can alternatively comprise a metal or alloys), depositing a tungsten nitride layer (#240, col. 7, ln. 13-15, tungsten barrier layer comprises tungsten nitride) on the semiconductor substrate (#202), the tungsten nitride layer having a thickness less than about 30 Å (col. 9, ln. 6-13, thickness of #240 is less than thickness of intermediate layer #230, wherein #203 is ranged between 10-80 Å or 30-50 Å according to col. 6, ln. 57-60).
depositing a tungsten nucleation layer (#250) over the tungsten nitride layer (#240); and
depositing a first amount of bulk tungsten (#260) over the tungsten nucleation layer (#250) and the tungsten nitride layer (#240).
Regarding Claim 3 (currently amended), Collins teaches the method as described in claim [2]1 (see 35 U.S.C. 112(b) rejection of claim 3 above), wherein Collins further teaches depositing the tungsten nitride layer (Figure 1, col. 5, ln 29-30, forming tungsten nitride layer on substrate) further comprises annealing the tungsten nitride layer prior to depositing a second amount of bulk tungsten over the tungsten nitride layer (col. 5, ln. 30-38, the tungsten nitride layer is annealed to form barrier layer before the deposition of the tungsten nucleation and bulk tungsten).
Regarding Claim 5, Collins teaches the method as described in claim 3, wherein Collins further teaches the bulk tungsten is deposited directly on the tungsten nitride layer (col. 10, ln. 1-7, formation of nucleation layer is optional and the bulk tungsten forms directly on the tungsten nitride barrier layer).
Regarding Claim 16 (currently amended), Collins teaches the method as described in claim 1, wherein Collins further teaches the tungsten nitride layer (#240, Figure 2F) is deposited on a surface of the semiconductor substrate (#202) without an intervening titanium nitride layer (col. 1, ln. 45-60, the adhesion layer between the tungsten nitride barrier and the substrate can alternatively comprise a metal or alloys), the surface comprising oxide (Figure 2F, col. 5, ln. 53-57, dielectric layer #210 disposing on surface of #202 comprises silicon oxide).
Regarding Claim 17, Collins teaches the method as described in claim 1, wherein Collins further teaches the oxide is selected from the group consisting of silicon oxide and aluminum oxide. (col. 5, ln. 53-57, the oxide of dielectric layer #210 comprises silicon oxide).
Regarding Claim 19, Collins teaches the method as described in claim 1, wherein Collins further teaches the tungsten nitride layer is deposited on a partially fabricated semiconductor substrate for forming a tungsten word line (col. 12, ln. 25-28 and ln. 54-56, the tungsten metallization layers form in word/bit-line trenches of the substrate).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 2 and 12-15 are rejected under 35 U.S.C. 103 as being unpatentable over Collins in view of Bamnolker.
Regarding Claim 2, Collins teaches the method of processing semiconductor substrates as described in claim 1.
Collins does not teach the tungsten nucleation layer and the bulk tungsten are deposited over the tungsten nitride layer without annealing the tungsten nitride layer.
However, Bamnolker teaches a comparable method of processing a semiconductor substrate (Figure 4, [0004-0005], method comprises at least sequentially forming a nitride layer, a tungsten nucleation layer and a bulk tungsten over a substrate), wherein the tungsten nucleation layer and the bulk tungsten are deposited over the tungsten nitride layer without annealing the tungsten nitride layer ([0088], layers such as nitride layer, which can be either a titanium nitride layer or a tungsten nitride layer according to [0004], and tungsten layers can be deposited without any annealing step).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the invention disclosed by Collins with the teaching of Bamnolker in order to determine the effect of annealing on uniformity of deposited layers according to Bamnolker, [0088].
Regarding Claim 12, Collins in view of Bamnolker teaches the method as described in claim 1.
Collins does not teach the method further comprising annealing the semiconductor substrate at a temperature between about 500°C. and about 800°C.
However, Bamnolker teaches annealing the semiconductor substrate at a temperature between about 500°C. and about 800°C ([0040], to achieve low resistivity, annealing of the substrate is conducted at relative low temperature such as about 500°C).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the invention disclosed by Collins with the teaching of Bamnolker in order to further reduce the film resistivity according to Bamnolker, [0040], and to have selected the overlapping portion of the temperature ranges disclosed by Bamnolker because selection of overlapping portion of ranges has been held to be a prima facie case of obviousness. See MPEP § 2144.05.I.
Regarding Claim 13, Collins in view of Bamnolker teaches the method as described in claim 12.
Collins does not teach the semiconductor substrate is annealed after depositing the tungsten nitride layer and before depositing the tungsten nucleation layer.
However, Bamnolker teaches the semiconductor substrate is annealed after depositing the tungsten nitride layer and before depositing the tungsten nucleation layer ([0080-0081], the substrate with a titanium nitride/tungsten nitride barrier layer, [0004], can be annealed before any tungsten deposition steps which includes the nucleation layer deposition as described in [0053]).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the invention disclosed by Collins with the teaching of Bamnolker for the reason set forth in the rejection of claim 12.
Regarding Claim 14, Collins in view of Bamnolker teaches the method as described in claim 12.
Collins does not teach the semiconductor substrate is annealed after depositing the bulk tungsten.
However, Bamnolker teaches the semiconductor substrate is annealed after depositing the bulk tungsten ([0027], annealing can be performed after deposition of the bulk tungsten).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the invention disclosed by Collins with the teaching of Bamnolker for the reason set forth in the rejection of claim 12.
Regarding Claim 15, Collins in view of Bamnolker teaches the method as described in claim 12, wherein Collins further teaches the temperature (see rejection of claim 12 for the annealing temperature of the substrate) is less than a temperature at which tungsten nitride decomposes (Collins, col. 1, ln. 51-55, tungsten nitride decomposes at temperature ranging from 700°C to 1000°C).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Collins in view of US 7691749 B2; Levy et al.; (hereinafter “Levy”).
Regarding Claim 4 (currently amended), Collins teaches the method of processing semiconductor substrates as described in claim 1.
Collins does not explicitly teach the depositing the tungsten nitride layer, the depositing the tungsten nucleation layer, and the depositing the first amount of bulk tungsten are performed without breaking vacuum.
However, Levy teaches a method for depositing tungsten nitride layer on a substrate (col. 2, ln. 18-21), wherein the depositing the tungsten nitride layer, the depositing the tungsten nucleation layer, and the depositing the first amount of bulk tungsten are performed without breaking vacuum. (col. 12, ln. 21-24, the deposition of tungsten nitride layer, tungsten nucleation and tungsten bulk are performed without vacuum break).
It would have been obvious to one of ordinary skill in the art prior to the effective filling date of the claimed invention to combine the invention disclosed by Collins with the teaching of Levy by known method, as each element merely performs the same function on comparable devices as it does separately (formation of film stack includes sequentially depositing tungsten nitride, nucleation and bulk tungsten on substrate, see Levy, col. 14, ln. 17-30) and yields predictable result. See MPEP 2143(I)(A).
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Collins in view of Levy, further in view of US 2018/0174901; Wang et al.; (hereinafter “Wang”).
Regarding Claim 11, Collins in view of Levy teaches the method of processing semiconductor substrates as described in claim 4.
Collins does not explicitly teach the depositing the tungsten nitride layer, the depositing the tungsten nucleation layer, and the depositing the bulk tungsten are performed in the same chamber.
However, Wang teaches a method of processing semiconductor substrate ([0003], features filled in substrate fabrication), the depositing the tungsten nitride layer, the depositing the tungsten nucleation layer, and the depositing the bulk tungsten are performed in the same chamber. (Figure 1 and 10, remote plasma process for the deposition of tungsten nitride liner layer #102 and tungsten nucleation #104 corresponds to block #1001, see [0059] and the selective deposition of bulk tungsten #108 corresponds to block #1003, see [0060], wherein #1001 and #1003 can be performed in the same or different stations of a single chamber according to [0065], see also Figure 11A).
It would have been obvious to one of ordinary skill in the art prior to the effective filling date of the claimed invention to modify the invention disclosed by Collins in view of Levy with the teaching of Wang in order to maintain a same pressure environment for the substrate while being transferred between processing stations without needing to include transfer ports according to Wang, [0069].
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Collins in view of US 2018/0174901; Wang et al.; (hereinafter “Wang”).
Regarding Claim 18, Collins teaches the method of processing semiconductor substrates as described in claim 1.
Collins does not explicitly teach the tungsten nitride layer is deposited on a partially fabricated semiconductor substrate for forming a 3D NAND structure.
However, Wang teaches the tungsten nitride layer is deposited on a partially fabricated semiconductor substrate for forming a 3D NAND structure (the deposition of tungsten nitride liner layer #102 on word line structure, see [0029], is used to fill vertical features of vertical NAND/ 3D NAND according to [0058]).
It would have been obvious to one of ordinary skill in the art prior to the effective filling date of the claimed invention to combine the invention disclosed by Collins with the teaching of Wang, as it was merely simple substitution of one known element for another (tungsten filled word lines on substrate in comparable devices, see Wang, [0058]) to obtain predictable result. See MPEP 2143(I)(B).
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TIEN TRAN whose telephone number is (571)272-6967. The examiner can normally be reached Monday-Thursday 9:00 am - 6:00 pm ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, CHRISTINE S KIM can be reached on (571)272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/TIEN TRAN/Examiner, Art Unit 2812
/CHRISTINE S. KIM/ Supervisory Patent Examiner, Art Unit 2812