DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on July 8, 2026, has been entered.
Specification
The objection to the title is withdrawn in view of applicants’ submission of a replacement title.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 6-7, 9-17, and 21-24 is/are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Appl. Publ. No. 2009/0314205 to Patalay, et al. (hereinafter “Patalay”) in view of U.S. Patent Appl. Publ. No. 2014/0273410 to Abedijaberi, et al. (“Abedijaberi”) and further in view of U.S. Patent Appl. Publ. No. 2003/0143410 to Won, et al. (“Won”).
Regarding claim 6, Patalay teaches an apparatus for depositing a layer of semiconductor material on a substrate wafer (see the Abstract, Figs. 1-5, and entire reference) comprising:
an upper cover and a lower cover defining a reactor chamber (see Fig. 1 and ¶¶[0034]-[0038] which teach an upper quartz window (107) and lower quartz window (108));
a base ring disposed between the upper and lower covers (see Fig. 1 and ¶¶[0034]-[0038] which teach a base ring (106) which includes components disposed between windows (107) and (108));
a carrier to hold the substrate wafer during the deposition of the layer (see Fig. 1 and ¶¶[0034]-[0038] which teach a susceptor (102) to hold a substrate);
a gas inlet and a gas outlet to pass process gas over an upper side of the substrate wafer (see Fig. 1 and ¶¶[0034]-[0038] which teach a gas inlet (110) and outlet (111));
a slit valve tunnel and a slit valve door (see Fig. 1 and ¶¶[0034]-[0038] which specifically teach that the internal volume (109) is closed off by a slit valve and slit valve opening (not shown)); and
a rotating lift to lift and turn the carrier and the substrate wafer (see Fig. 1 and ¶¶[0034]-[0038] which teach a support structure (118) which is capable of lifting and rotating the susceptor (102) and substrate),
wherein one or more components include stainless steel and are arranged such that surfaces of the one or more components are exposed to process gas during deposition (see at least ¶[0045] which teaches the use of a stainless tube for temperature measurement which is understood to mean stainless steel and is necessarily includes one or more surfaces exposed to process gases within the internal chamber volume; moreover, stainless steel is ubiquitous in vapor deposition chambers (i.e., for CVD, MBE, ALD, and the like) in the microelectronics industry and a person of ordinary skill in the art prior to the effective filing date of the invention would be motivated to construct one or more components such as the base ring, gas inlet and outlet, and slit valve from a material such as stainless steel in order to benefit from its high strength, high operating temperatures, and corrosion resistance).
Even if it is assumed arguendo that Patalay does not teach that one or more components include stainless steel and are arranged such that surfaces of the one or more components are exposed to process gas during deposition, this would have been obvious in view of Abedijaberi. In at least Figs. 1-3 and ¶¶[0032]-[0042] Abedijaberi teaches an analogous embodiment of a horizontal chemical vapor deposition (CVD) system (100) for thin film deposition from the vapor phase. The CVD system (100) includes, inter alia, a processing chamber (102) for depositing thin films on a substrate (104) by passing precursor gas(es) in through a gas manifold (140) and then out through a gas discharge port (108). As disclosed specifically in Fig. 1 and ¶[0038] the CVD system (100) includes chamber walls (130) and (132) which are typically fabricated from metallic materials such as stainless steel while Fig. 3 and ¶[0040] further specifies that the gas manifold (140) includes a baffle plate (145) which may be made of passivated stainless steel which is exposed to the process gases that flow therethrough. Thus, a PHOSITA prior to the effective filing date of the invention would look to the teachings of Abedijaberi and would be motivated to produce at least a gas manifold that forms part of the inlet (110) in the apparatus of Patalay from a material such as passivated stainless steel which is directly exposed to the process gas(es) during deposition due to, inter alia, its corrosion resistance and ability to withstand high temperatures during film growth. Moreover, in this case the use of stainless steel would involve nothing more than the use of a known material suitable for its intended use which is prima facie obvious. Use of a known material based on its suitability for its intended use has been held to support a prima facie determination of obviousness. Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1947). See also MPEP 2144.07.
Patalay and Abedijaberi do not teach that the surfaces include a coating having silicon and hydrogen. However, in Figs. 2-3 and ¶¶[0030]-[0037] as well as elsewhere throughout the entire reference Won teaches an analogous system and method for film growth by CVD from gaseous precursors. In ¶¶[0008]-[0009] and ¶[0033] Won specifically teaches the desirability of conditioning or seasoning the interior of the CVD chamber by depositing a thin inactive film on interior surfaces prior to performing film growth in order to minimize contamination of the subsequently deposited thin film. In ¶¶[0034]-[0037] Won further teaches an embodiment in which interior surfaces are coated with a layer of hydrogenated amorphous silicon (a-Si:H) for this purposes using hydrogen (H2) and silane (SiH4) as process gases. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Won and would be motivated to coat interior surfaces of the CVD apparatus of Patalay and Abedijaberiwith a layer of a-Si:H in order to reduce the propensity for contamination of subsequently deposited thin films with material arising from interior surfaces of the CVD apparatus. The combination of prior art elements according to known methods to yield predictable results has been held to support a prima facie determination of obviousness. All the claimed elements are known in the prior art and one skilled in the art could combine the elements as claimed by known methods with no change in their respective functions, with the combination yielding nothing more than predictable results to one of ordinary skill in the art. KSR International Co. v. Teleflex Inc., 550 U.S. 398, __, 82 USPQ2d 1385, 1395 (2007). See also, MPEP 2143(A).
Regarding claim 7, Patalay does not teach that the coating is an amorphous silicon or a functionalized silicon coating thereon. However, as noted supra with respect to the rejection of claim 6, in ¶¶[0008]-[0009] and ¶[0033] Won specifically teaches the desirability of conditioning or seasoning the interior of the CVD chamber by depositing a thin inactive film on interior surfaces prior to performing film growth in order to minimize contamination of the subsequently deposited thin film. In ¶¶[0034]-[0037] Won further teaches an embodiment in which interior surfaces are coated with a layer of hydrogenated amorphous silicon (a-Si:H) for this purposes using hydrogen (H2) and silane (SiH4) as process gases. Thus, a PHOSITA prior to the effective filing date of the invention would look to the teachings of Won and would be motivated to coat interior surfaces of the CVD apparatus of Patalay with a layer of a-Si:H in order to reduce the propensity for contamination of subsequently deposited thin films with material arising from interior surfaces of the CVD apparatus.
Regarding claim 9, Patalay and Abedijaberi teach that the one or more components include a gas supply line and an outgoing gas line (See Fig. 1 and ¶¶[0034]-[0038] of Patalay which teach a gas inlet (110) and outlet (111) which are connected to a gas supply line and outgoing gas line, respectively. See also at least Fig. 3 and ¶[0040] of Abedijaberi which specifically teaches that the gas manifold (140) includes a baffle plate (145) which may be made of passivated stainless steel. Accordingly, a PHOSITA prior to the effective filing date of the invention would be motivated to produce components which constitute the gas inlet (110) and outlet (111) of Patalay from passivated stainless steel in order to benefit from its corrosion resistance and ability to withstand high temperatures during film growth.).
Regarding claim 10, Patalay does not teach that the gas supply line is coated with the coating. However, as noted supra with respect to the rejection of claim 6, in ¶¶[0008]-[0009] and ¶[0033] Won specifically teaches the desirability of conditioning or seasoning the interior of the CVD chamber by depositing a thin inactive film on interior surfaces prior to performing film growth in order to minimize contamination of the subsequently deposited thin film. In ¶¶[0034]-[0037] Won further teaches an embodiment in which interior surfaces are coated with a layer of hydrogenated amorphous silicon (a-Si:H) for this purposes using hydrogen (H2) and silane (SiH4) as process gases. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Won and would be motivated to coat interior surfaces of the CVD apparatus of Patalay and Abedijaberi, including at least a portion of the gas supply and outgoing gas lines with a layer of a-Si:H in order to reduce the propensity for contamination of subsequently deposited thin films with material arising from interior surfaces of the CVD apparatus. Moreover, it is noted that the process of coating the chamber interior itself will necessarily cause at least a portion of the gas supply and outgoing gas lines to be coated with the desired coating.
Regarding claim 11, Patalay does not teach that the outgoing gas line is coated with the coating. However, as noted supra with respect to the rejection of claim 6, in ¶¶[0008]-[0009] and ¶[0033] Won specifically teaches the desirability of conditioning or seasoning the interior of the CVD chamber by depositing a thin inactive film on interior surfaces prior to performing film growth in order to minimize contamination of the subsequently deposited thin film. In ¶¶[0034]-[0037] Won further teaches an embodiment in which interior surfaces are coated with a layer of hydrogenated amorphous silicon (a-Si:H) for this purposes using hydrogen (H2) and silane (SiH4) as process gases. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Won and would be motivated to coat interior surfaces of the CVD apparatus of Patalay, including at least a portion of the gas supply and outgoing gas lines with a layer of a-Si:H in order to reduce the propensity for contamination of subsequently deposited thin films with material arising from interior surfaces of the CVD apparatus. Moreover, it is noted that the process of coating the chamber interior itself will necessarily cause at least a portion of the gas supply and outgoing gas lines to be coated with the desired coating.
Regarding claim 12, Patalay does not teach that the one or more components includes one or more of the upper cover, the lower cover, the base ring, the slit valve tunnel, the slit valve door, and the rotating lift. However, as noted supra with respect to the rejection of claim 6, in Fig. 1 and ¶[0038] Abedijaberi teaches that the CVD system (100) includes chamber walls (130) and (132) which are typically fabricated from metallic materials such as stainless steel while Fig. 3 and ¶[0040] of Abedijaberi further specify that the gas manifold (140) includes a baffle plate (145) which may be made of passivated stainless steel which is exposed to the process gases that flow therethrough. Then in ¶¶[0008]-[0009] and ¶[0033] Won specifically teaches the desirability of conditioning or seasoning the interior of the CVD chamber by depositing a thin inactive film on interior surfaces prior to performing film growth in order to minimize contamination of the subsequently deposited thin film. In ¶¶[0034]-[0037] Won further teaches an embodiment in which interior surfaces are coated with a layer of hydrogenated amorphous silicon (a-Si:H) for this purposes using hydrogen (H2) and silane (SiH4) as process gases. Thus, a PHOSITA prior to the effective filing date of the invention would look to the teachings of Abedijaberi and Won and would be motivated to produce at least the slit valve tunnel and/or slit valve door in the apparatus of Patalay from a material such as passivated stainless steel coated with a layer of a-Si:H which is directly exposed to the process gas(es) during deposition due to, inter alia, its corrosion resistance and ability to withstand high temperatures during film growth.
Regarding claim 13, Patalay teaches that the reactor chamber is configured as a single-wafer reactor (see Fig. 1 and ¶¶[0034]-[0038] which teach that the support structure (118) is configured to lift and rotate a susceptor (102) carrying a single wafer).
Regarding claim 14, Patalay teaches that the upper and lower covers are respectively upper and lower domes (see Fig. 1 and ¶¶[0034]-[0038] which teach an upper quartz window (107) and lower quartz window (108) which may be considered as upper and lower domes, respectively).
Regarding claim 15, Patalay teaches that the reactor is configured to deposit an epitaxial layer on the substrate wafer (see Fig. 1 and ¶[0033] which teach that the reactor is configured for epitaxial deposition onto a substrate wafer).
Regarding claim 16, Patalay does not teach that the amorphous silicon coating is present. However, as noted supra with respect to the rejection of claim 6, in ¶¶[0008]-[0009] and ¶[0033] Won specifically teaches the desirability of conditioning or seasoning the interior of the CVD chamber by depositing a thin inactive film on interior surfaces prior to performing film growth in order to minimize contamination of the subsequently deposited thin film. In ¶¶[0034]-[0037] Won further teaches an embodiment in which interior surfaces are coated with a layer of hydrogenated amorphous silicon (a-Si:H) for this purposes using hydrogen (H2) and silane (SiH4) as process gases. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Won and would be motivated to coat interior surfaces of the CVD apparatus of Patalay with a layer of a-Si:H in order to reduce the propensity for contamination of subsequently deposited thin films with material arising from interior surfaces of the CVD apparatus.
Regarding claim 17, Patalay does not teach that the amorphous silicon coating includes a composition represented by the formula a-Si:H. However, as noted supra with respect to the rejection of claim 6, in ¶¶[0008]-[0009] and ¶[0033] Won specifically teaches the desirability of conditioning or seasoning the interior of the CVD chamber by depositing a thin inactive film on interior surfaces prior to performing film growth in order to minimize contamination of the subsequently deposited thin film. In ¶¶[0034]-[0037] Won further teaches an embodiment in which interior surfaces are coated with a layer of hydrogenated amorphous silicon (a-Si:H) for this purposes using hydrogen (H2) and silane (SiH4) as process gases. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Won and would be motivated to coat interior surfaces of the CVD apparatus of Patalay with a layer of a-Si:H in order to reduce the propensity for contamination of subsequently deposited thin films with material arising from interior surfaces of the CVD apparatus.
Regarding claim 21, Patalay teaches that the carrier includes a susceptor (see Fig. 1 and ¶¶[0034]-[0038] which teach a susceptor (102) to hold a substrate).
Regarding claim 22, Patalay does not teach that the coating is applied by chemical vapor deposition. However, as noted supra with respect to the rejection of claim 6, in ¶¶[0008]-[0009] and ¶[0033] Won specifically teaches the desirability of conditioning or seasoning the interior of the CVD chamber by depositing a thin inactive film on interior surfaces prior to performing film growth in order to minimize contamination of the subsequently deposited thin film. In ¶¶[0034]-[0037] Won further teaches an embodiment in which interior surfaces are coated with a layer of hydrogenated amorphous silicon (a-Si:H) for this purposes using hydrogen (H2) and silane (SiH4) as process gases during CVD deposition. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Won and would be motivated to coat interior surfaces of the CVD apparatus of Patalay with a layer of a-Si:H by CVD in order to reduce the propensity for contamination of subsequently deposited thin films with material arising from interior surfaces of the CVD apparatus.
Regarding claim 23, Patalay teaches a method for depositing a layer on a substrate wafer, the method comprising:
providing the apparatus of claim 6; disposing the substrate wafer in the reactor chamber (see Fig. 1 and ¶¶[0034]-[0038] which teach disposing a wafer on the susceptor (102) located within the CVD growth apparatus (100)); and
depositing an epitaxial layer of semiconductor material on the substrate wafer (see specifically ¶¶[0005]-[0009] and ¶[0033] which teach methods in which epitaxial deposition is performed on the wafer).
Regarding claim 24, Patalay teaches that the epitaxial layer of semiconductor material is deposited on the substrate wafer at 1000 to 1300°C (see specifically ¶[0009] which teaches that epitaxial deposition is performed at temperatures from room temperature to about 1,200 °C).
Claims 8 and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Patalay in view of Abedijaberi and further in view of Won and still further in view of Japanese Patent Appl. Publ. No. JP 2011-146596 A to Kawahara, et al. (“Kawahara”).
Regarding claim 8, Patay, Abedijaberi, and Won do not teach that the functionalized silicon coating is present and includes a composition represented by the formula a-SiOx:CHy. However, in Fig. 1 and the Description of Embodiments section at pp. 3-7 as well as elsewhere throughout the entire reference Kawahara teaches analogous system and method for the deposition of an organic silica film on a substrate in which a precoat film comprised of SiCOH is deposited on interior surface of the CVD chamber from precursors such as silane, TEOS, and an oxidizing gas. The SiCOH precoat layer is primarily used to reduce the time required to clean the chamber after film growth, but would also be reasonably expected to reduce the propensity for contaminants to become incorporated in the organic silica film as internal components are coated by the SiCOH layer before and during film growth. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would be motivated to produce the hydrogenated amorphous silicon pre-coat layer of Won utilizing gaseous SiCOH precursors such that a functionalized Si coating comprised of a-SiOx:CHy is produced in order to promote ease of chamber cleaning after film growth and to reduce the propensity for contamination when depositing an organic silica film.
Regarding claim 18, Patalay does not teach that the amorphous silicon coating includes a composition represented by the formula a-SixC1-x:H. However, as noted supra with respect to the rejection of claim 6, in at least ¶¶[0034]-[0037] Won teaches an embodiment in which interior surfaces are coated with a layer of hydrogenated amorphous silicon (a-Si:H) in order to minimize contamination of the deposited film by using hydrogen (H2) and silane (SiH4) as process gases. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Won and would be motivated to coat interior surfaces of the CVD apparatus of Patalay and Abedijaberiwith a layer of a-Si:H in order to reduce the propensity for contamination of subsequently deposited thin films with material arising from interior surfaces of the CVD apparatus. In this case the use of a-Si:H meets the claim as it is a composition where x = 1. Even if it is assumed arguendo, that the coating includes carbon (i.e., x ≠ 1), as noted supra with respect to the rejection of claim 17, in Fig. 1 and the Description of Embodiments section at pp. 3-7 as well as elsewhere throughout the entire reference Kawahara teaches analogous system and method for the deposition of an organic silica film on a substrate in which a precoat film comprised of SiCOH is deposited on interior surface of the CVD chamber from precursors such as silane, TEOS, and an oxidizing gas. The SiCOH precoat layer is primarily used to reduce the time required to clean the chamber after film growth, but would also be reasonably expected to reduce the propensity for contaminants to become incorporated in the organic silica film as internal components are coated by the SiCOH layer before and during film growth. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would be motivated to produce the hydrogenated amorphous silicon pre-coat layer of Won utilizing gaseous SiCOH precursors such that a Si coating comprised of a-SixC1-x:H is produced in order to promote ease of chamber cleaning after film growth and to reduce the propensity for contamination when depositing an organic silica film.
Claims 19-20 and 25 is/are rejected under 35 U.S.C. 103 as being unpatentable over Patalay in view of Abedijaberi and further in view of Won and still further in view of U.S. Patent Appl. Publ. No. 2006/0286774 to Singh, et al. (“Singh”).
Regarding claim 19, Patalay, Abedijaberi, and Won do not teach that the substrate wafer has a diameter of at least 200 mm. However, in at least Fig. 4, ¶[0038], and ¶[0191] Singh teaches an analogous system and method for the growth of epitaxial Si layers onto one or more substrates. In ¶[0191] Singh specifically teaches that industry standard substrates may have a diameter of 200 or 300 mm. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Singh and would be motivated to configure the CVD apparatus of Patalay and Won for deposition onto substrates having a diameter of at least 200 mm in order to enable processing of industry-standard wafer sizes and to maximize the number of devices that may be formed per wafer.
Regarding claim 20, Patalay, Abedijaberi, and Won do not teach that the substrate wafer has a diameter of at least 300 mm. However, in at least Fig. 4, ¶[0038], and ¶[0191] Singh teaches an analogous system and method for the growth of epitaxial Si layers onto one or more substrates. In ¶[0191] Singh specifically teaches that industry standard substrates may have a diameter of 200 or 300 mm. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would look to the teachings of Singh and would be motivated to configure the CVD apparatus of Patalay and Won for deposition onto substrates having a diameter of at least 300 mm in order to enable processing of industry-standard wafer sizes and to maximize the number of devices that may be formed per wafer.
Regarding claim 25, Patalay, Abdijaberi, and Won do not teach that the substrate wafer and/or the epitaxial layer are doped with an electrically active dopant. However, in at least Fig. 4, ¶[0038], and ¶¶[0155]-[0158] Singh teaches an analogous system and method for the growth of epitaxial Si layers onto one or more substrates. In ¶¶[0155]-[0158] Singh specifically teaches that the substrate and/or the epitaxial layer may be doped with one or more electrically active dopant such as boron, arsenic, or phosphorous as part of a process for forming electronic devices thereupon. Thus, a person of ordinary skill in the art prior to the effective filing date of the invention would be motivated to utilize a doped Si substrate and/or epitaxial layer as part of a process for forming one or more electronic devices thereupon.
Response to Arguments
Applicant's arguments filed July 8, 2026, have been fully considered, but they are not persuasive and are moot in view of the new grounds of rejection set forth in this Office Action.
Applicant argues that Patalay does not disclose that the stainless tube is a component with a surface exposed to process gas during deposition. See applicants’ 7/8/2026 reply, pp. 6-7. This argument is not found persuasive since in order for the stainless tube to facilitate temperature measurement, at least a portion of the stainless tube must be present within the process chamber in close proximity to or with a direct line of sight to the substrate and/or susceptor. This would therefore mean that at least a portion of the stainless tube is exposed to process gases within the reaction chamber as recited in claim 6.
Applicant repeats their argument that Won does not teach or suggest depositing the amorphous silicon film on stainless steel and instead teaches that the aforementioned film is deposited on ceramic or anodized aluminum liners and there is no motivation to apply an amorphous silicon film to stainless steel components. Id. at pp. 7-8. This argument is not found persuasive for reasons noted in the Response to Arguments section of the April 8, 2026, final Office Action. In particular, applicant’s argument amounts to arguing against the references individually since in this case, it is Patalay and now Abdijaberi rather than Won that are relied upon to teach the use of one or more stainless steel components. Won is then introduced to teach a coating including silicon and hydrogen as claimed. Second, there is nothing in Won that specifically teaches that its chamber seasoning process can only be applied to aluminum or ceramic components. The step of avoiding or minimizing contamination by depositing a thin inactive film on interior surfaces may be utilized regardless of whether the chamber is constructed of aluminum, a ceramic, or stainless steel as each is comprised of materials that may function as a potential source of contaminants. In ¶[0034] Won specifically teaches that the “PECVD chamber was pretreated with an a-Si seasoning process” and does not specify that the chamber itself must be manufactured from a ceramic material or anodized aluminum. This is further supported by at least ¶[0040] of Abdijaberi which teaches the use of passivated stainless steel which is understood as being stainless steel which has been treated in some way to minimize the propensity for contamination.
Applicant then argues that Singh does not show that stainless steel reactor components are ubiquitous because Singh is directed to a different deposition reactor and technique which utilizes UV/photoexcitation-assisted deposition at temperatures less than 550 °C while Patalay operates at temperatures of 650 to 1,150 °C. Id. at pp. 8-9. Applicants’ argument is found unpersuasive for reasons noted in the April 8, 2026, final Office Action. Moreover, applicant’s argument appears to be based on arguments of counsel rather than factually supported objective evidenced. In at least ¶[0009] Patalay specifically teaches that the process chamber may operate at temperatures from 25 to 1,200 °C not just 650 to 1,150 °C. Moreover, both Singh and Patalay disclose reactors which utilize chemical vapor deposition (CVD) in order to deposit a thin film and, hence, are considered analogous art. Just because Singh may use photoexcitation-assisted deposition does not mean that the teachings of Singh are not relevant and cannot be applied to the system of Patalay. In any case, the Examiner has introduced Abedijaberi to specifically teach the newly added claim limitations which relate to the use of stainless steel components. In this case Abedijaberid discloses the use of a CVD reactor having a nearly identical structure to that of Patalay.
Applicant then argues that the teachings of Kawahara also do not show that the use of stainless steel components is ubiquitous in the art because Kawahara teaches the formation of insulating films at low temperatures. Id. at pp. 9-10. This argument also is found unpersuasive since, for one, it is based on arguments of counsel rather than factually supported objective evidence. Moreover, this argument is unpersuasive for reasons analogous to those discussed supra with respect to Singh. In any case, the Examiner has introduced the teachings of Abedijaberi to teach the use of one or more stainless steel components as recited in claim 6.
Applicant specifically argues against the rejection of claim 8 and 18 by contending that Kawahara is directed to a low temperature chamber for applying a peelable insulating material rather than a high temperature reactor for applying an epitaxial layer and by contending that Kawahara does not each or suggest an a-SixC1-x:H coating. Id. at pp. 10-11. As an initial matter it is noted that Won teaches the use of an a-Si:H coating which reads upon claim 18 when x = 1 as there is no carbon present. In any case, as noted supra, at least ¶[0009] of Patalay specifically teaches that the process chamber may operate at temperatures from 25 to 1,200 °C not just 650 to 1,150 °C and, consequently, is not limited to high temperature growth. Moreover, both Kawahara and Patalay disclose reactors which utilize chemical vapor deposition (CVD) in order to deposit a thin film and, hence, are considered analogous art. Just because the apparatus of Kawahara deposits an insulating material does not mean that the teachings of Kawahara are not relevant and cannot be applied to the system of Patalay. With respect to the reliance on Kawahara to teach an a-Si:H coating that includes carbon it is noted that even if Kawahara seeks to minimize the carbon concentration, there is, in fact, at least some carbon present. Since there is carbon present in the a-Si:H layer this therefore meets the claim as there is no recitation that there has to be a minimum amount of carbon present or that there cannot be elements other than carbon. Moreover, even if the precoat layer utilized in the method of Kawahara is for a different purpose it still meets the claim as the end result is an apparatus in which one or more stainless steel components are coated with an a-SixC1-x:H coating and the Examiner has provided a suitable motivation for utilizing a coating film comprised of SiCOH as taught by Kawahara.
Conclusion
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/KENNETH A BRATLAND JR/Primary Examiner, Art Unit 1714
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