DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 02/19/2026 has been entered.
Response to Arguments
Applicant’s amendments and the accompanying arguments with respect to the trap-rich layer and the intermediate layer, in claims 1 and 3, have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Laboutin et al. (US 2018/0069085).
Applicant’s additional arguments in reference to the references previously applied in the rejections under 35 U.S.C 103 have been fully considered but they are not persuasive.
Applicant argued the range of 500-2,000 µm of Ikuta for the thickness of the substrate cannot suggest limiting the thickness of the substrate to 1,000 µm or more.
However, Ikuta discloses a range of thicknesses, 500-2000 µm, paragraph 28, and where the claimed ranges overlap or lie inside ranges disclosed by the prior art a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976).
Ikuta further discloses that “The thickness of the substrate is determined as appropriate considering, for example, the warpage of the layers after the epitaxial growth”, end of paragraph 28. Ikuta thereby provides a teaching, suggestion, and motivation for the only parameter not explicitly taught by Matsumoto and does so in considering the same parameter for the same reason as Applicant (warpage), see the last full paragraph on page 9 of the specification.
Here, Applicant argued that while the problem of warpage is disclosed by the prior art, plastic deformation is not.
However, the fact that the inventor has recognized another advantage which would flow naturally from following the suggestion of the prior art cannot be the basis for patentability when the differences would otherwise be obvious. See Ex parte Obiaya, 227 USPQ 58, 60 (Bd. Pat. App. & Inter. 1985).
Applicant argued the oxygen content of the substrate of Matsumoto is disclosed as on the surface and/or within a particular distance from the surface while the oxygen content as claimed is of the substrate per se.
However, the broadest reasonable interpretation of “a silicon single crystal substrate having…an oxygen concentration of less than 1×1017 atoms/cm3,” as is claimed, encompasses oxygen content at or near the surface of the substrate. Therefore the surface oxygen content disclosed by Matsumoto meets the claim. Nevertheless, Matsumoto further discloses oxygen content of the interior of the substrate that also satisfies the claimed range, see paragraph 109.
For at least these reasons, the combination of references remains proper and renders the invention as claimed obvious.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 3 are rejected under 35 U.S.C. 103 as being unpatentable over Matsumoto et al. (US 2021/0151314) in view of Ikuta et al. (US 2015/0340230) and Laboutin et al. (US 2018/0069085).
In reference to claim 1, Matsumoto et al. (US 2021/0151314), hereafter “Matsumoto,” discloses a method for producing a nitride semiconductor wafer, in which a nitride semiconductor thin film is grown on a silicon single crystal substrate by vapor phase growth, comprising, by using a silicon single crystal substrate, paragraphs 3 and 21, having a resistivity of 1000 Ω-cm or more, and an oxygen concentration of less than 1x1017 atoms/cm3, paragraphs 19, 66, and 109, growing the nitride semiconductor thin film on the silicon single crystal substrate by vapor phase growth, paragraphs 72-78.
Matsumoto does not disclose a substrate with a thickness of 1000 µm or more or
wherein prior to growing nitride semiconductor thin film, a trap-rich layer that reduces the lifetime of carriers is formed on the silicon single-crystal substrate, followed by forming an intermediate layer acting as a buffer layer on the trap-rich layer.
Ikuta et al. (US 2015/0340230), hereafter “Ikuta,” discloses a method of making a nitride semiconductor wafer including teaching using a silicon single crystal substrate with a thickness of 1000 µm or more, paragraph 28. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the substrate to have a thickness of 1000 µm or more. One would have been motivated to do so in order to prevent warpage of the deposited layers, id.
Laboutin et al. (US 2018/0069085), hereafter “Laboutin,” discloses an analogous method of producing a nitride semiconductor wafer including teaching, prior to growing nitride semiconductor thin film 552-558 in Figure 5, a trap-rich layer that reduces the lifetime of carriers, 536 (e.g., 436, 236), paragraphs 53 and 47, is formed on the silicon single-crystal substrate 502, followed by forming an intermediate layer 550 acting as a buffer layer on the trap-rich layer, paragraph 53.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to form a trap-rich layer that reduces the lifetime of carriers is on the silicon single-crystal substrate prior to growing nitride semiconductor thin film, followed by forming an intermediate layer acting as a buffer layer on the trap-rich layer. One would have been motivated to do so in order to make the substrate more resistive and/or prevent formation of a parasitic channel in a semiconductor device, paragraphs 47 and 55, and transition materials from the substrate to the nitride semiconductor film, paragraph 53.
In reference to claim 3, Matsumoto discloses a nitride semiconductor wafer, having a nitride semiconductor thin film 20, 30 in Figure 1, on a silicon single crystal substrate 10, paragraphs 72-78,
wherein the silicon single crystal substrate, paragraphs 3 and 21, has a resistivity of 1000 Ω-cm or more, and an oxygen concentration of less than 1x1017 atoms/cm3, paragraphs 19, 66, and 109.
Matsumoto does not disclose a substrate with a thickness of 1000 µm or more, or
wherein between the nitride semiconductor thin film and the silicon single-crystal substrate, a trap-rich layer that reduces the lifetime of carriers is formed on the silicon single-crystal substrate, and an intermediate layer acting as a buffer layer is formed on the trap-rich layer.
Ikuta discloses a method of making a nitride semiconductor wafer including teaching using a silicon single crystal substrate with a thickness of 1000 µm or more, paragraph 28. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the substrate to have a thickness of 1000 µm or more. One would have been motivated to do so in order to prevent warpage of the deposited layers, id.
Laboutin discloses an analogous nitride semiconductor wafer including teaching between the nitride semiconductor thin film, 552-558 in Figure 5, and the silicon single-crystal substrate 502, a trap-rich layer that reduces the lifetime of carriers, 536 (e.g., 436, 236), paragraphs 53 and 47, is formed on the silicon single-crystal substrate 502, and an intermediate layer 550 acting as a buffer layer is formed on the trap-rich layer, paragraph 53.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for a trap-rich layer that reduces the lifetime of carriers to be formed on the silicon single-crystal substrate between the nitride semiconductor thin film and the silicon single-crystal substrate, and an intermediate layer acting as a buffer layer to be formed on the trap-rich layer. One would have been motivated to do so in order to make the substrate more resistive and/or prevent formation of a parasitic channel in a semiconductor device, paragraphs 47 and 55, and transition materials from the substrate to the nitride semiconductor film, paragraph 53.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Matsumoto et al. (US 2021/0151314) in view of Ikuta et al. (US 2015/0340230) and Laboutin et al. (US 2018/0069085) as applied above and further in view of Aida et al. (US 2016/0265140).
In reference to claim 2, Matsumoto does not disclose after the nitride semiconductor thin film is grown by vapor phase growth, surface of the silicon single crystal substrate opposite to the surface on which the nitride semiconductor thin film is grown is polished to thin the silicon single crystal substrate.
Aida et al. (US 2016/0265140) discloses a method of making a nitride semiconductor wafer including teaching after the nitride semiconductor thin film 40 (42) in Figure 9A, is grown by vapor phase growth, surface of the silicon single crystal substrate opposite to the surface on which the nitride semiconductor thin film is grown is polished to thin the silicon single crystal substrate, Figures 9B and 9B, paragraph 262. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to polish the surface of the silicon single crystal substrate opposite to the surface on which the nitride semiconductor thin film is grown to thin the silicon single crystal substrate after the nitride semiconductor thin film is grown by vapor phase growth. One would have been motivated to do so in order to remove unneeded portions of the substrate, paragraph 262.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Abe et al. (US 2013/0082355), Adachi (JP 2012151401 A), and Nakanishi et al. (JP 2000351692 A) disclose related substrates for nitride semiconductor growth.
Pawlak et al. (US 2021/0280703) and Brech et al. (US 2020/0395447) disclose similar trap-rich and buffer layers.
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/BRYAN R JUNGE/Primary Examiner, Art Unit 2897
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