Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-6,11-13,22 and 24 are rejected under 35 U.S.C. 102(a)(1) as being fully anticipated by Shroff et al., “High Transmission pellicles for extreme ultraviolet lithography reticle protection”, J. Vac. Sci. Technol. B, Vol.28 (C6E36) (2010).
Shroff et al., “High Transmission pellicles for extreme ultraviolet lithography reticle protection”, J. Vac. Sci. Technol. B, Vol.28 (C6E36) (2010) (cited by applicant) teaches the formation of pellicles by bonding a thin silicon film onto a nickel wire mesh. The structure is illustrated in the figures
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The reference teaches a pellicle membrane which is the composite of the mesh and the thin silicon film. Between the wires of the mesh, there are gaps which are not wire mesh. This represents an in-plane variation in the composition of the pellicle membrane. The claims do not require the silicon to have an in plane variation, but embraces the silicon layer as a coating which is part of the pellicle membrane
Claims 1-6,8,11-13,22 and 24 are rejected under 35 U.S.C. 102(a)(1) as being fully anticipated by Pollentier et al. “EUV lithography imaging using novel pellicle membranes”, Proc. SPIE, Vol. 9776 Articles 977620 (14 pages)(2016)
Pollentier et al. “EUV lithography imaging using novel pellicle membranes”, Proc. SPIE, Vol. 9776 Articles 977620 (14 pages)(2016) (cited by applicant) describes a pellicle formed of silicon nitride etched using a resist a 3D pattern of holes (see figure 2 and associated text)
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There is also a disclosure of a stand alone pellicle of carbon nanotubes coated with a protective layer using atomic layer deposition (figure 14b)
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The carbon nanotube film has gaps between the nanotubes and the surface of each of the nanotubes is coated.
With respect to claims 1-6,8,11-13,22 and 24, the silicon nitride pellicle meets the claims.
With respect to claims 1-6,11-13,22 and 24, the ALD coated carbon nanotube pellicle meets the claims.
Claims 1-9 and 12-13 are rejected under 35 U.S.C. 102(a)(1) as being fully anticipated by Ogusu et al. JP 2002-189112.
Ogusu et al. JP 2002-189112 (machine translation attached, cited by applicant w/o translation) teaches a silicon dioxide substrate, which is etched with a blaze shape with a period of 2.80 microns and a depth of 427 nm [0013].
The pellicle membrane is met by the grating structure. The applicant could obviate this rejection by requiring a frame (see prepub at [0007]), reciting that the pellicle is for EUV and that the undesired radiation filtered in deep ultraviolet (DUV, see prepub at [0011]).
Claims 1-6,8,9,11-13.22 and 24 are rejected under 35 U.S.C. 102(a)(1) as being fully anticipated by Bristol 20050042153.
Bristol 20050042153 (cited by applicant) teaches with respect to figures 4 and 5, a 70nm silicon film (5002) with embedded support beams (502). A polymer membrane (400) with embedded fibers (504) is also disclosed.
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A discussion of how to form a pellicle of silicon dioxide film with embedded metal fibers is disclosed with respect to figures 6 and 6A. The technique may start with a Si wafer 610. A 35-.mu.m thick layer 608 of SiO.sub.2 on the Si wafer 610 is deposited at 620. At 622, a plurality of 25-.mu.m wide "I" beam spaces are patterned on the exposed surface of the SiO.sub.2 layer 608, 25-.mu.m deep "I" beam spaces are etched in the SiO.sub.2 layer 608, and metal is electroplated to form a plurality of 25-.mu.m deep "I" beams 602. Other depths and widths besides 25 .microns may be used, and the "I" beams 602 may be 1 mm apart, as shown in FIG. 6. The technique at 624 may polish back the "I" beams 602 and/or SiO2 layer 608. If tensioned-wire apparatuses are used, there may not need to be a polish back. The technique may deposit TiN on the exposed metal beams 602, 604 to promote Si-metal adhesion. The technique at 628 may deposit a 70-nm Si layer 606 on top of the SiO.sub.2 layer 608 using a heteroepitaxial process or CVD process [0039-0043].
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Claims 1-6,8,9,11-13.22 and 24 are rejected under 35 U.S.C. 102(a)(1) as being fully anticipated by Goldstein et al. 20080158535.
Goldstein et al. 20080158535 (cited by applicant) teaches with respect to figure 2A-C, the formation of an EUV pellicle where a wire mask (105) is deposited on a sacrificial substrate (135) and then coated with a thin film (115) of silicon dioxide or the like and then the sacrificial substrate (135) is removed
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The thin coating and the pattern with the gaps between them meet the in-plane variation.
Claims 1,2,5,6,8,9,11-13.22 and 24 are rejected under 35 U.S.C. 102(a)(1) as being fully anticipated by Sjmaenok et al. WO 2010015508.
Sjmaenok et al. WO 2010015508 (cited by applicant) teaches with respect to figure 3C, the optical element 100 further comprises EUV transparent material particles 160, wherein the EUV transparent material particles 160 are dispersed within the nanotube sheet 110. This embodiment may be combined with the embodiments described above, i.e. the optical element 100 comprises a transparent material layer 150 and transparent material particles 160 dispersed within the nanotube sheet. Such an embodiment is not schematically depicted, but can be seen as a combination of the embodiments schematically depicted in Figures 3b and 3c. The EUV transparent material particles 160 of the optical element 100 may comprise one or more elements selected from the group consisting of Be, B, C, Si, P, S, K, Ca, Sc, Sr, Rb, Y, Zr, Nb, Mo, Ru, Rh, Ag, Ba, La, Ce, Pr, Ir, Au, Pa and U, especially B, C, Si, Sr, Sc, Ru, Mo, Y and Zr, even more especially Zr. The transparent material particles 160 may be metallic particles 160 (for those elements that may be metallic at room temperature). For instance, the transparent material particles 160 may comprise metallic silicon layer particles 160 or metallic zirconium particles 160. Compounds comprising one or more of these elements may be applied as transparent material layer 150. In an embodiment, the EUV transparent material particles 160 of the optical element 100 may comprise one or more materials selected from the group consisting of oxides, borides, and nitrides, which are solid at room temperature, of the one or more elements selected from the group consisting of Be, B, C, Si, P, S, K, Ca, Sc, Sr, Rb, Y, Zr, Nb, Mo, Ru, Rh, Ag, Ba, La, Ce, Pr, Ir, Au, Pa and U. Examples of such systems are for instance silicon oxide, zirconia, etc. Hence, also here oxides and/or borides and/or nitrides may be applied. Especially, those oxides, borides, and nitrides are applied that are solid at temperatures above about 200.sup.0C, especially above about 400.sup.0C, such as in the range of about 400-800.sup.0C. [0081] A potential advantage of using the material layer 150 in combination with the carbon nanotube sheet 110, especially metallic material particles 160, such as those of Si, Zr, Ru, Th, Mo, etc., is that the heat generated in the material particles 160 may relatively easily dissipated by the nanosheet 110, because of the relative high thermal emissivity of the carbon nanotube sheet 110. Combinations of such elements may be applied, either as different type of particles 160, or as particles 160 comprising compounds or alloys. Hence, in an embodiment, the EUV transparent material particles 160 of the optical element 100 may comprise one or more materials 155 selected from the group consisting of SiC, B.sub.4C and Si.sub.3N.sub.4, especially B.sub.4C. In another embodiment, the EUV transparent material particles 160 may comprise Si particles 160 and Zr particles 160. In an embodiment, the EUV transparent material particles 160 may comprise B.sub.4C particles 160 [0078-0082]. Grating spectral filter 51 may optionally be present, depending upon the type of lithographic apparatus. Further, there may be more mirrors present than those shown in the Figures, for example there may be 1-4 more reflective elements present than 58, 59. Radiation collectors 50 are known from the prior art [0058]. Hence, "grating spectral purity filter" is herein further indicated as "spectral purity filter" which includes gratings or transmissive filters. Not depicted in Figure 2, but also included as optional optical element may be EUV transmissive optical filters, for instance arranged upstream of collector mirror 50, or optical EUV transmissive filters in illumination unit 44 and/or projection system PS [0060]. For instance, the absorption of undesired radiation by the nanotube sheet 110 may not be sufficient in some parts of the spectral region; the material layer 150 may complement this, thereby providing an embodiment of the optical element 100 even better reducing undesired radiation relative to EUV radiation. For instance, carbon may relatively strongly absorb radiation between about 45 and 105 nm, whereas Zr may relatively strongly absorb radiation in the range between about 25 and 45 nm, and in the range of about 85-150 nm [0072].
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Claims 1-8,12-13 and 22 and 24 are rejected under 35 U.S.C. 102(a)(1) as being fully anticipated by Collin et al. 20130187049.
Collin et al. 20130187049 (cited by applicant) in figure 6 shows a scanning electron microscope image of an exemplary structured membrane 30 manufactured by using the method described previously, comprising first and second rods 32 and 34 of substantially square section of 500 nm size, the rods being respectively parallel to two directions D.sub.1 and D.sub.2 at right angles and being arranged according to a same period T of the order of 3 .mu.M. The rods are thus organized in this example in the form of a substantially square pattern 33 repeated in each of the directions. Since the period of the first and second rods is identical, the cut-off wavelengths .lamda..sub.c for an incident wave polarized with a polarization TE in the direction D.sub.1 and D.sub.2 are identical. In normal incidence, this makes it possible, notably, to switch off the wavelength .lamda..sub.c in a radiation transmitted independently of the polarization of the incident wave. In this example, the first and second rods have the same width and the same thickness, and the width of the resonance is therefore identical for the components of the field in the directions D.sub.1 and D.sub.2. Thus, in this example, in addition to the qualities of robustness and stability of the filter produced in this way, the incident wave transmitted by the membrane is spectrally filtered independently of the polarization of the incident field [0053]. Figure 7 shows the transmission characteristics. [0054]. FIG. 1 represents a cross-sectional view of a filter equipped with a self-suspended membrane in an exemplary embodiment of the invention. This is an illustrative diagram in which the elements are not represented to true scale. The filter generally comprises a substrate 10, an orifice 20 passing through the substrate 10 and a structured membrane 30 suspended above the orifice 20 [0038].
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FIG. 2 provides a simplified description of the steps of an exemplary method for manufacturing a bandpass filter according to the invention, for example of the type of that described in FIG. 1. In a first step S1, a layer 40 of dielectric material is deposited on the front face of a substrate 10 (face intended to receive the incident light, see FIG. 1). The deposition can be performed by a plasma-assisted gaseous phase chemical deposition technique. A thickness of the layer 40 of dielectric material is generally between 0.5 microns and a few microns. The dielectric material may be, for example, a nitride such as silicon nitride (Si.sub.3N.sub.4), a carbide such as silicon carbide (SiC), an oxide such as silicon dioxide (SiO.sub.2), manganese oxide (MnO), alumina (Al.sub.2O.sub.3), a sulfide such as zinc sulfide (ZnS), a fluoride such as yttrium trifluoride (YbF.sub.3). In a second step S2, the structured membrane 30 is formed by using, for example, a UV or electronic lithography method so as to obtain a grating with the desired pattern. In a third step S3, the orifice 20 is etched on the rear face of the substrate 10 according to a given pattern (square, rectangular, etc. aperture). The orifice 20 passes through the substrate 10 such that the membrane 30 is suspended at a peripheral portion of an aperture 210 of the orifice 20. The etching of the substrate 10 can be performed, for example, by chemical etching in a bath of tetramethylammonium hydroxide (TMAH). Prior to the chemical bath, a rear face of the substrate 10 can be covered with a layer of silicon oxide (SiO.sub.2) including a passage for the TMAH. This makes it possible to selectively etch the rear face of the substrate. The form of the passage on the layer of silicon oxide deposited on the rear of the substrate 10 is linked to the form of the orifice 20 obtained by etching. It is also possible to protect the front face and the structure with one or more protection layers. Typically, the surface area of the aperture 210 of the orifice 20 on the front face of the substrate 10 is of the order of from a few square millimeters to several hundred square millimeters [0041].
Claims 1-7,9,12,13, 22 and 24 are rejected under 35 U.S.C. 102(a)(1) as being fully anticipated by Lee et al. KR 20190115681.
Lee et al. KR 20190115681 (machine translation attached, cited by applicant w/o translation) teaches with respect to figure 4, a support (102) coated with an etch stop layer (103), and a silicon pellicle layer (104). A patterned ion implantation masks is provided and masks the implantation of boron, phosphorous, arsenic, yttrium, zirconium, niobium or molybdenum. The mask is removed and an etch mask (107) is formed on both sides of the substrate, patterned using a photoresist and used to mask an etch of the substrate to form the pellicle frame. The hardmask and etch masks are then removed [0043-0051]
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The alternating doped and undoped areas constitute an in-plane variation
Claims 1-7,9,11-13, 22 and 24 are rejected under 35 U.S.C. 102(a)(1) as being fully anticipated by Nishiyama JP 2014211474.
Nishiyama JP 2014211474 (machine translation attached) teaches with respect to figure 1 the formation of an EUV pellicle beginning with a support substrate layer (10) with a oxide/BOX layer (20), which is coated with a thin silicon film.(30). The backside of the substrate is provided with a photoresist (40), which is then patterned using photolithography and then used to etch the support substrate layer (10) to form a honeycomb structure. The BOX layer is then etched with this honeycomb pattern and a pellicle frame (50) attached [0017-0020].
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Figures 4 shows a cross-sectional structure of the EUV pellicle film thus prepared. As shown in FIG. 4, a thin oxide film layer 90 is provided between the surface of the silicon thin film layer 30 and the reinforcing material 60 imparted with spreadability. The second embodiment of the present invention has a structure for further reinforcing the beam portion. FIG. 5 illustrates the steps of the second embodiment. In order to form a reinforcing structure (reinforcing member) on a portion other than the membrane surface, a positive photosensitive material 70 is placed in a liquid state on the surface of an oxide film layer (silicon oxide layer) 90 formed on the silicon thin film layer 30. It is applied and developed by irradiating ultraviolet rays or radiation 80 of appropriate energy from the surface side on which the beam portion is formed. When the photosensitive material 70 itself is used as a reinforcing member, the EUV pellicle film 300 having a reinforcing structure can be formed when the development is completed [0031-0032].
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FIG. 6 shows the steps of the third embodiment of the present invention. Unlike the second embodiment, this embodiment uses a negative photosensitive material 70 as the photosensitive material 70. First, as shown in FIG. 6 a, a negative photosensitive material 70 is applied in a liquid state to the surface of the oxide film layer 90 formed on the silicon thin film layer 30. Next, as shown in FIG. 6b), development is performed by irradiating ultraviolet rays or radiation 80 of appropriate energy from the surface on which the beam portion is formed. As a result, as shown in FIG. 6 c, only the beam portion is exposed. Next, as shown in d) of FIG. 6, a reinforcing material 60 is applied on the oxide film layer 90. Finally, the photosensitive material 70 is removed using a known lift-off method, and a reinforcing structure such as metal is formed on the beam structure (so as to overlap the beam portion in plane view) as shown in FIG. The provided EUV pellicle film 400 is formed. In this case, after removing the photosensitive material 70, a reinforcing material can be thinly laminated on the entire surface from the silicon thin film layer 30 side as in the first embodiment. By doing so, it is possible to form the EUV pellicle film 500 having a reinforcing structure on both the beam portion and the membrane portion. In FIG. 6, the reinforcing member thinly laminated on only one side is formed, but it may be formed on both sides.
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The BOB (20)/silicon oxide (90) and the frame/spaces each are part of in-plane variations in the composition.
Claims 1-7,9,11-13, 22 and 24 are rejected under 35 U.S.C. 102(a)(1) as being fully anticipated by Akiyama et al. 20120045714.
Akiyama et al. 20120045714 teaches with respect to figures 4A-G, a an SOI substrate is provided (FIG. 4A). The SOI substrate has an SOI layer 10 of single crystal silicon on a handle substrate 20 via a BOX layer 40 of silicon oxide film. In the case of 8 inch (200 mm) substrate, since the thickness is generally on the order of 700 .mu.m, the substrate may be ground, polished, or otherwise thinned on the handle substrate side to reduce the thickness to a desired thickness (for example, 400 .mu.m or smaller). This is because an unnecessarily tall support member may be a burden on the subsequent etching process. With the thickness previously reduced on the handle substrate side, required time for the etching process may also be reduced. Next, an anti-oxidizing film 30a is formed on the SOI layer 10 of single crystal silicon, as necessary (FIG. 4B). A protective film 60 for protecting the SOI layer 10 may be provided on the surface where the SOI layer 10 is provided (here, on the anti-oxidizing film 30a), as necessary (FIG. 4C). An example of such a protective film includes a silicon oxide film (SiO.sub.x), a silicon nitride film (SiN.sub.x), and a silicon oxynitride film (SiO.sub.xN.sub.y). Subsequently, an etching mask 70 for forming a mesh structure is formed on the handle substrate (back side) (FIG. 4D), and dry etching is performed such that uncovered areas where the etching mask 70 is absent constitute a porous portion. The etching mask 70 and the protective film 60 provided on the SOI layer side are then removed, and insulating layers, or the BOX layer 40, in areas exposed by the porous portion are further removed to obtain a pellicle for lithography with a pellicle film of single crystal silicon (FIG. 4F). At this time, in order to prevent oxidation of portions of the SOI layer 10 exposed by the porous portion, an anti-oxidizing film 30b may be provided. As shown in FIG. 4G, filters 50a and 50b for transmitting a gas are further provided on an outer frame portion 20a of a support member [0053-0057].
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The (40/30b) regions and the frame/spaces each are part of in-plane variations in the composition.
Claims 1-9,11-14,18,19,22 and 24 are rejected under 35 U.S.C. 102(a)(1) as being filly anticipated by Li et al. CN 103018806.
Li et al. CN 103018806 (machine translation attached) teaches a sub EUV metallic transmission grating with respect to figure 4. The silicon substrate is polished on both sides, coated with a silicon nitride layer and then backside etched to form a window with a frame. This is then coated with a resist (HSQ), which is exposed and developed to form a 80 nm period grating pattern. A chromium layer is then coated over the resist. The resist and overlaying chromium is then removed (lift-off process). Gold is then coated on the chromium and the gold on the horizontal surfaces is removed by ion etch to yield an EUV transmission grating [0035-0042].
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Claims 1-9,11-13, 22 and 24 are rejected under 35 U.S.C. 102(a)(1) as being fully anticipated by Zhang et al. CN 111575653.
Zhang et al. CN 111575653 (machine translation attached) teaches forming a X ray grating where a silicon sheet is polished, coated with a resist, which is patterned with an X-ray grating pattern by exposure and development. This is then used to etch the silicon surface. The resist is then removed and a metal with a high atomic number is evaporated to fill the grooves and the excess metal is removed using adhesive tape [0007-0022]. Tungsten and lead are used as the fill material.
The examiner points out that claims 1-9 and 11-13 only require the membrane, not a the membrane mounted onto a frame. These claims are met by patterned substrates, such as gratings. The language of claims 22 and 23 are broad enough to embrace the finished article in an apparatus used for it’s processing/manufacture. The claims do not require it to be a lithographic exposure apparatus or that it is mounted onto a mask/photomask.
Claims 1-9,11-14,16,18, 22 and 24 are rejected under 35 U.S.C. 102(a)(1) as being fully anticipated by Takuda et al. JP 2018-132707.
Takuda et al. JP 2018-132707 (machine translation attached) teaches FIG. 8B-1 to FIG. 8B-4 are schematic views for explaining a process of forming a plurality of through grooves 5a in the second X-ray low absorber 5. In the second embodiment, the RIE mask layer 8 is formed on the surface of the second X-ray low absorber 5 as shown in FIG. The RIE mask layer 8 is a mask used for reactive ion etching (RIE). For example, a silicon dioxide film, an aluminum oxide film, or the like can be used. Thereafter, as shown in FIG. 8B-2, a photomask 9 is disposed above the RIE mask layer 8, and a groove is formed in the RIE mask layer 8 by an etching process. The photomask 9 is formed by photolithography so that the through groove 5a has a width L and the grating pitch of the absorption grating 1 is P. Then, as shown in FIG. 8 (B-3), the through groove 5a (see FIG. 8 (B-4)) is formed in the second X-ray low absorber 5 by the plasma gas 11. It is known that a processing shape close to vertical can be obtained by adding an appropriate amount of He, Cl .sub.2 , CF .sub.4 , SF .sub.6 , BCl .sub.3 or the like based on O .sub.2 as a plasma gas for RIE. Thereafter, as shown in FIG. 9C, the X-ray high absorber 3a is filled into the plurality of through grooves 5a formed in the second X-ray low absorber 5 by electrolytic plating. Then, as shown in FIG. 9D, the surfaces of the second X-ray low-absorber lattice portion 2 and the X-ray high-absorber lattice portion 3 are flattened [0070-0072].
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The pellicle membrane limitations are met by the teachings.
Claims 1-9, 11-13, 22 and 24 are rejected under 35 U.S.C. 102(a)(1) as being fully anticipated by Yokoyama 9748012.
Yokoyama 9748012 describes The first silicon part 11, the second silicon parts 12a, the first insulating layers 12c, and the second insulating layers 12d function to transmit X-ray, and the metal parts 12b function to absorb X-ray. Accordingly, the metal grating structure DG according to one aspect functions as a diffraction grating by appropriately setting the predetermined interval P according to the wavelength of X-ray. A metal composing the metal part 12b is preferentially selected from the metals absorbing X-ray. Examples of the metal include metal elements or precious metal elements having a relatively heavy atomic weight, specifically, gold (Au), platinum (Pt), rhodium (Rh), ruthenium (Ru), and iridium (Ir). Further, the metal part 12b has an appropriate thickness H so as to sufficiently absorb X-ray according to the device specifications, for instance. In view of the above, the ratio (aspect ratio=thickness/width) of thickness H to width W of the metal part 12b is set to an aspect ratio as high as 5 or more. The width W of the metal part 12b corresponds to the length of the metal part 12b in the direction (width direction) Dy orthogonal to the one direction (longitudinal direction) Dx, and the thickness H of the metal part 12b corresponds to the length of the metal part 12b in the direction (depth direction) Dz normal to the plane DxDy defined by the one direction Dx and the direction Dy orthogonal to the one direction Dx The metal grating structure DG provided with the metal parts 12b having such a high aspect ratio is manufactured by a resist layer forming step of forming a resist layer on a principal plane of a silicon substrate; a patterning step of patterning the resist layer to remove the patterned portion of the resist layer; an etching step of etching the silicon substrate at a portion where the resist layer is removed by a dry etching method to form a concave portion of a predetermined depth; an insulating layer forming step of forming an insulating layer on an inner surface of the concave portion in the silicon substrate by a thermal oxidation method; a removing step of removing a portion of the insulating layer formed on a bottom portion of the concave portion; and an electroforming step of applying a voltage to the silicon substrate to fill the concave portion with metal by an electroforming method. For instance, the concave portion is a slit groove in the case of a one-dimensional grating structure, and is a columnar hole (columnar pore) in the case of a two-dimensional grating structure. In the following, a method for manufacturing the metal grating structure DG in which the concave portion is a slit groove is described in detail. The same description is applied to a configuration, in which a concave portion has another shape such as a columnar hole (5/33-6/13). Subsequently, the slit groove SD is filled with metal by applying a voltage to the silicon substrate 30 by an electroforming method (electroplating method) (electroforming step, see FIG. 4C). More specifically, the negative pole of a power source 44 is connected to the silicon substrate 30, and an anode electrode 45 connected to the positive pole of the power source 44 and the silicon substrate 30 are immersed in a plating solution 46. In the case where a silicon oxide film is formed on a portion of the silicon substrate 30 connected to the negative pole of the power source 44, the portion of the silicon substrate 30 is removed for electrical conduction between the negative pole of the power source 44 and the silicon substrate 30. By performing the above operation, metal is precipitated and grown on the bottom portion of the slit groove SD by electroforming from the silicon substrate 30 (plate like portion 31) side. Then, when the slit groove SD is filled with metal, the electroforming is ended. By performing the above operation, the metal grows by the same thickness H as the plate like portion 32 of the silicon substrate 30. In this way, the slit groove SD is filled with metal, and the metal part 12b is formed. The metal is preferentially selected from the elements capable of absorbing X ray, for instance, metal elements or precious metal elements having a relatively heavy atomic weight, specifically, gold (Au), platinum (Pt), rhodium (Rh), ruthenium (Ru), iridium (Ir), indium (In), and nickel (Ni) (12/32-57).
The pellicle membrane limitations are met by the teachings.
Claims 1-9,11-13, 22 and 24 are rejected under 35 U.S.C. 102(a)(1) as being fully anticipated by Yokoyama 20160240276.
Yokoyama 20160240276 teaches in order to produce the X-ray metal grating structure according to this embodiment, first of all, a flat plate-shaped grating-forming workpiece 11 made of a given electrically-conductive material is preliminarily prepared (FIG. 2A). In this embodiment, a silicon substrate 30 is preliminarily prepared as one example of the grating-forming workpiece 11. The use of the silicon substrate 30 made of silicon as the grating-forming workpiece 11 makes it possible to utilize so-called “silicon fabrication techniques” in which microfabrication techniques have been almost established, so as to produce a microstructural grating region 14 with a relatively high degree of accuracy, and form a plurality of high-aspect ratio slit grooves SD, as one example of the recesses 11c. Preferably, the silicon substrate 30 is n-type silicon in which most carriers are electrons. The n-type silicon has abundant conduction electrons. Thus, when the silicon is connected to a negative electrode, and a negative potential is applied thereto to cause polarization at a cathode, a so-called “ohmic contact” is established with respect to a plating solution 47 in an aftermentioned electroforming step, and a resulting current flow is likely to cause a reduction reaction, resulting in an increase in metal precipitation.
Then, a plurality of slit grooves SD is formed as the recesses 11c to thereby form, in one principal surface of the silicon substrate 30, a grating region 14 in which a plurality of structural portions 11b mutually having the same shape are periodically provided (grating forming step; FIGS. 2B to FIG. 3B).
In one example of the grating forming step, first of all, a resist layer 33a is formed on the principal surface of the silicon substrate 30 (resist layer forming sub-step). Then, this resist layer 33 is patterned, and the patterned portion thereof is removed (patterning sub-step; FIGS. 2C, 2D and 3A). The resist layer means a layer functioning as a protective film against etching during the etching.
For example, the resist layer 33a may be composed of a silicon oxide film (a silicon dioxide film, a quartz film or a SiO.sub.2 film) having an insulating property and resistance to a subsequent etching process for the silicon substrate 30. This silicon oxide film 33a is used as the resist layer 33a to be patterned, and a photosensitive resin layer (photoresist film) 40 is used to pattern the silicon oxide film 33a. The term “having resistance” does not mean that an influence of etching is fully eliminated during an etching process, but means that the influence of etching is relatively lowed. This means that during a period of etching a target portion, it is possible to serve as a protective film capable of protecting a non-target portion which should not be etched.
More specifically, the silicon oxide film 33a is formed as the resist layer 33a on a surface of the silicon substrate 30. The silicon oxide film 33a is formed by any one of heretofore-known commonplace means, such as a thermal oxidation process, a chemical vapor deposition process, an anodic oxidation processor, and other deposition process (other vapor deposition process or a sputtering process). As one example, in the thermal oxidation process, an oxygen atmosphere (which may contain inert gas) or water vapor is introduced into a quartz tube in which the silicon substrate 30 is disposed, and the quartz tube is heated by a heater, so as to heat the silicon substrate 30 to a high temperature in the oxygen atmosphere or in a gaseous atmosphere of the water vapor, so that a silicon oxide film 33a having a given thickness is formed on the surface of the silicon substrate 30. As another example, in the chemical vapor deposition (CVD) process, tetraethoxysilane (TEOS) as one type of organic silane is heated and bubbled by carrier gas to form TEOS gas, and then oxidation gas such as oxygen or ozone, and dilution gas such as helium, are mixed with the TEOS gas, to form raw material gas. Then, the raw material gas is introduced into a CVD apparatus such as a plasma CVD apparatus or a normal-temperature ozone CVD apparatus, and a silicon oxide film 33a having a given thickness is formed on a surface of the silicon substrate 30 inside the CVD apparatus. As yet another example, in the anodic oxidization process, a positive electrode of a power supply is connected to the silicon substrate 30, and a cathode electrode connected to the negative electrode of the power supply and the silicon substrate 30 are immersed in an electrolyte solution. Then, upon supplying current, a silicon oxide film 33a having a given thickness is formed on a surface of the silicon substrate 30. The silicon oxide film 33a is formed at least on an upper surface of the silicon substrate 30. Alternatively, it may also be formed on a back surface and/or a side surface thereof. The use of the silicon oxide film 33a as the resist layer 33a makes it possible to use any one of the heretofore-known commonplace means such as the thermal oxidation process, the chemical vapor deposition process and the anodic oxidation process, and thus relatively easily form the silicon oxide film 33a.
Subsequently, a photosensitive resin layer 40 is formed on the silicon oxide film 33a formed on the silicon substrate 30, for example, by spin coating (FIG. 2B). The photosensitive resin layer 40 used here is a material which is usable in lithography and whose physical properties such as solubility are changed by light (including not only visible light but also ultraviolet light), an electron beam or the like. However, the present invention is not limited thereto. For example, in place of the photosensitive resin layer 40, a resist layer for electron beam exposure may be used. Subsequently, as a photolithography sub-step, the photosensitive resin layer 40 is patterned by a lithography process (FIG. 2C), and the patterned portion thereof is removed (FIG. 2D). More specifically, a lithography mask 41 is put on the photosensitive resin layer 40, and ultraviolet light 42 is radiated onto the photosensitive resin layer 40 through the lithography mask 41, so that the photosensitive resin layer 40 is subjected to pattern exposure and development (FIG. 2D). Then, an unexposed portion (or exposed portion) of the photosensitive resin layer 40 is removed (FIG. 2D). Subsequently, the silicon oxide film 33a is patterned in such a manner that a portion of the silicon oxide film 33a corresponding to a portion of the photosensitive resin layer 40 removed by etching is removed using the patterned photosensitive resin layer 40 as a mask (FIG. 3B). More specifically, the silicon oxide film 33a is patterned, for example, by reactive etching (RIE) using CHF.sub.3 gas. Alternatively, the silicon oxide film 33a may be patterned, for instance, by wet etching using hydrofluoric acid. The etching of the silicon oxide film 33a as the resist layer 33a in the patterning sub-step may be performed by any other etching process.
As above, this embodiment, the resist layer (first resist layer) 33a serving as a first pattern mask for etching the silicon substrate 30 is formed, and further the photosensitive resin layer (second resist layer) 40 serving as a second pattern mask for etching the resist layer 33a is formed. Then, in order from the side of the surface, the photosensitive resin layer 40 is patterned using the lithography mask 41, and the resist layer 33a is patterned using the patterned photosensitive resin layer 40 as a mask.
Then, a portion of the silicon substrate 30 corresponding to portions of the photosensitive resin layer 40 and the resist layer 33a removed by dry etching is etched in the direction Dz, i.e., the normal direction to reach a given depth H. In this manner, the slit grooves SD (one example of the recesses 11c) is formed (FIG. 3B; etching sub-step). FIG. 5 depicts one example of a structure of the silicon substrate 30 after the etching sub-step. In this connection, FIG. 3B depicts a section of the silicon substrate 30 taken along the line I-I in FIG. 5.
More specifically, the silicon substrate 30 is etched by ICP (Inductively Coupled Plasma) dry etching to the given depth H from the surface of the silicon substrate 30, using the patterned photosensitive resin layer 40 and resist layer 33a as a mask. Through this ICP dry etching, the photosensitive resin layer 40 is removed. Further, the resist layer 33a may also be slightly etched.
The ICP dry etching is capable of performing vertical etching with a high aspect ratio. Thus, it is preferably an ASE process using an ICP apparatus. The ASE (Advanced Silicon Etch) process is configured to repeatedly perform a step of etching a silicon substrate by RIE (reactive ion etching) using F radicals and F ions in SF.sub.6 plasma, and a step of depositing a polymer film having a composition close to Teflon (trademark) on a wall surface through a polymerization reaction of CF.sub.X radicals and ions thereof in C.sub.4F.sub.8 plasma to act as a protective film. Further, in view of the capability of performing vertical etching with a high aspect ratio, it is more preferable to alternately perform a side wall protection and a bottom surface etching by alternately repeating a SF.sub.6 plasma rich state and a C.sub.4F.sub.8 plasma rich state, as in a Bosch process. The dry etching process is not limited to the ICP dry etching, but may be any other technique. For example, an etching technique may be parallel plate type reactive ion etching (RIE), magnetic neutral line plasma (NLD) dry etching, chemically assisted ion beam (CAIB) etching, or electron cyclotron resonance reactive ion beam (ECRIB) etching. A plate-shaped portion (layer-shaped portion or wall portion) 32 of the silicon substrate 30 remaining along the plane Dx-Dz after the etching is formed as the plurality of structural portions 11b, and a plate-shaped portion (base portion) 31 of the silicon substrate 30 remaining along the plane Dx-Dy after the etching is formed as the base plate portion 11a.
Then, an insulation layer is formed at least on surfaces of the slit grooves SD (recesses 11c) of the silicon substrate 30 (grating-forming workpiece 11), except for bottom surfaces of the slit grooves SD (on-non-bottom-surface insulation layer forming step); FIGS. 3C and 3D).
More specifically, first of all, an insulation layer 34 having a thickness is formed at least over the entire inner surface of each of the slit grooves SD of the silicon substrate 30 to have an insulating property against an electroforming process in the aftermentioned electroforming step (FIG. 3C, insulation layer forming sub-step). This insulation layer 34 may be formed by any heretofore-known commonplace means such as a deposition process, a sputtering process or the like for forming a film of a given insulation material. In this embodiment, the silicon substrate 30 is used, and therefore the insulation layer 34 is a silicon oxide film 34. For example, this silicon oxide film is formed using the aforementioned thermal oxidation process or anodic oxidation process. In the case of forming the insulation layer 34 using the thermal oxidation process, it is possible to form a silicon oxide film 34 which is dense and excellent in adhesion, and relatively easily control a film thickness thereof. In the case of forming the insulation layer 34 using the anodic oxidation process, it is possible to form a silicon oxide film 34 which is dense and excellent in adhesion and film thickness uniformity, and relatively easily control a film thickness thereof. Thus, this production method for the X-ray metal grating structure DG can form an insulation layer 34 capable of being densified with a given thickness, while ensuring electrical insulation against an electroforming process in the electroforming step. In this regard, in the case where the resist layer 33a is a silicon oxide film 33a, almost no oxide film is formed on the resist layer 33a by an influence of the anodic oxidation during the insulation layer forming sub-step. On the other hand, in the case where the insulation layer forming sub-step is performed by a deposition process even when the resist layer 33a is a silicon oxide film 33a, a silicon oxide film 34 is formed on the resist layer 33a, as indicated by the broken line in FIG. 3C.
Then, a portion of the insulation layer 34 formed on a bottom BT of each of the slit grooves SD is removed (removal sub-step; FIG. 3). More specifically, the portion of the insulation layer 34 formed on the bottom BT of each of the slit grooves SD is removed, for example, by ICP dry etching using CHF.sub.3 gas.
In this sub-step, the ICP dry etching has high vertical directionality, so that, at a time when the portion of the insulation layer 34 formed on the bottom portion BT of each of the slit grooves SD is removed, a portion of the insulating layer 34 formed on inner side surfaces of the slit groove SD (a portion of the insulating layer 34 formed on opposite wall surfaces (opposite side surfaces) of each of a plurality of plate-shaped portions 32 of the silicon substrate 30) is left in a state in which it has a sufficient thickness capable of functioning as an insulation layer. The remaining insulating layer 34 formed on the inner side surfaces of the slit groove SD may have a thickness, e.g., a thickness of about 10 nm or more, which is enough to fulfill a function of blocking a voltage to be applied to the plate-shaped portion 32 of the silicon substrate 30 (a function of electrically insulating the plate-shaped portion 32) in the subsequent electroforming step, in cooperation with the resist layer (silicon oxide film) 33a having an insulating property.
Then, voltage is applied across the silicon substrate 30 (grating-forming workpiece 11) to perform an electroforming process (electroplating process) to thereby fill each of the slit grooves SD (recesses 11c) with a metal (electroforming step; FIG. 4A). More specifically, a negative electrode of a power supply 45 is connected to the silicon substrate 30, and an anode electrode 46 connected to a positive electrode of the power supply 45 and the silicon substrate 30 are immersed in a plating solution 47. In the case where a silicon oxide film is formed on a portion of the silicon substrate 30 to which the negative electrode of the power supply 45 is connected, the portion is removed in order to achieve conduction between the power supply 45 and the silicon substrate 30. For example, in the case where the silicon oxide film 34 is formed on a surface of the base plate portion 11a of the silicon substrate 30 through the on-non-bottom-surface insulation layer forming step, the silicon oxide film 34 formed on the surface of the base plate portion 11a of the silicon substrate 30 is removed, for example, by dry etching, so as to achieve electrical connection between the power supply 45 and the silicon substrate 30. After that, the negative electrode of the power supply 45 is connected to the surface of the base plate portion 11a of the silicon substrate 30. Thus, through electroforming, a metal precipitates and grows from the side of the silicon substrate 30 (plate-shaped portion 31) at the bottoms of the slit grooves SD.
Then, when the slit grooves SD are filled with the metal, the electroforming is terminated (FIG. 4B). In this way, metal 35 grows by the same thickness H as that of the plate-shaped portions 32 of the silicon substrate 30. In this way, the metal 35 is filled in the slit grooves SD, and the remaining portions 12 made of the metal 35 is formed. Preferably, the metal 35 is at least one selected from the group consisting of gold (Au), platinum (Pt), iridium (Ir) and rhodium (Rh), which are preferred examples of a metal having a relatively large atomic weight. These metals relatively largely act to X-rays, so that it becomes possible to reduce the depth H of each of the recesses 11c. Therefore, the above production method for the X-ray metal grating structure DG can easily produce a grating structure.
Then, the insulation layer 34 formed on the inner surface of each of the slit grooves SD (recesses 11c) formed in the on-non-bottom-surface insulation layer forming step is removed at least in a region intervening between corresponding ones of the plate-shaped portions 32 of the silicon substrate 30 (structural portions 11b of the grating-forming workpiece 11) and the metal portions 35 (remaining portions 12) filled in the electroforming step (intervening-insulation layer removing step; FIG. 4C). More specifically, the silicon substrate 30 (grating-forming workpiece 11) after being subjected to the electroforming step is immersed in a hydrofluoric acid solution capable of solving the silicon oxide film 34. As a result, a portion of the insulation layer 34 intervening between corresponding ones of the plate-shaped portions 32 of the silicon substrate 30 and the metal portions 35 is removed, so that an air gap 36 serving as the air gap 13 is formed between corresponding ones of the plate-shaped portions 32 of the silicon substrate 30 and the metal portions 35 filled in the electroforming step, in such a manner as to provide a given first spacing therebetween in a given planar (in-plane) direction on a grating plane Dx-Dy of the grating region 14 (in a one-dimensional grating structure as in the embodiment depicted in FIG. 1, in the direction Dy), and extend along the direction Dz normal to the grating plane Dx-Dy of the grating region 14. Further, the silicon oxide film 33a of the resist later 33a formed on tops of the plate-shaped portions 32 of the silicon substrate 30 is also removed [0041-0059]
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The pellicle membrane limitations are met by the teachings.
Claims 1-9,11-13, 22 and 24 are rejected under 35 U.S.C. 102(a)(1) as being fully anticipated by Toda JP 59-174804.
Toda JP 59-174804 (machine translation of abstract only) teaches a grating pattern (2) formed in