DETAILED ACTION
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1, 2, and 4 are rejected under 35 U.S.C. 103 as being unpatentable over Sun (U.S. PGPub 2015/0206893) in view of Choi (U.S. PGPub 2008/0164503) and Jeon (U.S. PGPub 2021/0202508).
Regarding claim 1, Sun teaches a ferroelectric device (Fig. 2I) comprising a first conductor over a first insulator, a ferroelectric layer over the first conductor, a second conductor over the ferroelectric layer (first insulator 232, [0038]; first conductor 238, ferroelectric layer 240, second conductor 242, [0041]); a second insulator over the second conductor; and a third insulator surrounding the first conductor, the ferroelectric layer, the second conductor, and the second insulator, wherein the ferroelectric layer is in contact with a top surface of the first conductor, wherein the second insulator is capable of capturing or fixing hydrogen, and wherein the third insulator is capable of inhibiting hydrogen (second insulator 250a, third insulator 250b, [0044]; 250a is a hydrogen encapsulation layer; 250b is a silicon nitride layer, Applicant’s Spec at [0112] states silicon nitride is capable of inhibiting hydrogen).
Sun does not explicitly teach wherein the ferroelectric layer is in contact with a top surface of the first insulator and a side surface of the first conductor.
Choi teaches a ferroelectric device comprising a ferroelectric layer which contacts the top and side surface of the lower electrode and extends onto the insulating layer adjacent to the device (Fig. 1, lower electrode 182, ferroelectric layer 184/186, insulating layer 170/160, [0031]-[0035) and a protective insulator surrounding the first conductor, ferroelectric layer, and a second conductor layer ([0036]).
Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Choi with Sun such that the ferroelectric layer is in contact with a top surface of the first insulator and a side surface of the first conductor for the purpose of increasing the capacitance (Choi, [0037]).
Sun and Choi do not explicitly teach wherein the ferroelectric layer comprises hafnium and zirconium and an orthorhombic crystal structure.
Sun and Choi teach wherein the ferroelectric layer comprises PZT (Sun, [0041]; Choi, [0035]).
Jeon teaches a ferroelectric device, comprising a first conductor, a ferroelectric layer over the first conductor, and a second conductor over the ferroelectric layer (Fig. 2, 11/13/15, [0073]), wherein the ferroelectric layer comprises hafnium and zirconium and has an orthorhombic crystal structure ([0075]).
Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Jeon with Sun and Choi such that the ferroelectric layer comprises hafnium and zirconium and an orthorhombic crystal structure for the purpose of replacing PZT to improve device miniaturization and CMOS compatibility, and to provide a lead-free ferroelectric (Jeon, [0004]-[0005]).
Regarding claim 2, the combination of Sun, Choi, and Jeon teaches wherein the second insulator comprises oxygen and aluminum, and wherein the third insulator comprises nitrogen and silicon (Sun, [0044]).
Regarding claim 4, the combination of Sun, Choi, and Jeon teaches wherein the first insulator comprises nitrogen and silicon (Sun, [0038]).
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Sun (U.S. PGPub 2015/0206893) in view of Choi (U.S. PGPub 2008/0164503), Jeon (U.S. PGPub 2021/0202508), and Martin (U.S. PGPub 2004/0099893).
Regarding claim 3, Sun, Choi, and Jeon do not explicitly teach wherein the second insulator has an amorphous structure.
Martin teaches wherein a hydrogen barrier layer comprising aluminum oxide is amorphous ([0014], [0053]-[0054]).
Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Martin with Sun, Choi, and Jeon such that the second insulator has an amorphous structure for the purpose of providing improved hydrogen barrier properties (Martin, [0014]).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Sun (U.S. PGPub 2015/0206893) in view of Choi (U.S. PGPub 2008/0164503), Jeon (U.S. PGPub 2021/0202508), and Summerfelt (U.S. Pat. 6548343).
Regarding claim 6, Sun, Choi, and Jeon do not explicitly teach wherein a hydrogen concentration in the ferroelectric layer is lower than or equal to 5×1020 atoms/cm3 in secondary ion mass spectrometry.
Summerfelt teaches forming a ferroelectric capacitor and a hydrogen barrier layer over the capacitor, wherein the hydrogen barrier layer comprises an aluminum oxide layer and a silicon nitride layer (Fig. 1, 118, 120, col. 13, l. 8-14) followed by a heat treatment (Fig. 2, 218, 222; thermal step, Abstract; col. 14, l. 60-67).
Applicant’s Specification teaches wherein a heat treatment is performed on second and third insulators comprising aluminum oxide and silicon nitride, which provides the decreased hydrogen concentration in the ferroelectric layer ([0108], [0114]-[0116]; [0672]). Where the claimed and prior art products are identical or substantially identical in structure or composition, or are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. See MPEP 2112.01.
Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Summerfelt with Sun, Choi, and Jeon such that a hydrogen concentration in the ferroelectric layer is lower than or equal to 5×1020 atoms/cm3 in secondary ion mass spectrometry due to incorporating a heat treatment to remove damage in the capacitor stack (Summerfelt, col. 20, l. 44-49).
Claims 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Sun (U.S. PGPub 2015/0206893) in view of Choi (U.S. PGPub 2008/0164503), Jeon (U.S. PGPub 2021/0202508), and Sharma (U.S. PGPub 2020/0373312).
Regarding claims 7-8, Sun, Choi, and Jeon teach a transistor below the first insulator, the ferroelectric device according to claim 1, wherein the transistor is below the first insulator, wherein one of a source and drain of the transistor is electrically connected to the first conductor (Sun, Fig. 2I, 214, [0032]; Choi, Fig. 1, 132, [0031]-[0032]).
Sun, Choi, and Jeon do not explicitly teach wherein the transistor comprises an oxide semiconductor layer in a channel formation region.
Sharma teaches a ferroelectric capacitor, a transistor below the ferroelectric capacitor, wherein the transistor comprises an oxide semiconductor layer in a channel formation region, and wherein one of a source and drain of the transistor is electrically connected to the first conductor (Fig. 1, 190, 140, 180, [0027], [0023]-[0024]).
Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Sharma with Sun, Choi, and Jeon such that the transistor comprises an oxide semiconductor layer in a channel formation region for the purpose of improving scaling (Sharma, [0015]).
Conclusion
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/ALIA SABUR/Primary Examiner, Art Unit 2812
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