Prosecution Insights
Last updated: April 19, 2026
Application No. 18/033,846

DISPLAY PANEL, DATA PROCESSING DEVICE, AND METHOD FOR MANUFACTURING DISPLAY PANEL

Non-Final OA §102§103
Filed
Apr 26, 2023
Examiner
HALL, VICTORIA KATHLEEN
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Semiconductor Energy Laboratory Co. Ltd.
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
99%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allow Rate
678 granted / 811 resolved
+15.6% vs TC avg
Strong +19% interview lift
Without
With
+19.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
35 currently pending
Career history
846
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
38.7%
-1.3% vs TC avg
§102
19.9%
-20.1% vs TC avg
§112
31.8%
-8.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 811 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Remarks A Restriction Requirement was sent November 6, 2025. Applicants responded to the Restriction Requirement on December 15, 2025, canceling claims 1-13 and 15-23, amending claim 14, and adding claims 24-37. Applicants petitioned the Office to make the application special under the Patent Prosecution Highway program. The Office granted the petition. For the record, the effect of this petition is reduced hours for examination, approximately 3.7 hours, leaving a total of 8.05 hours for examination for Non-Final office actions. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Specification The abstract of the disclosure is objected to because the abstract exceeds 150 words. A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b). The disclosure is objected to because of the following informalities: Page 15, paragraph 101, line 26: Change “electrode” to “electrodes”. Pages 44-46: Layers 105B(j), 105G(j), and 105R(j) are left out of the discussion. The following changes are intended to place these layers in their proper locations in the discussion: Page 44, paragraph 289, line 25: After “the unit 103B(j),”, add “the layer 105B(j),”. Page 44, paragraph 289, lines 26-27: After “the unit 103B(j),”, add “the layer 105B(j),”. Page 44, paragraph 289, line 28: After “unit 103B(j),”, add “layer 105B(j),”. Page 44, paragraph 289, line 30: After “the unit 103B(j),”, add “the layer 105B(j),”. Page 45, paragraph 293, line 12: After “The ninth step,”, add “the layer 015B(j),” and change “is” to “are”. Page 45, paragraph 293, line 13: At the beginning of the line, add “the layer 105B(j) and” and change “is” to “are”. (Layer 105B(j) is formed by a vacuum evaporation method. See page 44, paragraph 288, lines 21-22.) Page 45, paragraph 294, line 16: After “the unit 103G(j),”, add “the layer 105G(j),”. Page 45, paragraph 294, lines 17-18: After “the unit 103G(j),”, add “the layer 105G(j),”. Page 45, paragraph 294, line 19: After “unit 103G(j),”, add “layer 105G(j),”. Page 45, paragraph 294, line 22: After “the unit 103G(j),”, add “the layer 105G(j),”. Page 46, paragraph 297, line 1: After “the unit 103R(j),”, add “the layer 105R(j),”. Page 46, paragraph 298, line 28: After “the unit 103R(j),”, add “layer 105R(j),”. Page 69, paragraph 422, line 9: Change “electride” to “electrode”. Page 79, paragraph 483, line 29: Place a reference to “518: insulating film” in the main portion of the description. Paragraph 483 may be required to be deleted by USPTO staff prior to issuance of a patent, and this would leave reference number 518 without definition. Appropriate correction is required. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 14, 24-27, and 33-37 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Kato, U.S. Pat. Pub. No. 2021/0265432, Figures 1-18. PNG media_image1.png 696 649 media_image1.png Greyscale PNG media_image2.png 964 643 media_image2.png Greyscale PNG media_image3.png 866 649 media_image3.png Greyscale PNG media_image4.png 932 637 media_image4.png Greyscale PNG media_image5.png 893 638 media_image5.png Greyscale PNG media_image6.png 976 634 media_image6.png Greyscale PNG media_image7.png 250 634 media_image7.png Greyscale Regarding claim 14: Kato Figures 1-18 disclose a for manufacturing a display panel, the method comprising the steps of: forming a first electrode (118G) and a second electrode (118B); forming a partition (119) between the first electrode (118G) and the second electrode (118B); forming a first layer (hole transport layer of organic compound layers (117G), Kato specification ¶ 57) over the first electrode (118G) and the second electrode (118B); forming a first light-emitting layer (light-emitting layer of organic compound layer (117G), id.) over the first layer (hole transport layer of organic compound layer (117G)); forming a third electrode (116) over the first light-emitting layer (light-emitting layer of organic compound layer (117G)); removing the first layer (hole transport layer of organic compound layer (117G)), the first light-emitting layer (light-emitting layer of organic compound layer (117G)), and the third electrode (116) over the second electrode (118B) by a photoetching method to form a first light-emitting device (110G); forming a second layer (hole transport layer of organic compound layer (117B), id.) over the third electrode (116G) and the second electrode (118B); forming a second light-emitting layer (light-emitting layer of organic compound layer (117B), id.) over the second layer (hole transport layer (117B)); forming a fourth electrode (116B) over the second light-emitting layer (light-emitting layer of organic compound layer (117B)); removing the second layer (hole transport layer of organic compound layer (117B)), the second light-emitting layer (light-emitting layer of organic compound layer (117B)), and the fourth electrode (116B) over the third electrode (116G) by a photoetching method to form a second light-emitting device (110B) separated from the first light-emitting device (110G); and forming an insulating film (114G, 114B) in contact with a side surface of the first light-emitting layer (light-emitting layer of organic compound layer (117G)), a side surface of the first layer (hole transport layer of organic compound layer (117G)), a side surface of the second light-emitting layer (light-emitting layer of organic compound layer (117B)), and a side surface of the second layer (hole transport layer of organic compound layer (117B)). Kato specification ¶¶ 45-124. Note: the method does not require that the insulating film (114G, 114B) be formed simultaneously over the first and second light-emitting layers and first and second layers. Regarding claim 24: Kato Figures 1-18 disclose a method for manufacturing a display panel, the method comprising the steps of: forming a first electrode (118G) and a second electrode (118B); forming a first light-emitting layer (117G) over the first electrode (118G) and the second electrode (118B); removing the first light-emitting layer (117G) over the second electrode (118B) by a photoetching method; forming a second light-emitting layer (117B) over the first light-emitting layer (117G) and the second electrode (118B); removing the second light-emitting layer (117B) over the first light-emitting layer (117G) by a photoetching method; and forming an insulating film (114G, 114B) in contact with a side surface of the first light-emitting layer (117G) and a side surface of the second light-emitting layer (117B). Id. ¶¶ 45-124. Note: the method does not require that the insulating film (114G, 114B) be formed simultaneously over the first and second light-emitting layers. Regarding claim 25: Kato Figures 1-18 disclose a method for manufacturing a display panel, the method comprising the steps of: forming a first electrode (118G) and a second electrode (118B); forming a first layer (hole transport layer of organic compound layer (117G), Kato specification ¶ 57) over the first electrode (118G) and the second electrode (118B); forming a first light-emitting layer (light-emitting layer of organic compound layer (117G), id.) over the first layer (hole transport layer of organic compound layer (117G)); removing the first layer (hole transport layer of organic compound layer (117G)) and the first light-emitting layer (light-emitting layer of organic compound layer (117G)) over the second electrode (118B) by a photoetching method; forming a second layer (hole transport layer of organic compound layer (117B), id.) over the first light-emitting layer (light emitting layer of organic compound layer (117G)) and the second electrode (118B); forming a second light-emitting layer (light-emitting layer of organic compound layer (117B), id.) over the second layer (hole transport layer of organic compound layer (117B)); removing the second layer (hole transport layer of organic compound layer (117B)) and the second light-emitting layer (light emitting layer of organic compound layer (117B)) over the first light-emitting layer (light emitting layer of organic compound layer (117G)) by a photoetching method; and forming an insulating film (114G, 114B) in contact with a side surface of the first light-emitting layer (light emitting layer of organic compound layer (117G)), a side surface of the first layer (hole transport layer of organic compound layer (117G)), a side surface of the second light-emitting layer (light emitting layer of organic compound layer (117B)), and a side surface of the second layer (hole transport layer of organic compound layer (117B)). Id. ¶¶ 45-124. Note: the method does not require that the insulating film (114G, 114B) be formed simultaneously over the first and second light-emitting layers and first and second layers. Regarding claim 26: Kato Figures 1-18 disclose a method for manufacturing a display panel, the method comprising the steps of: forming a first electrode (118G) and a second electrode (118B); forming a partition (119) between the first electrode (118G) and the second electrode (118B); forming a first light-emitting layer (light emitting layer of organic compound layer (117G)) over the first electrode (118G) and the second electrode (118B); removing the first light-emitting layer (light emitting layer of organic compound layer (117G)) over the second electrode (118B) by a photoetching method; forming a second layer (hole transport layer of organic compound layer (117B), Kato specification ¶ 57) over the first light-emitting layer (light emitting layer of organic compound layer (117G)) and the second electrode (118B); forming a second light-emitting layer (light emitting layer of organic compound layer (117B), id.) over the second layer (hole transport layer of organic compound layer (117B)); removing the second layer (hole transport layer of organic compound layer (117B)) and the second light-emitting layer (light emitting layer of organic compound layer (117B)) over the first light-emitting layer (light emitting layer of organic compound layer (117G)) by a photoetching method; and forming an insulating film (114G, 114B) in contact with a side surface of the first light-emitting layer (light emitting layer of organic compound layer (117G)) and a side surface of the second light-emitting layer (light emitting layer of organic compound layer (117B)). Id. ¶¶ 45-124. Note: the method does not require that the insulating film (114G, 114B) be formed simultaneously over the first and second light-emitting layers. Regarding claim 27: Kato Figures 1-18 disclose a method for manufacturing a display panel, the method comprising the steps of: forming a first electrode (118G) and a second electrode (118B); forming a partition (119) between the first electrode (118G) and the second electrode (118B); forming a first layer (hole transport layer of organic compound layer (117G), Kato specification ¶ 57) over the first electrode (118G) and the second electrode (118B); forming a first light-emitting layer (light emitting layer of organic compound layer (117G), id.) over the first layer (hole transport layer of organic compound layer (117G)); removing the first layer (hole transport layer of organic compound layer (117G)) and the first light-emitting layer (light emitting layer of organic compound layer (117G)) over the second electrode (118B) by a photoetching method; forming a second layer (hole transport layer of organic compound layer (117B), id.) over the first light-emitting layer (light emitting layer of organic compound layer (117G)) and the second electrode (118B); forming a second light-emitting layer (light emitting layer of organic compound layer (117B), id.) over the second layer (hole transport layer of organic compound layer (117B)); removing the second layer (hole transport layer of organic compound layer (117B)) and the second light-emitting layer (light emitting layer of organic compound layer (117B)) over the first light-emitting layer (light emitting layer of organic compound layer (117G)) by a photoetching method; and forming an insulating film (114G, 114B) in contact with a side surface of the first light-emitting layer (light emitting layer of organic compound layer (117G)), a side surface of the first layer (hole transport layer of organic compound layer (117G)), a side surface of the second light-emitting layer (light emitting layer of organic compound layer (117B)), and a side surface of the second layer (hole transport layer of organic compound layer (117B)). Id. ¶¶ 45-124. Note: the method does not require that the insulating film (114G, 114B) be formed simultaneously over the first and second light-emitting layers and first and second layers. Regarding claim 33, which depends from claim 14: Kato discloses wherein the insulating film is formed by at least one of a sputtering method, a chemical vapor deposition method, a molecular beam epitaxy method, and an atomic layer deposition method. Id. ¶¶ 75, 98. Regarding claim 34, which depends from claim 24: Kato discloses wherein the insulating film is formed by at least one of a sputtering method, a chemical vapor deposition method, a molecular beam epitaxy method, and an atomic layer deposition method. Id. Regarding claim 35, which depends from claim 25: Kato discloses wherein the insulating film is formed by at least one of a sputtering method, a chemical vapor deposition method, a molecular beam epitaxy method, and an atomic layer deposition method. Id. Regarding claim 36, which depends from claim 26: Kato discloses wherein the insulating film is formed by at least one of a sputtering method, a chemical vapor deposition method, a molecular beam epitaxy method, and an atomic layer deposition method. Id. Regarding claim 37, which depends from claim 27: Kato discloses wherein the insulating film is formed by at least one of a sputtering method, a chemical vapor deposition method, a molecular beam epitaxy method, and an atomic layer deposition method. Id. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 28-32 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Kato. Regarding claim 28, which depends from claim 14: Kato discloses wherein the insulating film (114G, 114B) includes a first insulating film and a second insulating film over the first insulating film, wherein the first insulating film includes at least one of aluminum oxide and magnesium oxide, and wherein the second insulating film includes silicon nitride. Id. ¶¶ 69-79, 97-100, 105-109, 116-120. Specifically, Kao discloses that insulating films (114G, 114B) may include AlO, TiO, SiN, SiON, and SiO, and may be one or more of these films. Id. ¶ 77. In describing the deposition of insulating film (114G), Kato discloses that insulating film (114G) may be formed of AlO by an ALD method, or TiO by ALD, or SiN, SiO, or SiON by a CVD method. Id. ¶ 98. Thus, a combination of a first insulating film of AlO followed by a second insulating film of SiN is disclosed by Kato. To the extent that Kato does not disclose this arrangement, one of ordinary skill in the art at a time before the effective filing date would be motivated to modify Kato to include a 2-layer insulating film of AlO and SiN because Kato discloses that these films may be used together. Regarding claim 29, which depends from claim 24: Kato discloses wherein the insulating film (114G, 114B) includes a first insulating film and a second insulating film over the first insulating film, wherein the first insulating film includes at least one of aluminum oxide and magnesium oxide, and wherein the second insulating film includes silicon nitride. Id. The Office incorporates the discussion about the insulating films from the rejection of claim 28. Regarding claim 30, which depends from claim 25: Kato discloses wherein the insulating film (114G, 114B) includes a first insulating film and a second insulating film over the first insulating film, wherein the first insulating film includes at least one of aluminum oxide and magnesium oxide, and wherein the second insulating film includes silicon nitride. Id. The Office incorporates the discussion about the insulating films from the rejection of claim 28. Regarding claim 31, which depends from claim 26: Kato discloses wherein the insulating film (114G, 114B) includes a first insulating film and a second insulating film over the first insulating film, wherein the first insulating film includes at least one of aluminum oxide and magnesium oxide, and wherein the second insulating film includes silicon nitride. Id. The Office incorporates the discussion about the insulating films from the rejection of claim 28. Regarding claim 32, which depends from claim 27: Kato discloses wherein the insulating film (114G, 114B) includes a first insulating film and a second insulating film over the first insulating film, wherein the first insulating film includes at least one of aluminum oxide and magnesium oxide, and wherein the second insulating film includes silicon nitride. Id. The Office incorporates the discussion about the insulating films from the rejection of claim 28. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to VICTORIA KATHLEEN HALL whose telephone number is (571)270-7567. The examiner can normally be reached Monday-Friday, 8 a.m.-5 p.m. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fernando Toledo can be reached at 571-272-1867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Victoria K. Hall/Primary Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Apr 26, 2023
Application Filed
Apr 26, 2023
Response after Non-Final Action
Oct 17, 2024
Response after Non-Final Action
Jan 14, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
99%
With Interview (+19.1%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 811 resolved cases by this examiner. Grant probability derived from career allow rate.

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