Detailed Action
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The objection to the specification and the 112 rejection of claim(s) 2-4, 6-7, 17 and 19-20 has been withdrawn in view of the amendments filed 01/07/2026.
Claim Objections
Claim 1 is objected to because of the following informalities: “a gate-insulating” in line 13 should be --a gate-insulating layer--. Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4 and 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over Chen et. Al. (US 20200357826 A1 hereinafter Chen) and further in view of Nishiura (US 20080265254 A1).
Regarding claim 1, Chen teaches in Fig. 7 with associated text a display device comprising: first 148 and second electrodes 166 spaced apart from each other in a first direction ((166 is spaced horizontally from the portion of 148 in 150 Fig. 7, [0057]); a light-emitting element 152 disposed between the first electrode and the second electrode (Fig 6 [0067]); a pixel circuit including a capacitor including first to third capacitor electrodes (132, 136 and 174 or 148) that are sequentially stacked (Fig. 7, [0068]); an interlayer insulating layer comprising: a first insulating layer 128 between the first capacitor electrode and the third capacitor electrode; and a second insulatinq layer 140 located between the second capacitor electrode and the third capacitor electrode, and between the first capacitor electrode and the third capacitor electrode (Fig. 7, [0068]); a first area (see example of first and second area in annotated figure below) overlapping the first capacitor electrode and a second area excluding the first area, wherein a thickness of the interlayer insulating layer in the first area is thinner than a thickness of the interlayer insulating layer in the second area (see annotated figure below for example of first and second area arrangement and interlayer insulating layer thicknesses therein).
Chen does not specify in the embodiment of Fig. 7, the light emitting element is a plurality of light emitting elements.
Chen discloses in the embodiment of Fig. 6 with associated text however a similar display device wherein a plurality of light emitting elements 152 is used for the light emitting element (Fig. 6, [0067])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use a plurality of light emitting elements as taught in the embodiment of Fig. 6 in the embodiment of Fig. 7 because according to Chen the laminated structure structure 100D may include two light-emitting diodes 152, in other embodiments, the laminated structure 100D may have more than two light-emitting diodes 152, the number of light-emitting diodes 152 is not intended to be limited so that using a plurality of light emitting elements is a suitable arrangement for the embodiment of Fig. 7.
Chen does not specify a qate-insulatinq between the first capacitor electrode and the second capacitor electrode.
Nishiura discloses in Figs. 2A-2B or 6A-6B with associated text, referring to 2B unless otherwise specified, a display device similar to that of Chen comprising an interlayer insulating layer 6a and 8 comprising: a first insulating layer 6a between a first capacitor electrode 3a and a third capacitor electrode 9; and a second insulatinq layer 8 located between a second capacitor electrode 5a and the third capacitor electrode (see annotated figure below, [0051]-[0052)), and between the first capacitor electrode and the third capacitor electrode (see annotated figure below, [0051]-[0052)) and a qate-insulatinq layer 4 between the first capacitor electrode and the second capacitor electrode (see annotated figure below, [0051]-[0052)).
interlayer insulating layer (6a and 8) similar to that of Chen includes a first insulating layer 6a, and a second insulating layer 8 disposed on the first insulating layer, and the first insulating layer includes an opening 12a overlapping a first area (Fig. 2B, [0047]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use a capacitor layering structure similar to Nishiura for that of Chen because according to Nishiura by using such a structure the storage capacitance per unit area increases significantly, and thereby the area occupied by a storage capacitor element can be effectively reduced, that is, it can improve the pixel aperture ratio, furthermore, since the opening 12a is formed simultaneously with the contact holes 10, the number of processes and the number of necessary masks are not increased ([0062]).
Regarding claim 2, Chen in view of Nishiura teaches a width of the first area in the first direction is equal to a width of the first capacitor electrode in the first direction (since first area is only defined by the claim in terms of overlapping the second electrode it’s width may be set to any value for example the width of the first capacitor electrode).
Regarding claim 3, Chen teaches a width of the first area in the first direction is greater than a width of the second capacitor electrode in the first direction (see annotated figure above).
Regarding claim 4, Chen teaches a width of the first area in the first direction is smaller than a width of the third capacitor electrode in the first direction (here the third electrode in interpreted to be 148 Fig. 7 of Chen or see third electrode 72 compared to first electrode 3A in Fig. 3B of Nishiura).
Regarding claim 5, Chen teaches the display device of claim 1.
Chen does not specify the second insulating layer disposed on the first insulating layer, and the first insulating layer includes an opening overlapping the first area.
Nishiura discloses in Fig. 2B with associated text an interlayer insulating layer (6a and 8) similar to that of Chen includes a first insulating layer 6a, and a second insulating layer 8 disposed on the first insulating layer, and the first insulating layer includes an opening 12a overlapping a first area (Fig. 2B, [0047]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the interlayer insulating layer similar to Nishiura for that of Chen because according to Nishiura by using such a structure the storage capacitance per unit area increases significantly, and thereby the area occupied by a storage capacitor element can be effectively reduced, that is, it can improve the pixel aperture ratio, furthermore, since the opening 12a is formed simultaneously with the contact holes 10, the number of processes and the number of necessary masks are not increased ([0062]).
Regarding claim 6, Chen in view of Nishiura teaches a width of the opening of the first insulating layer in the first direction is equal to a width of the first capacitor electrode in the first direction (Nishimura Fig. 2A).
Regarding claim 8, Chen in view of Nishiura teaches the opening of the first insulating layer exposes the second capacitor electrode (Nishimura Fig. 2A).
Regarding claim 9, Chen in view of Nishiura teaches the second insulating layer is in contact with the second capacitor electrode through the opening of the first insulating layer (Nishimura Fig. 2A).
Regarding claim 16, Chen in view of Nishiura teaches the first capacitor electrode is formed of a first conductive layer 132, the second capacitor electrode 136 is formed of a second conductive layer, and the display device further includes a semiconductor layer 138 disposed between the first conductive layer and the second conductive layer (Fig. 7, [0043]).
Regarding claim 17, Chen teaches the first capacitor electrode and the second capacitor electrode overlap to configure a first capacitor, and the second capacitor electrode and the third capacitor electrode overlap to configure a second capacitor (Fig. 7, [0068]).
Regarding claim 18, Chen teaches the pixel circuit includes a plurality of transistors (TFT1 and TFT2) that drive the light-emitting element, and each of the transistors includes a semiconductor layer (126 and 138) disposed in the second area; a gate electrode (120 and 132) disposed on the semiconductor layer; and a source electrode (122 and portion of 136 on 138) and a drain electrode (124 and 134) disposed on the gate electrode and respectively connected to the semiconductor layer (Fig. 7.
Regarding claim 19, Chen teaches the second capacitor electrode (here the second capacitor electrode is interpreted to be 132 overlapping 136) is formed of the same conductive layer as the gate electrode (gate electrode of TFT2) of one of the transistors, and the third capacitor electrode (here the third capacitor electrode is interpreted to be 136) is formed of the same conductive layer as the source electrode and the drain electrode (source or drain of TFT2 Fig. 7)) of the one of the transistors.
Regarding claim 20, Chen teaches the capacitor is connected between a node electrically connected to the gate electrode and the first electrode (the gate electrode of TFT is connected to the first capacitor plate Fig. 7) of the one of the transistors.
Response to Arguments
Applicant's arguments filed 01/07/2026 have been fully considered but they are not persuasive. Regarding the arguments on pages 9-11 Nishiura discloses in Figs. 2A-2B with associated text, a display device similar to that of Chen comprising an interlayer insulating layer 6a and 8 comprising: a first insulating layer 6a between a first capacitor electrode 3a and a third capacitor electrode 9; and a second insulatinq layer 8 located between a second capacitor electrode 5a and the third capacitor electrode (see annotated figure above and [0051]-[0052)), and between the first capacitor electrode and the third capacitor electrode (see annotated figure above [0051]-[0052)) and a qate-insulatinq layer 4 between the first capacitor electrode and the second capacitor electrode (see annotated figure above and [0051]-[0052)).
Allowable Subject Matter
Claim 7 is allowed.
The following is an examiner’s statement of reasons for allowance:
After completing a thorough search of independent claim 7, the prior art of record, alone or in combination does not disclose, teach or fairly suggest a display device comprising: a pixel circuit including a capacitor including first to third capacitor electrodes that are sequentially stacked; an interlayer insulating layer disposed between the second capacitor electrode and the third capacitor electrode; and a first area overlapping the first capacitor electrode and a second area excluding the first area, wherein a thickness of the interlayer insulating layer in the first area is thinner than a thickness of the interlayer insulating layer in the second area, the interlayer insulating layer includes a first insulating layer, and a second insulating layer disposed on the first insulating layer, and the first insulating layer includes an opening overlapping the first area, a width of the opening of the first insulating layer in the first direction is the same as a width of the first capacitor electrode in the first direction and a width of the opening of the first insulating layer in the first direction is greater than a width of the second capacitor electrode in the first direction in combination with the rest of the limitations of the claim.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Park et. Al. (US 20170323910 A1) teaches a display in Fig. 5 generally relevant to claim 7, Lee et. Al. (US 7554619 B2) teaches a display in Fig. 2E relevant to some of the claims.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AARON J GRAY whose telephone number is (571)270-7629. The examiner can normally be reached Monday-Friday 9am-4pm.
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/AARON J GRAY/Examiner, Art Unit 2897
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