DETAILED ACTION
This Office Action is sent in response to Applicant’s Communication received 07 Apr 2026 for application number 18/048,188. The Office hereby acknowledges receipt of the following and placed of record in file: Applicant Arguments/Remarks, and Claims.
Claims 1-19 are presented for examination. Elected claims 1-10, 12-14 and newly added claims 18-19 are examined below; non-elected claims 11 and 15-17 have been withdrawn.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant contends that the prior art does not teach, “repeating execution of the deposition cycle a plurality of times before performing the heat treatment process such that dopant-saturated surfaces of the undoped silicon layers are sandwiched between the undoped silicon layers”; Examiner respectfully disagrees. Lenes teaches repeating execution of the deposition cycle a plurality of times before performing the heat treatment process such that dopant-saturated surfaces of the undoped silicon layers are sandwiched between the undoped silicon layers [para 0058 discloses alternating layers of silicon layers and doped silicon layers; although the layers may be pure, they may be applied as mixtures, i.e. dopant-saturated surfaces of undoped silicon; the multilayer stack is annealed, para 0058]. Although Lenes teaches the ability for “discrete dopant sublayers,” as Applicant suggests, Lenes also teaches that the layers may be mixtures of undoped and doped silicon. As such, the prior art reasonably teaches, “repeating execution of the deposition cycle a plurality of times before performing the heat treatment process such that dopant-saturated surfaces of the undoped silicon layers are sandwiched between the undoped silicon layers.”
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-6, 8-10, 12, and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lenes et al. [hereinafter as Lenes] (US 2018/0277701 A1) in view of Shih et al. [hereinafter as Shih] (US 2021/0020522 A1).
In reference to claim 1, Lenes teaches A method of forming a doped polysilicon layer on a plurality of substrates, the method comprising:
providing a plurality of substrates [Fig. 1A, paras 0055-0057 disclose a plurality of substrates, including bulk layer 100, front surface region 11, passivation 12, and dielectric 13] to a process chamber [para 0062 discloses a deposition chamber],
executing a deposition cycle, comprising:
providing a silicon-containing precursor to the process chamber, thereby depositing, on the plurality of substrates, an undoped silicon layer until a pre-determined thickness is reached [para 0023 discloses providing a silicon precursor gas to the substrates to form silicon layers, i.e. undoped silicon layers],
providing the process chamber with a flow of a dopant precursor gas without providing the silicon-containing precursor to the process chamber [para 0023 discloses providing a dopant precursor gas to form doped layers; the dopant precursor gas and silicon precursor gas are introduced independently],
performing a heat treatment process, thereby forming the doped polysilicon layer [para 0039 discloses an annealing step to form the doped polysilicon layers];
repeating execution of the deposition cycle a plurality of times before performing the heat treatment process such that dopant-saturated surfaces of the undoped silicon layers are sandwiched between the undoped silicon layers [para 0058 discloses alternating layers of silicon layers and doped silicon layers; although the layers may be pure, they may be applied as mixtures, i.e. dopant-saturated surfaces of undoped silicon; the multilayer stack is annealed, para 0058].
However, Lenes does not explicitly teach:
adjusting, based on determining saturation of dopant precursor, from the dopant precursor gas, on a surface of the plurality of substrates, the flow of the dopant precursor gas provided to the process chamber.
Lenes and Shih teach:
adjusting, based on determining saturation of dopant precursor [Shih, para 0038 discloses controlling a flow rate of dopant gases based on concentration, i.e. saturation, of dopants, using secondary ion mass spectrometry to determine concentrations of dopants in an epitaxial feature, i.e. substrate], from the dopant precursor gas, on a surface of the plurality of substrates [Lenes, Fig. 1A, paras 0055-0057 disclose a plurality of substrates, including bulk layer 100, front surface region 11, passivation 12, and dielectric 13], the flow of the dopant precursor gas [Lenes, para 0023 discloses providing a silicon precursor gas to the substrates to form silicon layers, i.e. undoped silicon layers] provided to the process chamber [Lenes, para 0062 discloses a deposition chamber].
It would have been obvious to one of ordinary skill in art, absent unexpected results, having the teachings of Lenes and Shih before the effective filing date of the claimed invention, to include the flow control as disclosed by Shih into the method of Lenes in order to obtain a method of forming a doped polysilicon layer that includes controlling a flow rate of dopant precursor gases based on saturation.
One of ordinary skill in the art would be motivated to obtain a method of forming a doped polysilicon layer that includes controlling a flow rate of dopant precursor gases based on saturation to provide the predictable result of optimizing costs.
In reference to claim 2, Lenes and Shih teach the invention of claim 1.
Lenes teaches The method according to claim 1, wherein the provision of the flow of the dopant precursor gas is performed to at least partially saturate a surface of the undoped silicon layer with the dopant precursor [para 0023 discloses providing a dopant precursor gas to form doped layers; the dopant precursor gas and silicon precursor gas are introduced independently; the dopant precursor gas contacts, i.e. at least partially saturates, the silicon layer].
In reference to claim 3, Lenes and Shih teach the invention of claim 1.
Lenes teaches The method according to claim 1, wherein the pre-determined thickness is the same for each deposition cycle [para 0024 discloses a duration of a deposition period, which would determine the thickness, i.e. the same duration would yield the same thickness].
In reference to claim 4, Lenes and Shih teach the invention of claim 3.
Lenes teaches The method according to claim 3, wherein the doped polysilicon layer has a dopant concentration within a range of at least 1x1018at/cm-3 to 5x1019 at/cm-3 [para 0018 discloses a dopant concentration of more than 1x1019 atoms/cm-3, which is in the claimed range].
In reference to claim 5, Lenes and Shih teach the invention of claim 1.
Lenes teaches The method according to claim 1, wherein the pre-determined thickness is in a range of 5 nm to 500 nm [para 0089 discloses that the thickness of the first sublayers, i.e. silicon layers, is less than 50 nm, which falls within the claimed range].
In reference to claim 6, Lenes and Shih teach the invention of claim 1.
Lenes teaches The method according to claim 1, wherein the dopant precursor gas comprises a pnictogen hydride or a boron-containing compound [para 0022 discloses diborane, i.e. boron-containing compound, as a dopant precursor gas].
In reference to claim 8, Lenes and Shih teach the invention of claim 1.
Lenes teaches The method according to claim 1, wherein the provision of the dopant precursor gas and the provision of the silicon-containing precursor is performed at a temperature in a range of 350 ˚C to 700 ˚C [para 0022 discloses a reaction chamber temperature of 500-750˚C, which is in the claimed range].
In reference to claim 9, Lenes and Shih teach the invention of claim 1.
Lenes teaches The method according to claim 1, wherein the silicon-containing precursor is selected from a silane [para 0022 discloses a silicon precursor gas of silane].
In reference to claim 10, Lenes and Shih teach the invention of claim 9.
Lenes teaches the invention of claim 9.
Lenes teaches The method according to claim 9, wherein the provision of the dopant precursor gas and the provision of the silicon-containing precursor is performed at a temperature in a range of 500 ˚C to 700 ˚C [para 0022 discloses a reaction chamber temperature of 500-750˚C, which is in the claimed range] and wherein the silicon-containing precursor comprises substantially monosilane [para 0022 discloses a silicon precursor gas of silane, i.e. monosilane].
In reference to claim 12, Lenes and Shih teach the invention of claim 1.
Lenes teaches The method according to claim 1, wherein the provision of the dopant precursor gas and the provision of the silicon-containing precursor is performed at the same temperature [para 0022 discloses a reaction chamber temperature of 500-750˚C, which is in the claimed range; para 0022 discloses that both the polysilicon and boron may be applied at such temperatures].
In reference to claim 18, Lenes and Shih teach the invention of claim 1.
Lenes teaches The method according to claim 1, wherein determining saturation of dopant precursor, from the dopant precursor gas, on a surface of the plurality of substrates comprises:
performing a secondary-ion mass spectrometry analysis on one or more of the plurality of substrates [para 0038 discloses using secondary ion mass spectrometry to determine concentrations of dopants in an epitaxial feature, i.e. substrate], and
recording surface saturation information based on the secondary-ion mass spectrometry analysis [para 0038 discloses using secondary ion mass spectrometry to determine concentrations of dopants in an epitaxial feature, i.e. substrate; concentration values are recorded].
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lenes in view of Shih further in view of Herner et al. [hereinafter as Herner] (US 2008/0003793 A1).
In reference to claim 7, Lenes and Shih teach the invention of claim 1.
Lenes teaches The method according to claim 1, wherein the provision of the flow of the dopant precursor gas is performed [para 0023 discloses providing a dopant precursor gas to form doped layers].
However, Lenes and Shih do not explicitly teach that the dopant precursor gas flows from 30 seconds to 10 minutes.
Herner teaches that the dopant precursor gas flows from 30 seconds to 10 minutes [paras 0043-0044 disclose p-type or n-type doping and flowing a dopant gas from 5-10 minutes, which is within the claimed range].
It would have been obvious to one of ordinary skill in art, absent unexpected results, having the teachings of Lenes, Shih, and Herner before the effective filing date of the claimed invention, to include the flow time as disclosed by Herner into the method of Lenes and Shih in order to obtain a deposition method in which a precursor dopant gas may flow between 30 seconds to 10 minutes.
One of ordinary skill in the art would be motivated to obtain a deposition method in which a precursor dopant gas may flow between 30 seconds to 10 minutes to provide the predictable result of using known methods to achieve an optimal thickness of doped layers.
Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lenes in view of Shih further in view of Khandekar et al. [hereinafter as Khandekar] (US 2010/0255664 A1).
In reference to claim 13, Lenes and Shih teach the invention of claim 1.
Lenes teaches The method according to claim 1, wherein the provision of the silicon-containing precursor is done at a pressure [paras 0022-0023 disclose providing a dopant precursor gas to form doped layers at a pressure].
However, Lenes and Shih do not explicitly teach a pressure in a range of 50 mTorr to 500 mTorr.
Khandekar teaches a pressure in a range of 50 mTorr to 500 mTorr [Fig. 1, para 0024 discloses, in the table, a range of pressures within the claimed range, i.e. 250-450 mTorr for example].
It would have been obvious to one of ordinary skill in art, absent unexpected results, having the teachings of Lenes, Shih, and Khandekar before the effective filing date of the claimed invention, to include the pressure as disclosed by Khandekar into the method of Lenes and Shih in order to obtain a deposition method in which a pressure may be between 50 mTorr and 500 mTorr.
One of ordinary skill in the art would be motivated to obtain a deposition method in which a pressure may be between 50 mTorr and 500 mTorr to provide the predictable result of using known methods to vary nucleation time and/or deposition rate [Khandekar, para 0028].
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lenes in view of Shih further in view of Wang et al. [hereinafter as Wang] (US 2018/0114720 A1).
In reference to claim 14, Lenes and Shih teach the invention of claim 1.
Lenes teaches The method according to claim 1, wherein the heat treatment process is performed at a temperature in a range of 900 ˚C to 1100 ˚C [para 0039 discloses that the anneal is performed at a temperature between 675-950˚C (also, such as 825-925°C), which is in the claimed range].
However, Lenes’ temperature range has a limited overlap with the claimed range.
Wang teaches a temperature in a range of 900 ˚C to 1100 ˚C [para 0047 discloses that the anneal is performed at a temperature between 1000-1100˚C, which is in the claimed range].
It would have been obvious to one of ordinary skill in art, absent unexpected results, having the teachings of Lenes, Shih, and Wang before the effective filing date of the claimed invention, to include the anneal temperature as disclosed by Wang into the method of Lenes and Shih in order to obtain a deposition method in which an anneal temperature may be between 900-1100 ˚C.
One of ordinary skill in the art would be motivated to obtain a deposition method in which an anneal temperature may be between 900-1100 ˚C to provide the predictable result of using known methods to reduce film stress [Wang, para 0047].
Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lenes in view of Shih further in view of Hekmatshoartabari et al. [hereinafter as Hekmatshoartabari] (US 2019/0273165 A1).
In reference to claim 19, Lenes and Shih teach the invention of claim 1.
However, Lenes and Shih do not explicitly teach The method according to claim 18, wherein determining saturation of dopant precursors from the dopant precursor gas, on a surface of the plurality of substrates, further comprises:
measuring sheet resistance across the surface of one or more of the plurality of substrates, and
determining, based on measuring the sheet resistance across the surface of one or more of the plurality of substrates, wafer non-uniformity, and
producing a calibration curve based on the sheet resistance across the surface of one or more of the plurality of substrates and the secondary-ion mass spectrometry analysis.
Hekmatshoartabari teaches:
measuring sheet resistance [paras 0061-0062 disclose measuring sheet resistance] across the surface of one or more of the plurality of substrates, and
determining, based on measuring the sheet resistance across the surface of one or more of the plurality of substrates, wafer non-uniformity [it is well-known that sheet resistance measures wafer non-uniformity], and
producing a calibration curve based on the sheet resistance across the surface of one or more of the plurality of substrates and the secondary-ion mass spectrometry analysis [paras 0061-0062 disclose plotting sheet resistance vs. dopant/precursor gas ratio and concentration vs. dopant/precursor gas ratio; secondary ion mass spectrometry is used to measure impurity; it would have been obvious to one of ordinary skill in the art to create a calibration curve based on sheet resistance and secondary ion mass spectrometry analysis, as these variable are taught Hekmatshoartabari and would require a mere manipulation of the data points].
It would have been obvious to one of ordinary skill in art, absent unexpected results, having the teachings of Lenes, Shih, and Hekmatshoartabari before the effective filing date of the claimed invention, to include the sheet resistance process as disclosed by Hekmatshoartabari into the method of Lenes and Shih in order to obtain a method of forming a doped polysilicon layer that includes a sheet resistance process.
One of ordinary skill in the art would be motivated to obtain a method of forming a doped polysilicon layer that includes controlling a flow rate of dopant precursor gases based on saturation to provide the predictable result of ensuring quality control and predicting device performance.
Examiner’s Note
The prior art made of record and not relied upon is considered pertinent to Applicant's disclosure as follows. Applicant is reminded that in amending in response to a rejection of claims, the patentable novelty must be clearly shown in view of the state of the art disclosed by the references cited and the objections made. Applicant must also show how the amendments avoid such references and objections. See 37 CFR § 1.111(0).
Nittala et al. (US-20200266052-A1) discloses alternating layers of doped and undoped silicon [para 0027].
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDREW CHUNG whose telephone number is (571)272-5237. The examiner can normally be reached M-F 9-5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Manno can be reached on 571-272-2339. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ANDREW CHUNG/
Examiner, Art Unit 2898