DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on February 12th, 2026 has been entered.
By this amendment, claims 1-7, 9-12, 14, and 16-19 have been amended. Accordingly, claims 1-20 are pending in the present application in which claims 1, 9, and 16 are in independent form. Newly submitted IDS filed on February 03rd, 2026 has been considered.
New Grounds of Rejection
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 6, 7, 9-11, 13, 14, 16, 17, and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (U.S. Pub. 2007/0296067), of record, in view of Tien et al. (U.S. Pub. 2007/0273026), newly cited.
In re claim 1, Lee discloses an integrated circuit device, comprising a semiconductor substrate 100 (see paragraph [0018] and figs. 1A-E); a plurality of vias TH extending from a top surface of the semiconductor substrate 100 to a bottom surface of the semiconductor substrate 100 (see paragraph [0018] and figs. 1A-E); a metal layer 105 on the bottom surface of the semiconductor substrate 100, the metal layer 105 comprising a metal pad extending around a via opening TH of one of the plurality of vias at the bottom surface of the semiconductor substrate 100 (see paragraph [0019] and figs. 1A-E), the metal pad being electrically isolated from a remainder of the metal layer on the bottom surface of the semiconductor substrate 100 (see paragraph [0020] and figs. 1A-E, note that path region 105a is electrically isolated from solder ball land region 105b); and a jet-dispensed dot of a conductive die attach adhesive material 221 (on the left side of the integrated circuit device) on the metal pad (see paragraph [0027] and figs. 1A-E).
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Lee is silent to wherein the remainder of the metal layer on the bottom surface of the semiconductor substrate that provides a ground plane on the bottom of the semiconductor substrate.
However, Tien discloses in a same field of endeavor, an integrated circuit device, including, inter-alia, wherein the remainder of the metal layer 23 on the bottom surface of the semiconductor substrate that provides a ground plane on the bottom of the semiconductor substrate (see paragraphs [0022], [0023], [0025] and fig. 2).
Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the teaching as taught by Tien into the integrated circuit of Lee in order to enable wherein the remainder of the metal layer on the bottom surface of the semiconductor substrate that provides a ground plane on the bottom of the semiconductor substrate in Lee to be formed in order to balance impedance match, reducing a capacitance effect, and improve electric performance of the integrated circuit device (see paragraphs [0008], [0009], [0010] of Tien). Furthermore, it would have been obvious because all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the invention. KSR International Co. v. Teleflex Inc. (KSR), 550 U.S. 398 (2007). “If a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond that person’s skill.” Id.
In re claim 2, as applied to claim 1 above, Lee in combination with Tien discloses wherein an isolation street extends between the metal pad and the ground plane; and the integrated circuit device further comprises a solder mask 125 extending over at least part of the isolation street (see paragraph [0021] and figs. 1A-E of Lee and paragraphs [0022], [0023], [0025] and fig. 2 of Tien).
In re claim 3, as applied to claim 1 above, Lee in combination with Tien discloses wherein the integrated circuit device further comprising a second jet-dispensed dot of a second conductive die attach adhesive material 221 (on the right side of the integrated circuit device) on the ground plane (see paragraphs [0025], [0026], [0027] and figs. 1A-E of Lee and paragraphs [0022], [0023], [0025] of Tien).
In re claim 6, as applied to claim 3 above, Lee in combination with Tien discloses wherein the jet-dispensed dot on the metal pad comprises a first plurality of jet-dispensed dots on the metal pad; and the second jet-dispensed dot on the remainder of the metal layer comprises a second plurality of jet-dispensed dots on the ground plane (see paragraphs [0027], [0035] and figs. 1E and 2 of Lee and paragraphs [0022], [0023], [0025] of Tien).
In re claim 7, as applied to claim 1 above, Lee in combination with Tien discloses wherein the integrated circuit device further comprising a solder bump 240 on the ground plane (see paragraph [0030] and fig. 1E of Lee and paragraphs [0022], [0023], [0025] and fig. 2 of Tien).
In re claim 9, Lee discloses a method for hot via coupling, comprising jet-dispensing a dot of a conductive die attach adhesive material 221 on a metal pad 105 of an integrated circuit device (see paragraph [0027] and figs. 1A-E), the integrated circuit device comprising a semiconductor substrate 100; a plurality of vias TH extending from a top surface of the semiconductor substrate 100 to a bottom surface of the semiconductor substrate 100 (see paragraph [0018] and figs. 1A-E); and a metal layer 105 on the bottom surface of the semiconductor substrate 100, the metal layer 105 comprising the metal pad extending around a via opening TH of one of the plurality of vias at the bottom surface of the semiconductor substrate 100, the metal pad being electrically isolated from a remainder of the metal layer on the bottom surface of the semiconductor substrate 100 (see paragraph [0020] and figs. 1A-E, note that, path region 105a is electrically isolated from the solder ball land region 105b).
Lee is silent to wherein the remainder of the metal layer on the bottom surface of the semiconductor substrate that provides a ground plane on the bottom of the semiconductor substrate.
However, Tien discloses in a same field of endeavor, an integrated circuit device, including, inter-alia, wherein the remainder of the metal layer 23 on the bottom surface of the semiconductor substrate that provides a ground plane on the bottom of the semiconductor substrate (see paragraphs [0022], [0023], [0025] and fig. 2).
Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the teaching as taught by Tien into the integrated circuit of Lee in order to enable wherein the remainder of the metal layer on the bottom surface of the semiconductor substrate that provides a ground plane on the bottom of the semiconductor substrate in Lee to be formed in order to balance impedance match, reducing a capacitance effect, and improve electric performance of the integrated circuit device (see paragraphs [0008], [0009], [0010] of Tien). Furthermore, it would have been obvious because all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the invention. KSR International Co. v. Teleflex Inc. (KSR), 550 U.S. 398 (2007). “If a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond that person’s skill.” Id.
In re claim 10, as applied to claim 9 above, Lee in combination with Tien discloses wherein the method further comprising jet-dispensing a second dot of the conductive die attach adhesive material (221 on the right side of the integrated circuit device) on the ground plane (see paragraphs [0025], [0026], [0027] and figs. 1A-E of Lee and paragraphs [0022], [0023], [0025] of Tien).
In re claim 11, as applied to claim 9 above, Lee in combination with Tien discloses wherein the method further comprising jet-dispensing a second dot of a second conductive die attach adhesive material on the ground plane (221 on the right side of the integrated circuit device) (see paragraphs [0025], [0026], [0027] and figs. 1A-E of Lee and paragraphs [0022], [0023], [0025] of Tien).
In re claim 13, as applied to claim 9 above, Lee in combination with Tien discloses wherein jet-dispensing the dot comprises jet-dispensing a plurality of dots of the conductive die attach adhesive material on the metal pad (see paragraphs [0025], [0025] and figs. 1E and 2 of Lee).
In re claim 14, as applied to claim 9 above, Lee in combination with Tien discloses wherein the method further comprising adhering a solder bump 240 to the ground plane (see paragraph [0030] and fig. 1E of Lee and paragraphs [0022], [0023], [0025] and fig. 2 of Tien).
In re claim 16, Lee discloses a method for hot via coupling, comprising jet-dispensing a dot of a conductive die attach adhesive material 221 on a metal pad 105 of an integrated circuit device (see paragraph [0027] and figs. 1A-E), the integrated circuit device comprising a metal layer 105 on a bottom surface of a substrate 100, the metal layer 105 comprising the metal pad extending around a via opening TH at the bottom surface of the substrate 100 (see paragraph [0026] and figs. 1A-E), the metal pad being electrically isolated from a remainder of the metal layer (see paragraph [0020] and figs. 1A-E, note that, the path region 105a is electrically isolated from the solder ball land region 105b).
Lee is silent to wherein the remainder of the metal layer that provides a ground plane.
However, Tien discloses in a same field of endeavor, an integrated circuit device, including, inter-alia, wherein the remainder of the metal layer 23 on the bottom surface of the semiconductor substrate that provides a ground plane on the bottom of the semiconductor substrate (see paragraphs [0022], [0023], [0025] and fig. 2).
Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the teaching as taught by Tien into the integrated circuit of Lee in order to enable wherein the remainder of the metal layer that provides a ground plane in Lee to be formed in order to balance impedance match, reducing a capacitance effect, and improve electric performance of the integrated circuit device (see paragraphs [0008], [0009], [0010] of Tien). Furthermore, it would have been obvious because all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the invention. KSR International Co. v. Teleflex Inc. (KSR), 550 U.S. 398 (2007). “If a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond that person’s skill.” Id.
In re claim 17, as applied to claim 16 above, Lee in combination with Tien discloses wherein the method further comprising jet-dispensing a second dot of the conductive die attach adhesive material (221 on the right side of the integrated circuit device) on the ground plane (see paragraphs [0025], ]0026], [0027] and figs. 1A-E of Lee and paragraphs [0022], [0023], [0025] of Tien).
In re claim 19, as applied to claim 16 above, Lee in combination with Tien discloses wherein jet-dispensing the dot comprises jet-dispensing a first plurality of dots of the conductive die attach adhesive material on the metal pad; and the method further comprises jet-dispensing a second plurality of dots of the conductive die attach adhesive material on the ground plane (see paragraphs [0027], [0035] and figs. 1E and 2 of Lee and paragraphs [0022], [0023], [0025] and fig. 2 of Tien).
Claim(s) 4, 5, 12, 15, 18, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (U.S. Pub. 2007/0296067), of record, in view of Tien et al. (U.S. Pub. 2007/0273026), newly cited, as applied to claims 3, 9, 11, and 16 above, and further in view of Sugita et al. (U.S. Pub. 2005/0172483), of record.
In re claims 4 and 5, as applied to claim 3 above, Lee is silent to wherein the conductive die attach material of the jet-dispensed dot on the metal pad is different than the second conductive die attach material of the second jet-dispensed dot on the ground plane and wherein a first diameter of the jet-dispensed dot on the metal pad is different than a second diameter of the second jet-dispensed dot on ground plane.
However, Sugita discloses wherein the conductive die attach material of the jet-dispensed dot on the metal pad is different (different particle size distributions) than the second conductive die attach material of the second jet-dispensed dot on the ground plane and wherein a first diameter of the jet-dispensed dot on the metal pad is different than a second diameter of the second jet-dispensed dot on the ground plane (see paragraphs [0034], [0035], [0041], [0042] and fig. 4A).
Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the teaching as taught by Sugita into the integrated circuit of Lee in order to enable wherein the conductive die attach material of the jet-dispensed dot on the metal pad is different than the second conductive die attach material of the second jet-dispensed dot on the ground plane and wherein a first diameter of the jet-dispensed dot on the metal pad is different than a second diameter of the second jet-dispensed dot on the ground plane in Lee to be formed since the configuration regarding about the shape of the conductive die attach material of the jet-dispensed dot on the metal pad and the second conductive die attach material of the second jet-dispensed dot on the ground plane was a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration was significant (In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966)). Furthermore, a change in size is generally recognized as being within the level of ordinary skill in the art. See In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955), Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), and MPEP 2144.04.
In re claim 12, as applied to claim 11 above, Lee is silent to wherein the conductive die attach adhesive material of the dot on the metal pad is different than the second conductive die attach adhesive material of the second dot on the ground plane.
However, Sugita discloses wherein the conductive die attach adhesive material of the dot on the metal pad is different (different particle size distributions) than the second conductive die attach adhesive material of the second dot on the ground plane (see paragraphs [0034], [0035], [0041], [0042] and fig. 4A).
Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the teaching as taught by Sugita into the integrated circuit of Lee in order to enable wherein the conductive die attach adhesive material of the dot on the metal pad is different than the second conductive die attach adhesive material of the second dot on the ground plane in Lee to be formed since the configuration regarding about the shape of the conductive die attach adhesive material of the dot on the metal pad and the second conductive die attach adhesive material of the second dot on the ground plane was a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration was significant (In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966)). Furthermore, a change in size is generally recognized as being within the level of ordinary skill in the art. See In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955), Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), and MPEP 2144.04.
In re claim 15, as applied to claim 9 above, Lee discloses wherein the method further comprising positioning the integrated circuit device 100 over a supporting substrate 200, such that the metal pad 105 of the integrated circuit device is aligned for an electrical connection to a trace 210 on the supporting substrate 200 (see paragraph [0021] and fig. 1E) but is silent to the step of thermosetting the dot of a conductive die attach adhesive material.
However, Sugita discloses thermosetting the dot of a conductive die attach adhesive material (see paragraph [0022]).
Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the teaching as taught by Sugita into the integrated circuit of Lee in order to enable the step of thermosetting the dot of a conductive die attach adhesive material in Lee to be performed in order to strengthen the adhesion between integrated circuit device and the substrate.
In re claim 18, as applied to claim 16 above, Lee is silent to wherein the method further comprising jet-dispensing a second dot of a second conductive die attach adhesive material on the ground plane, wherein the conductive die attach adhesive material of the dot on the metal pad is different than the second conductive die attach adhesive material of the second dot on the ground plane.
However, Sugita discloses jet-dispensing a second dot of a second conductive die attach adhesive material on the remainder of the metal layer, wherein the conductive die attach adhesive material of the dot on the metal pad is different (different particle size distributions) than the second conductive die attach adhesive material of the second dot on the ground plane (see paragraphs [0034], [0035], [0041], [0042] and fig. 4A).
Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the teaching as taught by Sugita into the integrated circuit of Lee in order to enable wherein the method further comprising jet-dispensing a second dot of a second conductive die attach adhesive material on the ground plane, wherein the conductive die attach adhesive material of the dot on the metal pad is different than the second conductive die attach adhesive material of the second dot on the ground plane in Lee to be formed since the configuration regarding about the shape of the conductive die attach adhesive material of the dot on the metal pad and the second conductive die attach adhesive material of the second dot on the ground plane was a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration was significant (In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966)). Furthermore, a change in size is generally recognized as being within the level of ordinary skill in the art. See In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955), Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), and MPEP 2144.04.
In re claim 20, as applied to claim 16 above, Lee discloses wherein method further comprising positioning the integrated circuit device 100 over a supporting substrate 200, such that the metal pad 105 of the integrated circuit device is aligned for an electrical connection to a trace 210 on the supporting substrate 200 (see paragraph [0021] and fig. 1E) but is silent to thermosetting the dot of a conductive die attach adhesive material.
However, Sugita discloses thermosetting the dot of a conductive die attach adhesive material (see paragraph [0022]).
Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the teaching as taught by Sugita into the integrated circuit of Lee in order to enable the step of thermosetting the dot of a conductive die attach adhesive material in Lee to be performed in order to strengthen the adhesion between integrated circuit device and the substrate.
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (U.S. Pub. 2007/0296067), of record, in view of Tien et al. (U.S. Pub. 2007/0273026), newly cited, as applied to claim 1 above, and further in view of Ahn et al. (U.S. Pub. 2007/0246245), of record.
In re claim 8, as applied to claim 1 above, Lee is silent to wherein the conductive die attach adhesive material has a viscosity of greater than 5 Pa·s and a thermal conductivity of greater than 1 W/mK.
However, Ahn discloses wherein the conductive die attach adhesive material has a viscosity of greater than 5 Pa·s (58,000 mPa·s) and a thermal conductivity of greater than 1 W/mK (1.9 W/mK) (see paragraph [0115]).
Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the teaching as taught by Ahn into the integrated circuit of Lee in order to enable wherein the conductive die attach adhesive material has a viscosity of greater than 5 Pa·s and a thermal conductivity of greater than 1 W/mK in Lee to be formed in order to improve adhesion, electrical connection, and thermal conductivity between the integrated circuit device and the substrate.
Response to Applicant’s Amendment and Arguments
Applicant’s arguments with respect to claim(s) 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
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/KHIEM D NGUYEN/Primary Examiner, Art Unit 2892